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| * | x86: Fix a compiler warning in arch/x86/lib/realmode.cGabe Black2011-11-02-1/+1
| | | | | | | | | | | | | | | | | | | | | Ensure that the value being passed to a %d format specifier is of type int. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * | x86: Remove the prototype for the unused function board_initGabe Black2011-11-02-1/+0
| | | | | | | | | | | | Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * | x86: Rename include/asm/ic to include/asm/arch-sc520Graeme Russ2011-11-02-15/+12
| | | | | | | | | Also include some trivial related cleanups
| * | x86: turn off cache: set control register properlyOndrej Kupka2011-11-02-1/+1
| |/ | | | | | | | | | | Bits should be ORed when they are supposed to be added together Signed-off-by: Ondrej Kupka <ondra.cap@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Wolfgang Denk2011-11-03-30/+65
|\ \ | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nds32: nds32: asm/io.h: add __iormb __iowmb and inline io support nds32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment nds32: Use getenv_ulong() in place of getenv(), strtoul
| * | nds32: asm/io.h: add __iormb __iowmb and inline io supportMacpaul Lin2011-11-01-20/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | 1. This patch add required __iormb and __iowmb to io.h. This also fix some misbehavior to periphal drivers. This io.h has been fixed with referencing arm/include/asm/io.h. 2. This patch replaced macro writeb and readb into inline function. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | nds32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentMacpaul Lin2011-11-01-0/+11
| | | | | | | | | | | | | | | | | | Add ARCH_DMA_MINALIGN definition to asm/cache.h Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | nds32: Use getenv_ulong() in place of getenv(), strtoulMacpaul Lin2011-11-01-10/+2
| |/ | | | | | | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* | e1000: fix bugs from recent commitsWolfgang Denk2011-11-03-5/+6
|/ | | | | | | | | | | | | | Commit 114d7fc0 "e1000: Rewrite EEPROM checksum error to give more information" failed to initialize the checksum variable which should result in random results. Fix that. Commit 2326a94d caused a ton of "unused variable 'x'" warnings. Fix these. While we are at it, remove some bogus parens. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kyle Moffett <Kyle.D.Moffett@boeing.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
* e1000: Allow direct access to the E1000 SPI EEPROM deviceKyle Moffett2011-10-28-2/+671
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a part of the manufacturing process for some of our custom hardware, we are programming the EEPROMs attached to our Intel 82571EB controllers from software using U-Boot and Linux. This code provides several conditionally-compiled features to assist in our manufacturing process: CONFIG_CMD_E1000: This is a basic "e1000" command which allows querying the controller and (if other config options are set) performing EEPROM programming. In particular, with CONFIG_E1000_SPI this allows you to display a hex-dump of the EEPROM, copy to/from main memory, and verify/update the software checksum. CONFIG_E1000_SPI_GENERIC: Build a generic SPI driver providing the standard U-Boot SPI driver interface. This allows commands such as "sspi" to access the bus attached to the E1000 controller. Additionally, some E1000 chipsets can support user data in a reserved space in the E1000 EEPROM which could be used for U-Boot environment storage. CONFIG_E1000_SPI: The core SPI access code used by the above interfaces. For example, the following commands allow you to program the EEPROM from a USB device (assumes CONFIG_E1000_SPI and CONFIG_CMD_E1000 are enabled): usb start fatload usb 0 $loadaddr 82571EB_No_Mgmt_Discrete-LOM.bin e1000 0 spi program $loadaddr 0 1024 e1000 0 spi checksum update Please keep in mind that the Intel-provided .eep files are organized as 16-bit words. When converting them to binary form for programming you must byteswap each 16-bit word so that it is in little-endian form. This means that when reading and writing words to the SPI EEPROM, the bit ordering for each word looks like this on the wire: Time >>> ------------------------------------------------------------------ ... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ... ------------------------------------------------------------------ (MSB is 15, LSB is 0). Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* e1000: Export core EEPROM access functions for SPI supportKyle Moffett2011-10-28-17/+24
| | | | | | | | | | | | A followup patch will be adding a configurable feature to enable programming of E1000 EEPROMs from the command line or via the generic U-Boot SPI interface. In order for it to work it needs access to certain E1000-internal functions, so export those in the e1000.h header file. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* e1000: Rewrite EEPROM checksum error to give more informationKyle Moffett2011-10-28-18/+28
| | | | | | | | As an aide to debugging, we should print out the expected value of the EEPROM checksum in addition to just saying that it is wrong. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* e1000: Restructure and streamline PCI device probingKyle Moffett2011-10-28-71/+74
| | | | | | | | | | | | | | | | | | | | | | | By allocating the e1000 device structures much earlier, we can easily generate better error messages and siginficantly clean things up. The only user-visable change (aside from reworded error messages) is that a detected e1000 device which fails to initialize due to software or hardware error will still be allocated a device number. As one example, consider a system with 2 e1000 PCI devices where the first controller has a corrupted EEPROM. Using the old code the second controller would be "e1000#0", while with this change it would be "e1000#1". This change should hopefully make such EEPROM errors much more straightforward to handle correctly in boot scripts and the like. It is also necessary for a followup patch which allows SPI programming of an e1000 controller's EEPROM even if the checksum is invalid. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* e1000: Clean up handling of dual-port NICs and support 82571Kyle Moffett2011-10-28-39/+33
| | | | | | | Consolidate the test for a dual-port NIC to one location for easy modification, then fix support for the dual-port 82571. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
* zlib: Fix integer cast of pointerSimon Glass2011-10-28-1/+1
| | | | | | Fix to cast an integer to a pointer using uintptr_t. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-10-28-32130/+9498
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: ARM: Add Calxeda Highbank platform dkb: make mmc command as default enabled Marvell: dkb: add mmc support ARM: pantheon: add mmc definition davinci: remove config.mk file from the sources ARM:AM33XX: Add support for TI AM335X EVM ARM:AM33XX: Added timer support ARM:AM33XX: Add emif/ddr support ARM:AM33XX: Add clock definitions ARM:AM33XX: Added support for AM33xx omap3/emif4: fix registers definition davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM davinci: emac: add support for more than 1 PHYs davinci: emac: add new features to autonegotiate for EMAC da850evm: Move LPSC configuration to board_early_init_f() omap4_panda: Build in cmd_gpio support on panda omap: Don't use gpio_free to change direction to input mmc: omap: Allow OMAP_HSMMC[23]_BASE to be unset OMAP3: overo : Add environment variable optargs to bootargs OMAP3: overo: Move ethernet CS4 configuration to execute based on board id OMAP3: overo : Use ttyO2 instead of ttyS2. da830: add support for NAND boot mode dm36x: revert cache disable patch dm644X: revert cache disable patch devkit8000: Add malloc space omap: spl: fix build break due to changes in FAT OMAP3 SPL: Provide weak omap_rev_string omap: beagle: Use ubifs instead of jffs2 for nand boot omap: overo: Disable pull-ups on camera PCLK, HS and VS signals omap: overo: Configure mux for gpio10 SPL: Add DMA library omap3: Add interface for omap3 DMA omap3: Add DMA register accessors omap3: Add Base register for DMA arm, davinci: add missing LSPC define for MMC/SD1 U-Boot/SPL: omap4: Make ddr pre-calculated timings as default. DaVinci: correct MDSTAT.STATE mask omap4: splitting padconfs into common, 4430 and 4460 omap4: adding revision detection for 4460 ES1.1 omap4: replacing OMAP4_CONTROL with OMAP4430_CONTROL gplug: fixed build error as a result of code cleanup patch kirkwood_spi: add dummy spi_init() gpio: mvmfp: reduce include platform file ARM: orion5x: reduce dependence of including platform file serial: reduce include platform file for marvell chip ARM: kirkwood: reduce dependence of including platform file ARM: armada100: reduce dependence of including platform file ARM: pantheon: reduce dependence of including platform file Armada100: Add env storage support for Marvell gplugD Armada100: Add SPI flash support for Marvell gplugD Armada100: Add SPI support for Marvell gplugD SPI: Add SPI driver support for Marvell Armada100 dreamplug: initial board support. imx: fix coding style misc: pmic: drop old Freescale's pmic driver MX31: mx31pdk: use new pmic driver MX31: mx31ads: use new pmic driver MX31: mx31_litekit: use new pmic driver MX5: mx53evk: use new pmic driver MX5: mx51evk: use new pmic driver MX35: mx35pdk: use new pmic driver misc: pmic: addI2C support to pmic_fsl driver misc: pmic: use I2C_SET_BUS in pmic I2C MX5: efikamx/efikasb: use new pmic driver MX3: qong: use new pmic driver RTC: Switch mc13783 to generic pmic code MX5: vision2: use new pmic driver misc: pmic: Freescale PMIC switches to generic PMIC driver misc:pmic:samsung Enable PMIC driver at GONI target misc:pmic:max8998 MAX8998 support at a new PMIC driver. misc:pmic:core New generic PMIC driver mx31pdk: Remove unneeded config mx31: provide readable WEIM CS accessor MX51: vision2: Set global macros I2C: Add i2c_get/set_speed() to mxc_i2c.c ARM: Update mach-types devkit8000: Add config to enable SPL MMC boot devkit8000: protect board_mmc_init arm, post: add missing post_time_ms for arm cosmetic, post: Codingstyle cleanup arm, logbuffer: make it compileclean tegra2: Enable MMC for Seaboard tegra2: Add more pinmux functions tegra2: Rename PIN_ to PINGRP_ tegra2: Add more clock functions tegra2: Clean up board code a little tegra2: Rename CLOCK_PLL_ID to CLOCK_ID
| * ARM: Add Calxeda Highbank platformRob Herring2011-10-27-0/+393
| | | | | | | | | | | | | | | | | | Add basic support for Calxeda Highbank platform. Only minimal support with serial and SATA are included. Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * dkb: make mmc command as default enabledLei Wen2011-10-27-0/+1
| | | | | | | | Signed-off-by: Lei Wen <leiwen@marvell.com>
| * Marvell: dkb: add mmc supportLei Wen2011-10-27-0/+43
| | | | | | | | Signed-off-by: Lei Wen <leiwen@marvell.com>
| * ARM: pantheon: add mmc definitionLei Wen2011-10-27-0/+60
| | | | | | | | Signed-off-by: Lei Wen <leiwen@marvell.com>
| * davinci: remove config.mk file from the sourcesVladimir Zapolskiy2011-10-27-32/+0
| | | | | | | | | | | | | | | | To compile TI Davinci SoC support the identical config.mk file from the cpu directory shall be used. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM:AM33XX: Add support for TI AM335X EVMChandan Nath2011-10-27-3/+592
| | | | | | | | | | | | | | | | | | This patch adds basic support for booting the board. This patch adds support for the UART necessary to get to the u-boot prompt. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM:AM33XX: Added timer supportChandan Nath2011-10-27-0/+5
| | | | | | | | | | | | | | This patch adds timer support for AM33xx platform. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM:AM33XX: Add emif/ddr supportChandan Nath2011-10-27-0/+654
| | | | | | | | | | | | | | | | This patch adds AM33xx emif/ddr support along with board specific defines. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM:AM33XX: Add clock definitionsChandan Nath2011-10-27-0/+353
| | | | | | | | | | | | | | This patch adds basic clock definition of am33xx SoC. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM:AM33XX: Added support for AM33xxChandan Nath2011-10-27-0/+545
| | | | | | | | | | | | | | | | This patch adds basic support for AM33xx which is based on ARMV7 Cortex A8 CPU. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap3/emif4: fix registers definitionIlya Yanok2011-10-27-0/+1
| | | | | | | | | | | | | | Fix EMIF4 registers definition. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUMManjunath Hadli2011-10-27-25/+9
| | | | | | | | | | | | | | | | | | remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM as they are no longer needed with the support for more than 1 PHYs in davinci emac driver. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * davinci: emac: add support for more than 1 PHYsManjunath Hadli2011-10-27-65/+100
| | | | | | | | | | | | | | | | | | | | add support for more than 1 PHYs. Many of the davinci platforms have more than 1 PHYs on thier board. This patch extends support in davinci emac driver for upto 3 PHYs. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * davinci: emac: add new features to autonegotiate for EMACManjunath Hadli2011-10-27-2/+28
| | | | | | | | | | | | | | | | | | | | add more features like DUPLEX, 100MB link speed etc to auto negotiate in EMAC driver. EMAC controller autonegotiates for these features with PHYs which are on the board. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * da850evm: Move LPSC configuration to board_early_init_f()Christian Riesch2011-10-27-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit f1d2b313c9eb6808d30c16a9eb5251240452a56c the serial port of the da850evm is accessed before the UART2 peripheral of the SoC is powered on in the function board_init() in board/davinci/da8xxevm/da850evm.c. When u-boot is used in conjunction with the UBL (user boot loader, see doc/README.davinci) on this board, the UART2 peripheral is already turned on by UBL at the time u-boot is started. Hence, the wrong initialization sequence is not noticed by most users. However, if UBL is not used, u-boot must power on the peripheral before using it. This patch adds a board_early_init_f() function for the LPSC configuration to the da850evm board configuration. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap4_panda: Build in cmd_gpio support on pandaJoe Hershberger2011-10-27-0/+3
| | | | | | | | | | | | | | | | | | Enable the gpio command Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap: Don't use gpio_free to change direction to inputJoe Hershberger2011-10-27-21/+1
| | | | | | | | | | | | | | | | | | gpio_free() should not have the side effect of setting the line to input since this prevents the gpio command from being able to set a line as output. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * mmc: omap: Allow OMAP_HSMMC[23]_BASE to be unsetTom Rini2011-10-27-0/+4
| | | | | | | | | | | | | | | | | | Not all omap families define OMAP_HSMMC[23]_BASE so condition those cases in omap_mmc_init(). Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * OMAP3: overo : Add environment variable optargs to bootargsPhilip Balister2011-10-27-0/+3
| | | | | | | | | | | | | | | | | | | | This allows the user can easily add extra kernel arguments. Very helpful for reserving memory for the DSP without rewriting the entire kernel argument line. Signed-off-by: Philip Balister <philip@opensdr.com> Tested-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * OMAP3: overo: Move ethernet CS4 configuration to execute based on board idPhilip Balister2011-10-27-4/+3
| | | | | | | | | | | | | | | | | | | | | | By moving the CS4 configuration into the board specific configuration, it is left free for custom carrier boards. The USRP-E1XX series uses CS4 to control access to an FPGA, so without this patch the device driver cannot claim CS4. Signed-off-by: Philip Balister <philip@opensdr.com> Tested-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * OMAP3: overo : Use ttyO2 instead of ttyS2.Philip Balister2011-10-27-1/+1
| | | | | | | | | | | | | | | | | | Starting with kernel 2.6.37, the serial ports on the OMAP3 are called ttyOX, not ttySX. Signed-off-by: Philip Balister <philip@opensdr.com> Tested-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * da830: add support for NAND boot modeManjunath Hadli2011-10-27-1/+66
| | | | | | | | | | | | | | | | | | | | | | | | Add support for enabling NAND boot mode in configuration file and add correspanding pinmux support, nand initialize function in board file. The size required for environment variables not more than 10KB the CONFIG_ENV_SIZE is set to 10KB from (512 << 10). Acked-by: Nick Thompson <nick.thompson@ge.com> Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * dm36x: revert cache disable patchManjunath Hadli2011-10-27-3/+0
| | | | | | | | | | | | | | | | | | | | | | revert commit 98c19aff9524e1d0dd6bf39bf7bde5644f121feb as the disabling of cache need not be done explicitly. Subsequent patches to new cache management framework has fixed it. EMAC issue with cache coherency still exists when cahces are enabled. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * dm644X: revert cache disable patchManjunath Hadli2011-10-27-3/+0
| | | | | | | | | | | | | | | | | | | | | | revert commit 913a39e9aa4d935948d41cd727d53f5878414a77 as the disabling of cache need not be done explicitly. Subsequent patches to new cache management framework has fixed it. EMAC issue with cache coherency still exists when cahces are enabled. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * devkit8000: Add malloc spaceTom Rini2011-10-27-0/+3
| | | | | | | | | | | | | | | | | | With malloc support being a new requirement for all ARM SPL implementations, define a small area for use on devkit8000. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap: spl: fix build break due to changes in FATAneesh V2011-10-27-8/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | FAT library now uses malloc() and free(). But SPL doesn't have heap until now. Setup a heap in SDRAM to fix this issue. However this increases SPL footprint beyond the available SRAM budget. So, compile out some fancy features in the SDARM init bring back footprint under control CC: Sandeep Paulraj <s-paulraj@ti.com> CC: Wolfgang Denk <wd@denx.de> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * OMAP3 SPL: Provide weak omap_rev_stringTom Rini2011-10-27-8/+9
| | | | | | | | | | | | | | | | | | We add an weak version of omap_rev_string in omap-common/spl.c and while at it drop the omap3 version. Move the prototype over to <asm/omap_common.h> with the other SPL functions. Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap: beagle: Use ubifs instead of jffs2 for nand bootSteve Sakoman2011-10-27-2/+2
| | | | | | | | | | | | Signed-off-by: Steve Sakoman <steve@sakoman.com> Acked-by: Koen Kooi <k-kooi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap: overo: Disable pull-ups on camera PCLK, HS and VS signalsSteve Sakoman2011-10-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The level shifters used on the Caspa camera module have a 4k output impedance. Combined with the 100uA pull-up resistors in the OMAP3, this raises the ground level to 400mV. Adding crosstalk between the pixel clock and the HS/VS signals on the flat cable (a ground line in between would have been nice), logic 0 levels can raise up to 650mV. This exceeds the camera input pins VIL maximum voltage. This change suggested-by Laurent Pinchart Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap: overo: Configure mux for gpio10Steve Sakoman2011-10-27-1/+1
| | | | | | | | | | | | | | | | | | | | This pad was previously configured for sysclkout_1. This patch changes the configuration to gpio_10 to reduce radiated noise from the 26Mhz clock, as well as make the pin more generally useful. Signed-off-by: Steve Sakoman <steve@sakoman.com> Acked-by: Philip Balister <philip@opensdr.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * SPL: Add DMA librarySimon Schwarz2011-10-27-0/+2
| | | | | | | | | | | | | | | | Adding a DMA library to the SPL. It is used if CONFIG_SPL_DMA_SUPPORT is defined. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap3: Add interface for omap3 DMASimon Schwarz2011-10-27-0/+276
| | | | | | | | | | | | | | Adds an interface to use the OMAP3 DMA. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap3: Add DMA register accessorsSimon Schwarz2011-10-27-0/+45
| | | | | | | | | | | | | | Adding the register definitions for omap3 DMA controller to cpu.h Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * omap3: Add Base register for DMASimon Schwarz2011-10-27-0/+3
| | | | | | | | | | | | | | Adding the base register address of OMAP3 DMA controller. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
generated by cgit v1.1 at 2024-11-06 11:36:00 +0000