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| * | | ARM: uniphier: fix glitch signal problem for low-level debugMasahiro Yamada2015-09-25-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, IECTRL is enabled after pin-mux settings for the low-level debugging for PH1-LD4 and PH1-sLD8. While IECTRL is disabled, input signals are pulled-down, i.e. glitch signal (Low to High transition) problem occurs if pin-mux is set up first. As a result, one invalid character is input to the UART block and the auto-boot counting is terminated immediately. The correct initialization procedure is: [1] Enable IECTRL (if IECTRL exists for the pins) [2] Set up pin-muxing [3] Deassert the reset of the hardware block Currently, the low-level debugging is working for PH1-sLD3 and PH1-Pro4, but just in case, follow the sequence for all the SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: delete unneeded input enable for low-level debugMasahiro Yamada2015-09-25-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The UART I/O ports for PH1-Pro4 has no input enable controlling. This code is useless. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_*Masahiro Yamada2015-09-25-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify they belong to UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: allow to disable CONFIG_MICRO_SUPPORT_CARDMasahiro Yamada2015-09-25-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Without this, build fails if CONFIG_MICRO_SUPPORT_CARD is disabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: move CONFIG_SUPPORT_CARD_* macros to local fileMasahiro Yamada2015-09-25-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It is no longer necessary to define CONFIG_SUPPORT_CARD_* globally. Move them to a C file as local macros. Also, rename the C file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: refactor LED functionMasahiro Yamada2015-09-25-128/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The macro, led_write(), is now only used in C sources. There is no more reason to keep the tricky assembly macro. Replace it with a new C function led_puts(). Also, rename board.h to micro-support-card.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: remove useless wrapper functionsMasahiro Yamada2015-09-25-17/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wrapper functions, uniphier_board_*, are just making function calls complex. Remove them. Also, use empty inline functions in case CONFIG_MICRO_SUPPORT_CARD is disabled, so that prototype checking works. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: remove unused header fileMasahiro Yamada2015-09-25-24/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This has been unused since commit f4e190e317b8 ("ARM: uniphier: enable SPL_OF_CONTROL"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: parse device tree to determine DRAM base and sizeMasahiro Yamada2015-09-25-26/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Device tree specifies the available memory ranges in its "/memory" node. Use it to simplify the CONFIG defines. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: remove ifdef CONFIG_{SOC} conditionals from sg-regs.hMasahiro Yamada2015-09-25-119/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To achieve the complete run-time configuration by device trees, ifdef conditionals in header files are not preferable. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: change the external bus address mappingMasahiro Yamada2015-09-25-20/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces 0x00000000 - 0x0fffffff 0x40000000 - 0x4fffffff are both mapped to the external bus (also called system bus), so either was OK. In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is assigned for the serial NOR interface. Going forward, use the latter for the external bus. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | ARM: uniphier: enable setexpr commandMasahiro Yamada2015-09-25-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This command will be used in the next commit to calculate base-offseted addresses. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: drop DCC micro support card supportMasahiro Yamada2015-09-25-311/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically (for compatibility with very old platforms), two different types of micro support cards have been used with the UniPhier SoC development boards. It has been painful to maintain both. Having one of them is enough. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | ARM: uniphier: drop ad-hoc input enable settingsMasahiro Yamada2015-09-25-51/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These input enable settings are handled by the pinctrl drivers. Because the external bus pins are input-enabled by default, on-board devices such as LED still work fine even with this delayed input enabling. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: drop ad-hoc early pin-muxing settingsMasahiro Yamada2015-09-25-82/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the UniPhier serial driver had already switched to Drive Model and the pinctrl drivers are now enabled, these pin-muxing settings are properly handled by the pinctrl drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | ARM: uniphier: enable PINCTRL and SPL_PINCTRLMasahiro Yamada2015-09-25-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Now, UniPhier SoCs are ready to enable pinctrl drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: dts: uniphier: prepare device trees to use pinctrl in SPLMasahiro Yamada2015-09-25-4/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB (spl/u-boot-spl.dtb). The "soc" node (this is simple-bus node) also needs the property to bind the pinctrl node located under it. I am collecting this U-Boot specific hack to the bottom of board DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI. My goal is to sync DTSI with Linux for easier maintenance. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN to bind all nodesMasahiro Yamada2015-09-25-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the next commit, I will add "u-boot,dm-pre-reloc" to the "soc" (simple-bus) nodes in UniPhier device trees. But, before that, CONFIG_SYS_MALLOC_F_LEN must be increased. Adding "u-boot,dm-pre-reloc" to a simple-bus node causes it to bind all of its child nodes. (See simple_bus_post_bind() function) Actually, I want only UART0 and pinctrl to be bound in SPL and before relocation in U-boot proper. But, with "u-boot,dm-pre-reloc" in the simple-bus node, all the other unwanted nodes are also bound. The default value for CONFIG_SYS_MALLOC_F_LEN, 0x400, is not enough for that. Increase the pre-reloc malloc size to 0x2000, hoping the root cause will be fixed later. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | ARM: uniphier: enable simple-bus driver for SPLMasahiro Yamada2015-09-25-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In UniPhier device trees, pinctrl device nodes are located under the simple-bus (AMBA). This is needed to bind pinctrl devices in SPL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | pinctrl: uniphier: add UniPhier PH1-LD6b pinctrl driverMasahiro Yamada2015-09-25-0/+140
| | | | | | | | | | | | | | | | | | | | | | | | Add pin configuration and pinmux support for UniPhier PH1-LD6b SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | pinctrl: uniphier: add UniPhier ProXstream2 pinctrl driverMasahiro Yamada2015-09-25-0/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pin configuration and pinmux support for UniPhier ProXstream2 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | pinctrl: uniphier: add UniPhier PH1-Pro5 pinctrl driverMasahiro Yamada2015-09-25-0/+151
| | | | | | | | | | | | | | | | | | | | | | | | Add pin configuration and pinmux support for UniPhier PH1-Pro5 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | pinctrl: uniphier: add UniPhier PH1-sLD8 pinctrl driverMasahiro Yamada2015-09-25-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | Add pin configuration and pinmux support for UniPhier PH1-sLD8 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | pinctrl: uniphier: add UniPhier PH1-Pro4 pinctrl driverMasahiro Yamada2015-09-25-0/+137
| | | | | | | | | | | | | | | | | | | | | | | | Add pin configuration and pinmux support for UniPhier PH1-Pro4 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | pinctrl: uniphier: add UniPhier PH1-LD4 pinctrl driverMasahiro Yamada2015-09-25-0/+141
| | | | | | | | | | | | | | | | | | | | | | | | Add pin configuration and pinmux support for UniPhier PH1-LD4 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | pinctrl: uniphier: add UniPhier pinctrl core supportMasahiro Yamada2015-09-23-0/+278
| |/ / | | | | | | | | | | | | | | | | | | The core support for the pinctrl drivers for all the UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-09-22-328/+3497
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| * | drivers/net/vsc9953: Add GPL-2.0+ SPDX-License-IdentifierCodrin Ciubotariu2015-09-21-9/+4
| | | | | | | | | | | | | | | | | | Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Add commands for VLAN ingress filteringCodrin Ciubotariu2015-09-21-0/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The command: ethsw [port <port_no>] ingress filtering { [help] | show | enable | disable } - enable/disable VLAN ingress filtering on port can be used to enable/disable/show VLAN ingress filtering on a port. This command has also been added to the ethsw generic parser from common/cmd_ethsw.c Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Add command for shared/private VLAN learningCodrin Ciubotariu2015-09-21-0/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The command: ethsw vlan fdb { [help] | show | shared | private } - make VLAN learning shared or private" configures the FDB to share the FDB entries learned on multiple VLANs or to keep them separated. By default, the FBD uses private VLAN learning. This command has also been added to the ethsw generic parser from common/cmd_ethsw.c Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Add VLAN commands for VSC9953Codrin Ciubotariu2015-09-21-0/+767
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new added commands can be used to configure VLANs for a port on both ingress and egress. The new commands are: ethsw [port <port_no>] pvid { [help] | show | <pvid> } - set/show PVID (ingress and egress VLAN tagging) for a port; ethsw [port <port_no>] vlan { [help] | show | add <vid> | del <vid> } - add a VLAN to a port (VLAN members); ethsw [port <port_no>] untagged { [help] | show | all | none | pvid } - set egress tagging mod for a port" ethsw [port <port_no>] egress tag { [help] | show | pvid | classified } - Configure VID source for egress tag. Tag's VID could be the frame's classified VID or the PVID of the port These commands have also been added to the ethsw generic parser from common/cmd_ethsw.c Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Add commands to manipulate the FDB for VSC9953Codrin Ciubotariu2015-09-21-0/+693
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new command: ethsw [port <port_no>] [vlan <vid>] fdb { [help] | show | flush | { add | del } <mac> } Can be used to add and delete FDB entries. Also, the command can be used to show entries from the FDB tables. When used with [port <port_no>] and [vlan <vid>], only the matching the FDB entries can be seen or flushed. The command has also been added to the generic ethsw parser from cmd_ethsw.c. Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | common/env_flags.c: Add function to validate a MAC addressCodrin Ciubotariu2015-09-21-13/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code that checks if a string has the format of a MAC address has been moved to a separate function called eth_validate_ethaddr_str(). This has been done to allow other components (such as vsc9953 driver) to validate a MAC address. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Add commands to enable/disable HW learningCodrin Ciubotariu2015-09-21-0/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The command: ethsw [port <port_no>] learning { [help] | show | auto | disable } can be used to enable/disable HW learning on a port. This patch also adds this command to the generic ethsw parser from cmd_ethsw. Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Add command to show/clear port countersCodrin Ciubotariu2015-09-21-3/+415
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new added command: ethsw [port <port_no>] statistics { [help] | [clear] } will print counters like the number of Rx/Tx frames, number of Rx/Tx bytes, number of Rx/Tx unicast frames, etc. This patch also adds this commnd in the genereric ethsw parser from cmd_ethsw.c Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Use the generic Ethernet Switch parserCodrin Ciubotariu2015-09-21-185/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces the parser used by VSC9953 L2 Switch driver with the generic one. Also, the config macro that enables the VSC9953 commands has been replaced in all the platforms that use this driver with the config macro that corresponds to the generic parser. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | common/cmd_ethsw: Add generic commands for Ethernet SwitchesCodrin Ciubotariu2015-09-21-0/+396
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch creates a flexible parser for Ethernet Switch configurations that should support complex commands. The parser searches for predefined keywords in the command and calls the proper function when a match is found. Also, the parser allows for optional keywords, such as "port", to apply the command on a port or on all ports. For now, the defined commands are: ethsw [port <port_no>] { enable | disable | show } Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Add default configuration for VSC9953 L2 SwitchCodrin Ciubotariu2015-09-21-0/+309
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At startup, the default configuration should be: - enable HW learning on all ports (HW default); - all ports are VLAN aware; - all ports are members of VLAN 1; - all ports have Port-based VLAN 1; - on all ports, the switch is allowed to remove maximum one VLAN tag, - on egress, the switch should add a VLAN tag if the frame is classified to a different VLAN than the port's Port-based VLAN; Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | include/bitfield: Add new bitfield operationsCodrin Ciubotariu2015-09-21-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These new operations allow manipulation of bitfields within a word by using a mask instead of width and shift values to extract/replace the bitfields. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Fix missing reserved registerCodrin Ciubotariu2015-09-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VSC9953 DS reserves a register between vlan_mask and anag_efil registers. Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Fix bug when enabling a portCodrin Ciubotariu2015-09-21-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a port is enabled at init time, the initializing function touches more bits than necessary to enable a port (also touches reserved bits and default bit values). This patch fixes this issue by changing the value of the define used to enable the port and assures that no other bits are changes by replacing out_le32() with setbits_le32(). Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Cleanup patchCodrin Ciubotariu2015-09-21-118/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch groups some macros defined for registers and replaces some magic numbers from vsc9953 with macros. Also, "port" and "port_nr" words are replaced with "port_no", puts each variable declaration on a line and removes unnecessary tabs. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers/net/vsc9953: Remove 'CONFIG_' from macros' nameCodrin Ciubotariu2015-09-21-42/+42
| |/ | | | | | | | | | | Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | pinctrl: move dm_scan_fdt_node() out of pinctrl uclassMasahiro Yamada2015-09-19-6/+17
|/ | | | | | | | | | | | | | | | | | | | | Commit c5acf4a2b3c6 ("pinctrl: Add the concept of peripheral IDs") added some additional change that was not mentioned in the git-log. That commit added dm_scan_fdt_node() in the pinctrl uclass binding. It should be handled by the simple-bus driver or the low-level driver, not by the pinctrl framework. I guess Simon's motivation was to bind GPIO banks located under the Rockchip pinctrl device. It is true some chips have sub-devices under their pinctrl devices, but it is basically SoC-specific matter. This commit partly reverts commit c5acf4a2b3c6 to keep the only pinctrl-generic features in the uclass. The dm_scan_fdt_node() should be called from the rk3288_pinctrl driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-09-17-70/+400
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| * x86: quark: Configure MTRR to enable cacheBin Meng2015-09-16-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Quark SoC does not support MSR MTRRs. Fixed and variable range MTRRs are accessed indirectly via the message port and not the traditional MSR mechanism. Only UC, WT and WB cache types are supported. We configure all the fixed range MTRRs with common values (VGA RAM as UC, others as WB) and 3 variable range MTRRs for ROM/eSRAM/RAM as WB, which significantly improves the boot time performance. With this commit, it takes only 2 seconds for U-Boot to boot to shell on Intel Galileo board. Previously it took about 6 seconds. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: doc: Add DMI to the TODO listBin Meng2015-09-16-0/+2
| | | | | | | | | | | | | | | | Desktop Management Interface (DMI) is not supported by U-Boot now. Add it to the TODO list. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: doc: Document some porting hints about Intel QuarkBin Meng2015-09-16-0/+24
| | | | | | | | | | | | | | | | Document porting considerations for Intel Quark based board, including MRC parameters and PCIe initialization. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: galileo: Add PCIe root port IRQ routingBin Meng2015-09-16-0/+12
| | | | | | | | | | | | | | | | Now we have enabled PCIe root port on Quark SoC, add its PIRQ routing information in the device tree as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: quark: Initialize thermal sensor properlyBin Meng2015-09-16-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Thermal sensor on Quark SoC needs to be properly initialized per Quark firmware writer guide, otherwise when booting Linux kernel, it triggers system shutdown because of wrong temperature in the thermal sensor is detected by the kernel driver (see below): [ 5.119819] thermal_sys: Critical temperature reached(206 C),shutting down [ 5.128997] Failed to start orderly shutdown: forcing the issue [ 5.135495] Emergency Sync complete Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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