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* ARM: mx6: Enable PCIe on SabreliteMarek Vasut2014-01-26-0/+11
| | | | | | | | | | Enable PCI express on MX6 Sabrelite. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* ARM: mx6: Add PCI express driverMarek Vasut2014-01-26-0/+593
| | | | | | | | | | | | Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the PCIe block in RC mode only, the EP mode is NOT supported. The driver is tested with the Intel e1000 NIC driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* ARM: mx6: Add PCI express clock configurationMarek Vasut2014-01-26-10/+66
| | | | | | | | | | | | | | | | Split the SATA clock enabling function and add PCI express clock enabling function. The SATA clock enabling function starts up the 100MHz SATA reference PLL in ENET_PLL register, but the code can be re-used to enable the 125MHz PCIe reference in ENET_PLL, so pull this code into separate function. Moreover, add the PCIe clock enabling code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* ARM: armv7: Make indirect vector addresses globlMarek Vasut2014-01-26-0/+7
| | | | | | | | | | | | | Make indirect vectors addresses global, so they can be replaced by various code that needs to do so. For example the MX6 PCI express driver needs to temporarily replace data abort handler when reading the config space. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-01-26-4489/+8008
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| * arm: koelsch: Add support QSPI device and enable boot from SPI flashNobuhiro Iwamatsu2014-01-16-4/+28
| | | | | | | | | | | | | | | | This supports SH-QSPI device on koelsch board, and enable booting from SPI flash. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: lager: Add support QSPI device and enable boot from SPI flashNobuhiro Iwamatsu2014-01-16-4/+29
| | | | | | | | | | | | | | | | This supports SH-QSPI device on lager board, and enable booting from SPI flash. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * spi: sh_qspi: Add header file that defines the address of registersNobuhiro Iwamatsu2014-01-16-1/+2
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: rmobile: Add SH QSPI base register addressNobuhiro Iwamatsu2014-01-16-0/+2
| | | | | | | | | | | | | | | | This adds base register address of SH QSPI. Currently, SH QSPI is used only from R8A7790 and R8A7791. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: lager: Disable TMU0 before OS bootNobuhiro Iwamatsu2014-01-16-0/+6
| | | | | | | | | | | | | | | | | | On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel and other. This disables TMU0 at the request of from kernel user. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: koelsch: Disable TMU0 before OS bootNobuhiro Iwamatsu2014-01-16-0/+6
| | | | | | | | | | | | | | | | | | On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel and other. This disables TMU0 at the request of from kernel user. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-15-3/+691
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| * | arm: use canonical sub mnemonicAndreas Bießmann2014-01-14-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building some arm boards with older binutils may produce errors like this: ---8<--- crt0.S: Assembler messages: crt0.S:70: Error: register expected, not '#(184)' -- `sub sp,#(184)' --->8--- Use canonical version of the subtract mnemonic to avoid those issues. Reported-by: Alexey Smishlayev <alexey@xtech2.lv> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | Merge 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-14-53/+45
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| * | | arm: put .hash, .got.plt and .machine_param back in binariesAlbert ARIBAUD2014-01-14-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some targets will build fine but not boot if sections .hash and .got.plt are not present in the binary. Add them back. Also, Exynos machines require .machine_param section in SPL. Add it. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Tested-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
| * | | mx1ads: remove board supportAlbert ARIBAUD2014-01-14-733/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mini2440: remove board supportAlbert ARIBAUD2014-01-14-301/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | ARM: pxa: Fix OneNAND window access on VPAC270Marek Vasut2014-01-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Access the OneNAND 1KiB window on the VPAC270 as an SRAM instead of accessing it as a burst-RAM. This fixes a problem where the board failed to reboot sometimes as the CPU couldn't start executing from the OneNAND 1KiB window. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
| * | | ARM: pxa: Fix OneNAND SPL buildsMarek Vasut2014-01-13-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation, where we have only the first 1KiB of the OneNAND available upon power-up as a memory-mapped area, from which the CPU starts executing, we place only the most essential code into this first 1KiB . This code copies the rest of the SPL into SRAM and jumps to it. This code is stored in section .text.0 . The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on the SPL, it will preserve only .text section, but the .text.0 and .text.1 are stripped away from the result, thus making the SPL binary empty. The patch adds additional -j parameters to the OBJCOPY for PXA during the SPL build, which will preserve the .text.0 and .text.1 sections. Moreover, this patch also adds missing functions into the .text.0 section, since otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
| * | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-01-10-6629/+14927
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be added to include/configs/exynos5-dt.h now. Conflicts: include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
| | * | | doc: Update the zynq u-boot statusJagannadha Sutradharudu Teki2014-01-10-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated doc/README.zynq to current status Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Enable CONFIG_DEFAULT_DEVICE_TREEJagannadha Sutradharudu Teki2014-01-10-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabled default dts files on respective pre-board config files this is way MAKEALL will works. and it's upto user to build specific dts by specifying at build time. $ make zynq_zc70x_config $ make --> with default dts zynq-zc702.dts or $ make DEVICE_TREE=zynq-zc702 --> Same configuration with zynq-zc706.dts Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | dts: zynq: Add more zynq dts filesJagannadha Sutradharudu Teki2014-01-10-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds initial dts support for supported zynq boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq-common: Enable verified boot(RSA)Jagannadha Sutradharudu Teki2014-01-10-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | gpio: zynq: Add dummy gpio routinesJagannadha Sutradharudu Teki2014-01-10-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO dummy routines are required for fdt build, may be removed these dependencies once the u-boot fdt is fully optimized. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | dts: zynq: Add basic fdt supportJagannadha Sutradharudu Teki2014-01-10-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides a basic fdt support for zynq u-boot. zynq-7000.dtsi-> initial arch dts file zynq-zed.dts -> initial zed board dts file more devices should be added in subsequent patches. u-boot build: once configuring of a board done for building dtb with zynq-zed.dts as an input zynq-uboot> make DEVICE_TREE=zynq-zed Enabled CONFIG_OF_SEPARATE for building dtb separately. There is a new binary called u-boot-dtb.bin which is a u-boot with devicetree supported. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq-common: Define CONFIG_ENV_OVERWRITEJagannadha Sutradharudu Teki2014-01-10-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Defined CONFIG_ENV_OVERWRITE, which allow to overwrite serial baudrate and ethaddr. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq-common: Define flash env. partitionJagannadha Sutradharudu Teki2014-01-10-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Last 128Kb sector of 1Mb flash is defined as u-boot environment partition. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq-common: Change Env. Sector size to 128KbJagannadha Sutradharudu Teki2014-01-10-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changed Env. Sector size from 0x10000 to 128Kb Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq-common: Define default environmentJagannadha Sutradharudu Teki2014-01-10-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Defined default env. for autoboot FIT image from respective boot devices. Default settings: fit_image=fit.itb load_addr=0x2000000 fit_size=0x800000 flash_off=0x100000 nor_flash_off=0xE2100000 Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add support to find bootmodeJagannadha Sutradharudu Teki2014-01-10-2/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add zynq_zc770 xm012 board supportJagannadha Sutradharudu Teki2014-01-10-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM012: - 1GB DDR3 - 64MiB Numonyx NOR flash - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Stefan Roese <sr@denx.de>
| | * | | zynq: Add zynq_zc770 xm013 board supportJagannadha Sutradharudu Teki2014-01-10-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add zynq_zc770 xm010 board supportJagannadha Sutradharudu Teki2014-01-10-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM010: - 1Gb DDR3 - 1Mb SST SPI flash - 128 Mb Quad-SPI Flash - 8 Mb SST SI flash - Full size SD/MMC card cage - 10/100/1000 Ethernet - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add zynq microzed board supportJagannadha Sutradharudu Teki2014-01-10-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MicroZed is a low-cost development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z010-1CLG400C Memory: - 1 GB of DDR3 SDRAM - 128Mb of QSPI flash(S25FL128SAGBHI200) - Micro SD card interface Communication: - 10/100/1000 Ethernet - USB 2.0 - USB-UART User I/O: - 100 User I/O (50 per connector) - Configurable as up to 48 LVDS pairs or 100 single-ended I/O Misc: - Xilinx PC4 JTAG configuration port - PS JTAG pins accessible via Pmod - 33.33 MHz oscillator - User LED and push switch For more info - http://zedboard.org/product/microzed Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: zc70x: Add Catalyst 24WC08 EEPROM config supportJagannadha Sutradharudu Teki2014-01-10-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards. Enable EEPROM support for zc70x boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq-common: Define exact TEXT_BASEJagannadha Sutradharudu Teki2014-01-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Defined TEXT_BASE for u-boot starts from 0x4000000 w.r.t zynq memory-map. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configsJagannadha Sutradharudu Teki2014-01-10-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add zynq zed board supportJagannadha Sutradharudu Teki2014-01-10-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add zynq zc70x board supportJagannadha Sutradharudu Teki2014-01-10-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design. ZC702-: APSOC: - XC7Z020-CLG484-1 Memory: - DDR3 Component Memory 1GB - 16MB Quad SPI Flash - IIC - 1 KB EEPROM Connectivity: - Gigabit Ethernet GMII, RGMII and SGMII. - USB OTG - Host USB - IIC Bus Headers/HUB - 1 CAN with Wake on CAN - USB-UART Video/Display: - HDMI Video OUT - 8X LEDs Control & I/O: - 3 User Push Buttons - 2 User Switches - 8 User LEDs For more info on zc702 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm ZC706-: APSOC: - XC7Z045 FFG900 -2 AP SoC Memory: - DDR3 Component Memory 1GB (PS) - DDR3 SODIM Memory 1GB (PL) - 2X16MB Quad SPI Flash (dual parallel) - IIC - 1 KB EEPROM Connectivity: - PCIe Gen2x4 - SFP+ and SMA Pairs - GigE RGMII Ethernet (PS) - USB OTG 1 (PS) - Host USB - IIC Bus Headers/HUB (PS) - 1 CAN with Wake on CAN (PS) - USB-UART Video/Display: - HDMI 8 color RGB 4.4.4 1080P-60 OUT - HDMI IN 8 color RGB 4.4.4 Control & I/O: - 2 User Push Buttons/Dip Switch, 2 User LEDs - IIC access to GPIO - SDIO (SD Card slot) - 3 User Push Buttons, 2 User Switches, 8 User LEDs For more info on zc706 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | doc: zynq: Add information on zynq u-bootJagannadha Sutradharudu Teki2014-01-10-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Information on zynq u-boot about - zynq boards - mainline status - TODO Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq-common: Rename zynq with zynq-commonJagannadha Sutradharudu Teki2014-01-10-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | zynq.h -> zynq-common.h, zynq-common is Common configuration options for all Zynq boards. zynq.h is no longer exists hense removed from boards.cfg Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add GEM0, GEM1 configs supportJagannadha Sutradharudu Teki2014-01-10-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add UART0, UART1 configs supportJagannadha Sutradharudu Teki2014-01-10-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zynq uart controller support two serial ports like CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Enable cache optionsJagannadha Sutradharudu Teki2014-01-10-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Enable cache command - Turn-off L2 cache - Turn-on D-cache Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Minor config cleanupJagannadha Sutradharudu Teki2014-01-10-37/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanups mostly on: - Add comments - Re-order configs - Remove #define CONFIG_ZYNQ_SDHCI Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Cleanup on memory configsJagannadha Sutradharudu Teki2014-01-10-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup on memory configuration options: - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Cleanup on miscellaneous configsJagannadha Sutradharudu Teki2014-01-10-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup on miscellaneous configurable options: - Rename SYS_PROMPT as "zynq-uboot" - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Enable Boot FreeBSD/vxWorksJagannadha Sutradharudu Teki2014-01-10-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enabled Boot FreeBSD/vxWorks from an ELF image support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Enable CONFIG_FIT_VERBOSEJagannadha Sutradharudu Teki2014-01-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabled fit_format_{error,warning}() Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
generated by cgit v1.1 at 2024-11-09 19:22:20 +0000