summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* MLK-10774-39 imx:mx6qsabreauto update video settingsPeng Fan2015-04-29-7/+91
| | | | | | Update video settings Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-38 imx: fix ecspi codePeng Fan2015-04-29-5/+25
| | | | | | | | | | | This commit 155fa9af95ac5be857a7327e7a968a296e60d4c8 "spi: mxc: fix sf probe when using mxc_spi" introduces "board_spi_cs_gpio" function to discard gpio in CONFIG_SF_DEFAULT_CS for spi flash. Follow this rule to make imx boards work fine. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10467 mtd:spi Add ATMEL AT45DB021E supportPeng Fan2015-04-29-2/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to add atmel AT45DB021E spi flash support. Since this flash is different from the spi flash that we previous use such as m25p32 and spanion spi nor flashes, pieces of code are added. 1. The default page size is 264 bytes, but the mtd/spi framework can not handle such page. So we need to configure the page size from 264 to 256 bytes. Page Size command seq “Power of 2” binary page size (256 bytes)| 3Dh 2Ah 80h A6h DataFlash page size (264 bytes) | 3Dh 2Ah 80h A7h And when probe the flash, configure the flash to 256 bytes page size, if the page size is already 256bytes, just return and do not configure it again. The page size configuration times is only about 10000, so to avoid configuring it each time. 2. Add the flash params in sf_params.c. 3. This flash support 2K block erase, add this flag. 4. The status command is 0xD7, different from others. It's polling status bit is Bit 7 -> 0 Device is busy with an internal operation. -> 1 Device is ready. This patch has been tested on mx7d 19x19 ddr3 arm2 board. And tested on mx7d 12x12 lpddr3 board. All works fine. Note: Since this flash is only 256KB, we can not test spi boot on mx7d 19x19 arm2 board. If want to test this flash, open CONFIG_SYS_USE_SPINOR. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 9b6ac1f82b09d243dc674c780abcacf0e12262c2) Conflicts: drivers/mtd/spi/sf_internal.h drivers/mtd/spi/sf_params.c drivers/mtd/spi/sf_probe.c include/spi_flash.h Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MA-6381 Add HAB support for the whole boot.imgguoyin.chen2015-04-29-25/+73
| | | | | | | | | boot.img includes kernel image, ramdisk img, dtb, and bootargs. All are critical for android security. Protect the whole boot.img with HAB. Signed-off-by: guoyin.chen <guoyin.chen@freescale.com> (cherry picked from commit 8a49e53c5b518677b46cada5df153306161f29ac)
* MLK-10453 mmc: fix possible unintialized ocrPeng Fan2015-04-29-1/+4
| | | | | | | | | | | | This commit ca4113da25b42bce44a2e7998966a47352f11613 "mmc: fix OCR Polling" does not consider cmd structure, and may leave it in uninitialized state. We can directly use op_cond_response here, since until here, op_cond_response already get the OCR value from chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Suggested-by: Ye.Li <B37916@freescale.com> (cherry picked from commit a033d2d43904f27778ee6a44f3e35494f9f72152)
* MLK-10448-7 imx:mx6qpsabreauto add missed macroPeng Fan2015-04-29-1/+4
| | | | | | Add CONFIG_DEFAULT_FDT_FILE macro and PHYS_SDRAM_SIZE. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10448-6 imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board supportYe.Li2015-04-29-1/+388
| | | | | | | | | | | | | | | | | | 1. Add DDR script v1.04 for i.MX6DQP SABREAUTO board. 2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9] and init the enet pll output to 125Mhz. 3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN. Build target: mx6qpsabreauto_config Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit e0b316f071aa17c8e41a50f395346ab9f012e665) Conflicts: board/freescale/mx6qsabreauto/mx6qsabreauto.c boards.cfg
* MLK-10448-5 imx: mx6qp: Enable PRG clock for IPUYe.Li2015-04-29-0/+6
| | | | | | | | | | The i.MX6QP has a PRG module, need to enable its clock for using IPU. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Brown Oliver <B37094@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 089f399ea07db79d6bca8fdc08b442b59eb55feb)
* MLK-10448-4 mx6: hab : Remove the cache issue workaroud in hab for i.MX6QPYe.Li2015-04-29-1/+2
| | | | | | | | | | | Since the i.MX6QP has fixed the issue in boot ROM, so remove the workaround for i.MX6QP. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 96e13b57ead3ed00c3a32c5373c7a2a876947f99) Conflicts: arch/arm/cpu/armv7/mx6/hab.c
* MLK-10448-3 mx6: ccm: Change the clock settings for i.MX6QPYe.Li2015-04-29-20/+57
| | | | | | | | | | | | | | | | Since i.MX6QP changes some CCM registers, so modify the clocks settings to follow the hardware changes. A new CONFIG_MX6QP is introduced here and is used for the CCM difference. At default CONFIG_MX6Q is enabled along with the CONFIG_MX6QP. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 5e4d1537ce9a476c8404126350f05d8976c5aa35) Conflicts: arch/arm/cpu/armv7/mx6/clock.c arch/arm/include/asm/arch-mx6/crm_regs.h include/configs/mx6_common.h
* MLK-10448-2 mx6: L2cache: Enable the double line fill for i.MX6DQPYe.Li2015-04-29-0/+3
| | | | | | | | Since i.MX6DQP has fixed the L2 cache issue, enable the double line fill feature to provide better performance. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit aa8a38edb67d4d1375d10bee9bf46557369fb5c4)
* MLK-10448-1 mx6: Add MX6DQP CPU rev typeYe.Li2015-04-29-2/+10
| | | | | | | | | Add new cpu type for i.MX6DQP and providing a dynamical detecting function. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ccf3b130d71cf3dd9a97d3bb424931bf6bd7e8c0)
* MLK-10446: mx7d_12x12_lpddr3_arm2: Enable 1.8V on PHY ctrlFabio Estevam2015-04-29-2/+0
| | | | | | | | | | Enable 1.8V on PHY control, so that Gigabit PHY operation can be functional. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit a17f1300a1b6d3b46a090baa84ba2fef104a1af6) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-37 imx:mx7d fix qspi probe errorPeng Fan2015-04-29-6/+6
| | | | | | We should use CONFIG_FSL_QSPI, but not CONFIG_QSPI Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-36 mtd: spi: check return value of spi_setup_slavePeng Fan2015-04-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to check value of spi_setup_slave and spi_setup_slave_fdt. If their return value 'bus' is NULL, there is no need to pass it to following spi_flash_probe_tail. If 'bus' is null, the original function flow is as following: spi_flash_probe |->spi_setup_slave |->spi_probe_bus_tail |->spi_flash_probe_slave |->spi_free_slave Alougth check the pointer in spi_free_slave is ok, checking the return value of spi_setup_slave and spi_setup_slave_fdt is better. Before this fix: " => sf probe 0:2 FSL_QSPI: Not a valid cs ! SF: Failed to set up slave data abort pc : [<fff66dcc>] lr : [<fff7628c>] reloc pc : [<87814dcc>] lr : [<8782428c>] sp : fdf4fcf0 ip : e630396c fp : fe0d0888 r10: fffa2538 r9 : fdf4feb8 r8 : 02625a00 r7 : 00000002 r6 : fff94ec0 r5 : 00000000 r4 : 9355553c r3 : 1af0593c r2 : cb3fe030 r1 : fff94eb8 r0 : e59ff018 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... " After this fix: " => sf probe 0:2 FSL_QSPI: Not a valid cs ! Failed to initialize SPI flash at 0:2 " No data abort using this patch. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-35 imx:mx7 use power_init_boardPeng Fan2015-04-29-90/+168
| | | | | | | Upgrade to upstream way, using power_init_board. Add pfuze300 support. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-34 imx:mx7d android fix build errorPeng Fan2015-04-29-0/+2
| | | | | | Add CONFIG_CMD_FASTBOOT Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10445 mmc: fix OCR PollingPeng Fan2015-04-29-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If in mmc_send_op_cond, OCR_BUSY is set in CMD1's response, then state is transfered to Ready state, and there is no need to send CMD1 again. Otherwise following CMD1 will recieve no response, or timeour error from driver such as fsl_esdhc.c. If not into Ready state in previous CMD1, then continue CMD1 command. In mmc_complete_op_cond, we use the value mmc->op_cond_response from mmc_send_op_cond, since there should be no CMD1 command between mmc_send_op_cond and mmc_complete_op_cond Before fixing this, uboot log shows: " CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:8 ARG 0x000001AA MMC_RSP_R1,5,6,7 0x18EC1504 CMD_SEND:55 ARG 0x00000000 MMC_RSP_R1,5,6,7 0x18EC1504 CMD_SEND:0 ARG 0x00000000 MMC_RSP_NONE CMD_SEND:1 ARG 0x00000000 MMC_RSP_R3,4 0x00FF8080 CMD_SEND:1 ARG 0x40300000 MMC_RSP_R3,4 0xC0FF8080 --> Already OCR_BUSY set CMD_SEND:1 ARG 0x40300000 MMC_RSP_R3,4 0x0096850A --> Failed CMD1 MMC init failed " Using this patch, this issue is fixed, emmc can be detected correctly. This issue exists on mx7dsabresd and mx7d_12x12_lpddr3_arm2 board. Upstream Patchwork: https://patchwork.ozlabs.org/patch/451775/ Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit ca4113da25b42bce44a2e7998966a47352f11613) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10391 imx: mx7dsabresd: Fix issues in QSPI supportYe.Li2015-04-29-3/+3
| | | | | | | | | | Change QSPI FLASH vendor config from to MACRONIX, otherwise the flash device can't be recognized. Also change default sf probe parameter to 0:0 which means bus 0, cs 0. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit f250cf69571851eb092252275418daf8de11a68e) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10385-4 imx: mx7dsabresd: Add board codes for NAND flash supportYe.Li2015-04-29-61/+67
| | | | | | | | | | | | | | | Update board codes to support GPMI NAND flash. Since the GPMI NAND needs board rework, it is disabled at default. Two ways to enable GPMI NAND: 1. Define CONFIG_SYS_BOOT_NAND for NAND boot case 2. Modify the line 306 in mx7dsabresd.h from QSPI to NAND. #define CONFIG_SYS_USE_QSPI /* Enable the QSPI flash at default */ to #define CONFIG_SYS_USE_NAND /* Enable the NAND flash at default */ Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 5db03facf3add6a95728bc97ac2300003a103932) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10385-3 imx: mx7: Enable rawnand clock at init for APBH-DMAYe.Li2015-04-29-0/+4
| | | | | | | | For APBH-DMA enabled case, we have to enable rawnand clock for mxs_dma_init. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 42f42939bbd8161ce283a6af326d0f313cc4c36c) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10385-2 imx: nand: Update GPMI NAND driver to support MX7DYe.Li2015-04-29-4/+4
| | | | | | | | Update GPMI NAND driver and BCH head file with definitions for CONFIG_MX7 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 9c50677dac30085742ef216b9f2e19308e123d2b) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10385-1 imx: apbh_dma: Update APBH-DMA for MX7DYe.Li2015-04-29-8/+8
| | | | | | | | Update APBH-DMA driver and head files with definitions for CONFIG_MX7 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 07299056426f1f25aab51ab5531c4846d4c7560f) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10363-3 Android: Add android support for MX7D SABRESD boardYe.Li2015-04-29-0/+166
| | | | | | | | | | | | Enable android fastboot, recovery, booti features for mx7d sabresd board by using new build target: mx7devkandroid_config Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit bfc2b467ddac9c6eccb3f39aad3663a959546b64) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: boards.cfg
* ENGR00315499-19 Fix eMMC fast boot hang issueYe.Li2015-04-29-10/+36
| | | | | | | | | | | | | | | | | | When booting in eMMC fast boot, the uboot v2013.04 always hangs. The root cause is that MMC host does not exit from boot mode after bootrom loading image. So the first command 'CMD0' sent in uboot will pull down the CMD line to low and cause errors. This patch cleans the MMC boot register in "mmc_init" to put the MMC host back to normal mode. Signed-off-by: Ye Li <b37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 2ead2f9501c6d2571e0f5365bd808ed7c73257ef) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: drivers/mmc/fsl_esdhc.c
* MLK-10363-1 udc: Update i.MX udc driver to support MX7Ye.Li2015-04-29-30/+11
| | | | | | | | | Update driver codes and registers define for MX7. Implement udc callback function in MX7 arch. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit e55c4f7bf5a66b34c2d01c42bac667cb3789b0c1) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-33 imx:mx6 add udc and fastboot supportPeng Fan2015-04-29-29/+6767
| | | | | | | | | | | | Add udc and fastboot support We did not use the upstream way. Currently use CI_UDC and USB_GAGDET of upstream can make fastboot work, but lack of flash operation, so we still use our way. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10774-32 imx:mx6slevk inlcude crm_regs.hPeng Fan2015-04-29-0/+1
| | | | | | Add missed included header file crm_regs.h Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-31 lcd: add LCD_MONOCHROMEPeng Fan2015-04-29-11/+54
| | | | | | | | | | | LCD_MONOCHROME is removed in commit f4469f50b0367820121ef2d313517d422ed70e1d. Add related code back to support epdc. In this patch, also include crm_regs.h in mx6slevk.c to make epdc code be compiled ok. COLOR_MASK is also added from commit a7de2953f51e70754190d3516167d58d27d17219 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-30 imx:mx7 dm thermal driver supportPeng Fan2015-04-29-112/+108
| | | | | | Add thermal driver for mx7 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-29 imx:thermal change from CONFIG_IMX6_THERMAL to CONFIG_IMX_THERMALPeng Fan2015-04-29-8/+8
| | | | | | Change macro name to make driver support more platforms. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-28 imx:thermal Fix temperature checking issuePeng Fan2015-04-29-2/+2
| | | | | | | This patch is from commit c83c6cc7dedf9759bf193044ff5c3572d5f6afd2 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10774-27 imx:mx6 fix `Can't find sensor device` for temperaturePeng Fan2015-04-29-0/+10
| | | | | | | Add CONFIG_SYS_MALLOC_F and CONFIG_SYS_MALLOC_F_LEN to support correctly detect temperature sensor. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10774-26 arm:armv7 add imx7Peng Fan2015-04-29-0/+1
| | | | | | Modify Makefile to support MX7 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10215 Add elan init in i.MX6SL-EVK boardHaibo Chen2015-04-29-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | EPDC board contain a elan touch screen, this screen is a i2c slave. If this EPDC board connect to i.MX6SL-EVK board, after uboot boot up, if we do i2c operation, like i2c probe, then the i2c bus block. This is due to the elan touch screen i2c slave. This device needs to do some initialization opearation before its i2c operation, otherwise this i2c device pull down the i2c clk line, and make the i2c bus hang. This means elan needs a special flow on i2c before its address is acked, otherwise the i2c bus will be hang. This patch is a workaround, it add a void function which is defined as a weak symbol in i2c driver, and it is called before every i2c operation. In mx6slevk, this function was overwrite to execute elan initialization. So that, for mx6slevk board, it will initialize elan before every i2c operation, but for other boards, it just work as before. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> (cherry picked from commit 4c587b29c423ce61b2471ed20f31ff533d9d8a39) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: arch/arm/include/asm/arch-mx6/mx6sl_pins.h board/freescale/mx6slevk/mx6slevk.c
* MLK-10370: imx7d-12x12-arm2 imximage: update dcd table for lpddr3Adrian Alonso2015-04-29-14/+22
| | | | | | | | | | | * Update DCD table for lpddr3 @400Mhz * Boot kernel linux and run memtester for memory stress memtester 1G 100000 Signedoff-by: Ye.Li <B37916@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com> (cherry picked from commit 7cbab5830d486733a691be104cbc2be494b00776) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10363-2 imx: mx7: Enable SNVS clockYe.Li2015-04-29-0/+2
| | | | | | | | Enable SNVS clock in clock_init function as default enabled clock. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit df1e45b3098f737d68517c51032472d12fd87666) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10362 imx: mx7dsabresd: Add support for MX7D SABRESD boardPeng Fan2015-04-29-0/+1620
| | | | | | | | | | | | | | | Add i.MX7D SABRESD board BSP codes, with enabled modules: UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX. Build target: mx7dsabresd_config Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 3bf52a153e2964d4fdc17f0e8cb816686cbb6c2b) Conflicts: boards.cfg
* MLK-10361 imx: mx7d arm2: Change to use WDOG_B resetYe.Li2015-04-29-5/+34
| | | | | | | | | | | | | | | | | | | | | The default u-boot reset is a internal WDOG reset (warm reset on i.MX6) which does not have power and DDR reset. So the peripherals and DDR may meet problem. When using the internal WDOG reset on i.MX7D ARM2 boards, we meets two DDR issues: 1. On 12x12 ARM2, sometimes the system may hang in DCD because the DDRC Operating Mode does not become to normal. 2. On 19x19 ARM2, the reset always brings system to USB download because the DDR3 turns to unstable. On the i.MX7D ARM2 board, the WDOG_B signal connects to POR_B or PMIC_PWRON. This gives a chance to use a stronger reset. So in this patch, we set the IOMUX for WDOG_B pin and enable WDOG_B signal output in WDOG WCR register. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 1192501c1fcf3b266eb22639a6bc93ac7c03b367) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10351 imx: mx7d: Add 19x19 DDR3L ARM2 board supportYe.Li2015-04-29-0/+1098
| | | | | | | | | | | | | | | Add BSP codes, configuration head file and build target for 19x19 DDR3L ARM2 board with basic functions: ENET2, I2C, SD/eMMC/MMC, USB, QSPI, ECSPI, pfuze3000 PMIC. Build target: mx7d_19x19_ddr3_arm2_config Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 58fd869e3097b7461fbfae3d94e3ebbd30ae2474) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: boards.cfg
* MLK-10200 imx: mx7: Add M4 booting supportYe.Li2015-04-29-2/+18
| | | | | | | | Implement the auxiliary core booting for Cortex M4 on i.MX7 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit c1c8ba37d87493c16ec1a12bc36d47f909e0e733) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10195 imx: mx7: Fix build warning related to mxs_lcd_initYe.Li2015-04-29-1/+1
| | | | | | | | | | | | | Fix the warning below by adding function declare: drivers/video/mxsfb.c: In function 'mxs_lcd_init': drivers/video/mxsfb.c:92:2: warning: implicit declaration of function 'mxs_set_lcdclk' [-Wimplicit-function-declaration] mxs_set_lcdclk(panel->isaBase, PS2KHZ(mode->pixclock)); Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 615af07d960d9ec17708fb1712b2362dbaeab121) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10191-3 imx: mx7: Add support for i.MX7D 12x12 LPDDR3 ARM2 boardYe.Li2015-04-29-0/+1080
| | | | | | | | | | | | | | | | Add BSP codes, configuration head file and build target for 12x12 LPDDR3 ARM2 board with basic functions: ENET, I2C, SD/eMMC/MMC, USB, LCD Splash screen, QSPI, ECSPI, pfuze3000 PMIC. Note: pmic and video is still not upstream way Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit ac0d51ef07fdec880e6da318c08d521506640efa) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: boards.cfg
* MLK-10191-2 imx: mx7: Add common head file for i.MX7D ARM2 boardsPeng Fan2015-04-29-0/+332
| | | | | | | | Add mx7d_arm2.h for common part of all i.MX7D arm2 boards Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 6cc15cf8c4e1f9a08130c5e232f23af75407fa50) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10191-1 imx: mx7: Add i.MX7 platform common head fileYe.Li2015-04-29-0/+20
| | | | | | | | Add common head file mx7_common.h for all i.MX7 platform Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit e38c9a7a543890e0879f89627a3f404d8068d602) Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10186-2 imximage: support new commandPeng Fan2015-04-29-18/+88
| | | | | | | | | | | | | | | | | Since rom code supports clear bit and check data command, and new ddrc needs such commands, add clear bit and check data command in imximage.c. CHECK_DATA 4 xxxx bit This command is dead loop until bit set at address xxxx. CLR_BIT 4 xxxx bit This command is to clear bit at address xxxx. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 257600d197bf9a58a2b8d08419296aaf901d850d) Conflicts: tools/imximage.c
* MLK-10186-1 imximage: add fixed IVT offset supportYe.Li2015-04-29-0/+10
| | | | | | | | | | | | Since from mx7, we use fixed IVT offset for all boot devices. Introduce a new configuration CONFIG_IMX_FIXED_IVT_OFFSET for this. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 88e0a3552b08627b18d98380a32dbafacb18854b) Conflicts: tools/imximage.h
* MLK-10178-10 mtd:nand:mxs fix potential dcache issuePeng Fan2015-04-29-1/+7
| | | | | | | | | | | DCIMVAC is upgraded to DCCIMVAC for the individual processor (Cortex-A7) that the DCIMVAC is executed on. We should follow the linux dma follow. Before DMA read, first invalidate dcache then after DMA read, invalidate dcache again. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit dddb52ebdc6c4919da0103a364563dbe2c100874)
* MLK-10178-8 mmc:fsl_esdhc fix dcache issuePeng Fan2015-04-29-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | DCIMVAC is upgraded to DCCIMVAC for the individual processor (Cortex-A7) that the DCIMVAC is executed on. We should follow the linux dma follow. Before DMA read, first invalidate dcache then after DMA read, invalidate dcache again. With the DMA direction DMA_FROM_DEVICE, the dcache need be invalidated again after the DMA completion. The reason is that we need explicity make sure the dcache been invalidated thus to get the DMA'ed memory correctly from the physical memory. Any cache-line fill during the DMA operations such as the pre-fetching can cause the DMA coherency issue, thus CPU get the stale data. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> (cherry picked from commit 13cdb96bc52b3079ba91a08c1704307e5598ee59) Conflicts: drivers/mmc/fsl_esdhc.c
* MLK-10178-7 imx:wdog add imx7 supportPeng Fan2015-04-29-1/+1
| | | | | | | | | | Add mx7 in driver/watchdog/Makefile to support watchdog driver for imx7 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 19d698109fd136586b292430989e0f6edb723db6) Conflicts: drivers/watchdog/Makefile
generated by cgit v1.1 at 2024-11-18 08:03:50 +0000