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* omap4: calculate EMIF register valuesAneesh V2011-08-03-10/+977
| | | | | | | | | | | | | | Calculate EMIF register values based on AC timing parameters from the SDRAM datasheet and the DDR frequency rather than using the hard-coded values. For a new board the user doen't have to go through the tedious process of calculating the register values. Instead, just provide the AC timings from the device data sheet as input and the driver will automatically calculate the register values. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add sdram init supportAneesh V2011-08-03-7/+1500
| | | | | | | Add support for the SDRAM controller (EMIF). Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add clock supportAneesh V2011-08-03-0/+1683
| | | | | | | | | | | | | | Add support for: 1. DPLL locking 2. Initialization of clock domains and clock modules 3. Setting up the right voltage on voltage rails This work draws upon previous work done for x-loader by: Santosh Shilimkar <santosh.shilimkar@ti.com> Rajendra Nayak <rnayak@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: add OMAP4430 revision checkAneesh V2011-08-03-8/+97
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: cleanup pin mux dataAneesh V2011-08-03-178/+209
| | | | | | | | | | | | | - separate mux settings into essential and non essential parts - essential part is board independent as of now(so move it to SoC directory). Will help in having single SPL for all boards. - Non-essential part(the pins not essential for u-boot to function) need to be phased out eventually. - Correct mux data by aligning to the latest settings in x-loader Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: utility function to identify the context of hw initAneesh V2011-08-03-1/+82
| | | | | | | | | | | | | | | | The basic hardware init of OMAP4(s_init()) can happen in 4 different contexts: 1. SPL running from SRAM 2. U-Boot running from FLASH 3. Non-XIP U-Boot loaded to SDRAM by SPL 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the Configuration Header feature What level of hw initialization gets done depends on this context. Add a utility function to find this context. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: fix LPSC constantsLaurence Withers2011-08-03-12/+31
| | | | | | | | | | Some of the LPSC constants were incorrect, and some were missing. This commit fixes the incorrect constants (which were not used anywhere in the tree) and adds all constants for both DA830 and DA850, as per the TI datasheets. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: switch an enum to defines for consistencyLaurence Withers2011-08-03-41/+40
| | | | | | | | | | There are two main sets of LPSC constants, depending on the processor family. The DA8xx constants were given in an enum whereas the non-DA8xx constants were preprocessor defines. This commit switches the DA8xx constants to defines for consistency. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: add MMC/SD controller addressesLaurence Withers2011-08-03-0/+2
| | | | | Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci EMAC: declare function for all DA8xx CPUsLaurence Withers2011-08-03-1/+1
| | | | | | | | | | | | The function davinci_emac_mii_mode_sel() is defined in board/davinci/common/misc.c for any DA8xx CPU which has CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board. This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC is enabled. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DA8xx: add generic GPIO driverLaurence Withers2011-08-03-0/+290
| | | | | | | | | | | Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface specified in <asm/gpio.h> . The driver has support for both manipulating GPIO pins as well as automatically configuring the pin multiplexor registers to set the pin function to GPIO. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci: rename gpio_defs.h to gpio.hLaurence Withers2011-08-03-3/+3
| | | | | | | | | In preparation for a generic GPIO driver for the DA8xx processors, rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files which include it. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3evm: eth: Include functions only when necessarySanjeev Premi2011-08-03-0/+2
| | | | | | | | | | | | | These functions are not required when CONFIG_CMD_NET is not defined: - setup_net_chip() - reset_net_chip() - board_eth_init() This patch wraps them in #ifdef CONFIG_CMD_NET...#endif Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3evm: Update ethernet reset sequence for Rev.G boardSriramakrishnan2011-08-03-9/+26
| | | | | | | | | | | | The GPIO pin used for resetting the external LAN chip has changed for Rev.G board. The patch uses generic gpio API instead of direct access to corresponding registers. Signed-off-by: Sriramakrishnan <srk@ti.com> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3evm: eth: split function setup_net_chipSanjeev Premi2011-08-03-1/+12
| | | | | | | | | | | In current implementation, the function sets up the ethernet chip and resets it. The steps to reset depend upon the board revision. The patch moves the reset actions to new function reset_net_chip(). Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Include array definition only when it is usedSanjeev Premi2011-08-03-0/+3
| | | | | | | | | | | | The array of strings corresponding to cpu revision is used only when CONFIG_DISPLAY_CPUINFO is selected - in the function print_cpuinfo(). Enclose definition of this array in #ifdef...#endif for the same. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcWolfgang Denk2011-08-02-12/+1
|\ | | | | | | | | * 'master' of git://git.denx.de/u-boot-mmc: Revert "AT91:mmc:fix multiple read/write error"
| * Revert "AT91:mmc:fix multiple read/write error"Andy Fleming2011-07-28-12/+1
| | | | | | | | | | | | | | | | | | This reverts commit c310fc840472a36e4b9d2505830e9dc8d458d63c. The Atmel custodian had apparently rejected this patch's approach in another thread, so this patch reverts it for now. Signed-off-by: Andy Fleming <afleming@freescale.com>
* | sf: macronix: disable write protection when initializingSimon Guinot2011-08-02-0/+42
| | | | | | | | Signed-off-by: Simon Guinot <sguinot@lacie.com>
* | sf: spansion: add support for S25FL129P_64KShaohui Xie2011-08-02-0/+9
| | | | | | | | | | Signed-off-by: Shaohui Xie <b21989@freescale.com> Cc: Mike Frysinger <vapier@gentoo.org>
* | mtd/spi/macronix.c: add MX25L4005 and MX25L8005Macpaul Lin2011-08-02-0/+16
| | | | | | | | | | | | | | | | | | Add support of MX25L4005 and MX25L8005 according to the datasheet http://www.mct.net/download/macronix/mx25l8005.pdf This patch has been tested with MX25L4005 and MX25L8005 Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2011-08-02-7/+7
|\ \ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ppc4xx: net/4xx: Install interrupt handler after driver registration
| * | net/4xx: Install interrupt handler after driver registrationStefan Roese2011-07-28-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only install der 4xx-EMAC interrupt handlers *after* the core network driver is registered. This problem was noticed on the APM Taishan 440GX board, where the board hung upon bootup after displaying "Net:". Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2011-08-02-462/+904
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-blackfin: Blackfin: jtag-console: fix timer usage Blackfin: switch to common display_options() Blackfin: serial: move early debug strings into .rodata section Blackfin: adi boards: also set stderr to nc with helper Blackfin: update anomaly lists to latest public info Blackfin: serial: convert to bfin_{read,write} helpers Blackfin: split out async setup Blackfin: adi boards: enable pretty flash progress output Blackfin: drop unused dma.h header from start code Blackfin: portmux: allow header to be included in assembly files Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: enable mmc_spi support Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update network settings Blackfin: sync MMR read/write helpers with Linux Blackfin: gpio: optimize free path a little Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDR Blackfin: uart: fix printf warning Blackfin: add init.elf helper code Blackfin: dont reset SWRST on newer bf526 parts Blackfin: adi boards: enable multi serial support by default Blackfin: uart: add multiple serial support Blackfin: uart: move debug buffers into local bss
| * | | Blackfin: jtag-console: fix timer usageMike Frysinger2011-07-12-2/+2
| | | | | | | | | | | | | | | | | | | | Reported-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: switch to common display_options()Mike Frysinger2011-07-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use common code to output the version string rather than doing it ourselves. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: serial: move early debug strings into .rodata sectionMike Frysinger2011-07-12-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite the assembly serial_early_puts() helper to place the strings in the .rodata section rather than embedding them directly in the .text section. Using .text is a little simpler, but it doesn't let people execute out of internal L1 sram (since core reads don't work on those regions). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: adi boards: also set stderr to nc with helperMike Frysinger2011-07-12-1/+2
| | | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: update anomaly lists to latest public infoMike Frysinger2011-07-12-221/+335
| | | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: serial: convert to bfin_{read,write} helpersMike Frysinger2011-07-12-17/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the serial struct declares the sizes for us, no need to hardcode them in the accessor functions. Let the bfin_{read,write} helpers do it for us. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: split out async setupMike Frysinger2011-07-12-50/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We really only need to tweak the async banks in the initcode if the processor is booting out of it, otherwise we can wait until later on in the CPU booting setup. This also makes testing in the sim and early bring up over JTAG work much smoother when the initcode gets bypassed. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: adi boards: enable pretty flash progress outputMike Frysinger2011-07-12-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For only ~150 bytes increase in size, we can get a nice flash progress indicator rather than just the boring dots (which don't tell too much about overall progress). So enable it for all ADI boards. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: drop unused dma.h header from start codeMike Frysinger2011-07-12-1/+0
| | | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: portmux: allow header to be included in assembly filesMike Frysinger2011-07-12-0/+4
| | | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: enable mmc_spi supportHarald Krapfenbauer2011-07-12-3/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These boards have an mmc/sd slot on them connected over SPI, so enable the driver. Signed-off-by: Harald Krapfenbauer <harald.krapfenbauer@bluetechnix.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update network settingsHarald Krapfenbauer2011-07-12-47/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These boards can have an addon card plugged onto them, so enable support for it. Signed-off-by: Harald Krapfenbauer <harald.krapfenbauer@bluetechnix.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: sync MMR read/write helpers with LinuxMike Frysinger2011-07-12-46/+42
| | | | | | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: gpio: optimize free path a littleMike Frysinger2011-07-12-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we aren't doing resource tracking, the gpio_free() function is a stub that simply returns, so pull this logic up a level and make it an inline stub in the header. Now we don't have to waste time at any of the call sites. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDRMike Frysinger2011-07-12-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the default post word location to an L1 data location for all Blackfin parts so things "just work" for most people. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: uart: fix printf warningMike Frysinger2011-07-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The code uses %i to printf a size_t when it should use %zu, otherwise we get a warning from gcc about it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: add init.elf helper codeMike Frysinger2011-07-12-2/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This creates a standalone ELF that executes just the Blackfin initcode. This is useful for people who want to program the low level aspects of the CPU (memory/clocks/etc...) and can easily be used with JTAG for quick booting while developing. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: dont reset SWRST on newer bf526 partsMike Frysinger2011-07-12-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The bug in the BF526 rom when doing a software reset exists only in older silicon versions, so don't clear SWRST on newer parts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: adi boards: enable multi serial support by defaultMike Frysinger2011-07-12-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Since this only adds less than 3KiB, enable for all ADI boards. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: uart: add multiple serial supportMike Frysinger2011-07-12-55/+222
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This brings CONFIG_SERIAL_MULTI support to the Blackfin on-chip UARTs. Ends up adding only ~512bytes per additional UART. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: uart: move debug buffers into local bssMike Frysinger2011-07-12-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no need for these saved buffers to be global symbols, or in the data section. So mark them static to move them into the bss. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2011-08-02-10/+56
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mips: README: update MIPS related informations MIPS: make cache operation mode configurable MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG MIPS: INCA-IP: rename inca-swap-bytes host tool
| * | | | README: update MIPS related informationsDaniel Schwierzeck2011-07-31-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Amend section 'Directory Hierarchy' for current MIPS directory. Describe config options for MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
| * | | | MIPS: make cache operation mode configurableDaniel Schwierzeck2011-07-31-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the cache operation mode is hard-coded to CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs which operate at a different mode. This patch makes the cache operation mode configurable via board config. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
| * | | | MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFGDaniel Schwierzeck2011-07-31-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This define is a board-specific config option and should be renamed to follow the U-Boot naming convention. Additionally, add an explaining comment for this option. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
| * | | | MIPS: INCA-IP: rename inca-swap-bytes host toolDaniel Schwierzeck2011-07-31-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The INCA-IP SoC belongs to the Lantiq XWAY SoC product portfolio. For the upcoming support of other Lantiq SoC devices this tool should not solely depend on the INCA-IP board. Rename the tool to xway-swap-bytes and add an config option to enable compilation optionally. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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