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* MLK-12693-1 nand: mxs: fix the bitflips for erased page when uncorrectable errorPeng Fan2017-04-05-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is porting from linux: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768 " We may meet the bitflips in reading an erased page(contains all 0xFF), this may causes the UBIFS corrupt, please see the log from Elie: ----------------------------------------------------------------- [ 3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes ... [ 4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815 [ 4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383 [ 4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383 ----------------------------------------------------------------- This patch does a check for the uncorrectable failure in the following steps: [0] set the threshold. The threshold is set based on the truth: "A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH do the ECC." For the sake of safe, we will set the threshold with half the gf_len, and do not make it bigger the ECC strength. [1] count the bitflips of the current ECC chunk, assume it is N. [2] if the (N <= threshold) is true, we continue to read out the page with ECC disabled. and we count the bitflips again, assume it is N2. (We read out the whole page, not just a chunk, this makes the check more strictly, and make the code more simple.) [3] if the (N2 <= threshold) is true again, we can regard this is a erased page. This is because a real erased page is full of 0xFF(maybe also has several bitflips), while a page contains the 0xFF data will definitely has many bitflips in the ECC parity areas. [4] if the [3] fails, we can regard this is a page filled with the '0xFF' data. " Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit ceb324a2914487aa517a6c70a06a20b5e3438fda)
* MLK-12603: mtd: gpmi: may use legacy bch geometry in u-bootHan Xu2017-04-05-0/+13
| | | | | | | | | | | | provide one config "CONFIG_NAND_MXS_BCH_LEGACY_GEO" to keep using legacy bch geometry. NOTICE: the feature must be enabled/disabled in both u-boot and kernel. Signed-off-by: Han Xu <han.xu@nxp.com> (cherry picked from commit 0abc9c182c24f88522bd74fa1b53cd2fa3477184) (cherry picked from commit 772af34b1216acc8e6a1a3faf43fef7c90b26a2f) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12214 NAND:apbh_dma: Fix logically dead code issueYe.Li2017-04-05-3/+3
| | | | | | | | | | | The list_first_entry always assumes the list is not empty, it won't return NULL pointer when the list is empty. So the "if (pdesc == NULL)" becomes a dead code. Fix the issue by calling the list_empty before the list_first_entry. (Coverity CID 29934) Signed-off-by: Ye.Li <ye.li@nxp.com> (cherry picked from commit ff3923f294cc2e15f436d7520b4042736b1b48a6)
* MLK-11718-2: mtd: nand: change the BCH layout setting for large oob NANDHan Xu2017-04-05-38/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | The cod change updated the NAND driver BCH ECC layout algorithm to support large oob size NAND chips(oob > 1024 bytes). Current implementation requires each chunk size larger than oob size so the bad block marker (BBM) can be guaranteed located in data chunk. The ECC layout always using the unbalanced layout(Ecc for both meta and Data0 chunk), but for the NAND chips with oob larger than 1k, the driver cannot support because BCH doesn’t support GF 15 for 2K chunk. The change keeps the data chunk no larger than 1k and adjust the ECC strength or ECC layout to locate the BBM in data chunk. General idea for large oob NAND chips is 1.Try all ECC strength from the minimum value required by NAND spec to the maximum one that works, any ECC makes the BBM locate in data chunk can be chosen. 2.If none of them works, using separate ECC for meta, which will add one extra ecc with the same ECC strength as other data chunks. This extra ECC can guarantee BBM located in data chunk, of course, we need to check if oob can afford it. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit 78f620a6d6ab44bd34e42f00abe4673db099ca73)
* ENGR00315894-60 GPIO: Modify driver mxc_gpio to support RDC SemaphoresYe.Li2017-03-14-0/+53
| | | | | | | | | | | | | | | | | | | | | | For GPIO group which shared by multiple masters, it may set in RDC to shared and semaphore required. Before access the GPIO register, the GPIO driver must get the RDC semaphore, and release the semaphore after the GPIO register access. When CONFIG_MXC_RDC is set, the features related to RDC semaphores is enabled in mxc_gpio driver. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 84d63e2e2ce12f714e88baad8b2325684614a7c1) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Conflicts: drivers/gpio/mxc_gpio.c (cherry picked from commit c9943b9c8a78bb2c9886bfe582e82978387d8dee) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit faf94726cac8316c4342e19936f1e03ef283ace3) (cherry picked from commit 6c0474fe0e4fc543c62b22c05c2702a881f56418)
* MLK-12416-10: mx6ul: Add comments for BEEPeng Fan2017-03-14-0/+3
| | | | | | | Add comments for enabling BEE. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit e5cc58b71e28b2bb3c66fbe8af373cff31eb3017)
* MLK-11528 imx: mx6ul check fuse before init beePeng Fan2017-03-14-1/+11
| | | | | | | | | | | | Need to check fuse bit 25 of bank 0 word 4 before initialize bee. The bit: 0 means bee enabled, 1 means bee disabled. If disabled, continuing initialize bee will cause system hang, so need to check this bit before initialize bee. Add macro to enable BEE in header file, default disabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit ef4cb7c53418e4e1dd7cfcb7c6974cfea77ef3c0)
* MLK-10958 imx: mx6ul support Bus Encryption EnginePeng Fan2017-03-14-1/+513
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to support Bus Encryption Engine(BEE) for i.MX 6UL. Supported feature: 1. SNVS key and soft key 2. CTR and ECB mode 3. Specify address region to bee. Two commands are included: bee init [key] [mode] [start] [end] - BEE block initial "Example: bee init 1 1 0x80000000 0x80010000\n" bee test [region] "Example: bee test 1\n" Mapping: [0x10000000 - (0x10000000 + size - 1)] : [start - (start + size - 1)] [0x30000000 - (0x30000000 + IRAM_SIZE - 1)] : [IRAM_BASE_ADDR - (IRAM_BASE_ADDR + IRAM_SIZE - 1)] Whatever start is, start - (start + size -1) will be fixed mapping to 0x10000000 - (0x10000000 + size - 1) Since default AES region's protected size is SZ_512M, so on mx6ul evk board, you can not simply run 'bee init', it will overlap with uboot execution environment, you can use 'bee init 0 0 0x80000000 0x81000000'. If want to use bee, Need to define CONFIG_CMD_BEE in board configuration header file, since CONFIG_CMD_BEE default is not enabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 29b9bdbbdac9678dba9b7bc2d3662598e9c548a5) (cherry picked from commit 6d45292ff7e7020a48842f033f8a337daabe4476)
* MLK-13335 mx6sl: Fix build break for all i.MX6SL boardsYe Li2017-03-14-2/+2
| | | | | | | | | Since the UART1 register base name is changed from UART1_IPS_BASE_ADDR to UART1_BASE to align with other i.MX6 chips. Should update the board configuration header file with the new name. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 18019b8f4b65d3261db6488e416eae66a6500316)
* MLK-12416-4: imx: mx6: update imx-regs.hPeng Fan2017-03-14-13/+119
| | | | | | | Update imx-regs.h to align with 2016.03 Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 9bbd54e44ae1f0868d3f0dd34975e76606b0a5e8)
* MLK-13440-5 fsl_usdhc: Remove the CONFIG_SYS_FSL_ESDHC_FORCE_VSELECTYe Li2017-03-14-4/+0
| | | | | | | | | | Since we have added the "vs18_enable" parameter for fixed 1.8v I/O, remove the CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT. This configuration can only work with one MMC device. If more devices are supported, this will set 1.8v to all controllers, so will cause problem to 3.3v devices. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit c1de6a58e44f4770b32a41e3689884abf7449e1b)
* MLK-13440-4 warp: Replace CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT by using ↵Ye Li2017-03-14-2/+1
| | | | | | | | | | vs18_enable parameter Change to use the new way to set the vs18_enable field to 1 for fixed 1.8v I/O eMMC. Don't use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT any longer. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit c1bf2d975be66597f8fc25c9eef0f02bda3c5050)
* MLK-13440-1: fsl_usdhc: Add configuration parameter for using fixed 1.8V I/OYe Li2017-03-14-0/+21
| | | | | | | | | | | | | | | | | | When using eMMC with 1.8V I/O, we have to set the VSELECT bit at this USDHC controller setup and init. The CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT has problem that it will apply to all USDHC controllers and it only set the 1.8V at init phase. So if user does not select to the eMMC device, the voltage on the I/O pins are not correct. This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg structure and priv data, so each controller can have different settings. The default value is 0 for 3.3V, which is compatible with current codes. When setting this value to 1, at USDHC setup and init phase the driver will set the VSELECT bit. For DM driver, the vqmmc-supply property will be searched for current usdhc node. If the vqmmc-supply is set to 1800000 uV, the vs18_enable in priv data will be set to 1. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit ebd872f491af27c38a0698d226222ea5093c563c)
* MLK-14423-2 gpio: 74x164: make oe-pins optionalPeng Fan2017-03-14-2/+1
| | | | | | | Make oe-pins optional because some boards have fixed it to enable. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14423-1 spi: kconfig: add soft spi Kconfig entryPeng Fan2017-03-14-0/+6
| | | | | | | | Add the Kconfig entry for SOFT_SPI which uses gpio to simulate the SPI signals. We use it for accessing 74x164 on some i.MX boards. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14422 imx7d: wdog: Overwrite the reset_cpu to turn off internal reset signalYe Li2017-03-14-0/+15
| | | | | | | | Set wdog WCR register SRS bit to turn off internal reset signal WDOG_RESET_B_DEB for mx7d. So that the warm reset is disabled. The WDA is cleared to output WDOG_B immediately to reset the board. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-11035 imx: mx6 update thermal slope factorsPeng Fan2017-03-14-2/+2
| | | | | | | | | | | | | | | | | | | | | From temp sensor guys: " I confirmed the math with him(had do the accuracy study) today. The new, final equation is: Tmeas = (Nmeas - n1) / slope + t1 + offset n1= fused room count t1= 25 offset=3.580661 slope= 0.4148468 – 0.0015423*n1 " 87723f903454aaf17336e0fe9098ea7911c19f3c update the thermal with not accurate slope parameters. This patch fix it. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 0d4904f5929cecd66f0b60cf8ebdcb0e6a2f733e)
* MLK-10827 imx: mx6 update thermal driver according new equationPeng Fan2017-03-14-17/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From IC guys: " After a thorough accuracy study of the Temp sense circuit, we found that with our current equation, an average part can read 7 degrees lower than a known forced temperature. We also found out that the standard variance was around 2C; which is the tightest distribution that we could create. We need to change the temp sense equation to center the average part around the target temperature. Old Equation: Temp = Troom,cal – slope*(Count measured – Count room fuse) Where Troom,cal = 25C and Slope = 0.4297157 – (0.0015974 * Count room fuse) New Equation: Temp = Troom,cal – slope*(Count measured – Count room fuse) +offset Where Troom,cal = 25C and Slope = 0.4445388 – (0.0016549 * Count room fuse) Offset = 3.580661 " According the new equation, update the thermal driver. c1 and c2 changed to u64 type and update comments. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 87723f903454aaf17336e0fe9098ea7911c19f3c) (cherry picked from commit 3392203fc3ae2f0701461143094cfbb112f7bc04)
* MLK-14420-3 mx6qsabresd: Update mx6qsabresd to enable OF_CONTROL and DM driversYe Li2017-03-14-5/+77
| | | | | | | | | Modify and remove configurations conflicts with DM drivers from head file. Enable DM drivers and OF_CONTROL in defconfig. Also update the GPIO usage to call gpio_request before any gpio using, and update power_init_board since the PMIC APIs are changed in Pfuze DM driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14420-2 DTS: add DTS file for imx6q sabresd boardYe Li2017-03-14-0/+1123
| | | | | | Copy the dts and dtsi files from kernel to support imx6q sabresd board. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14420-1 DTS: Update imx6qdl relevant dts and clock definitionsYe Li2017-03-14-478/+512
| | | | | | Get the latest dtsi files and clock.h for imx6qdl from kernel Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14421 imx: Add pfuze pmic common init for DM pmic driverYe Li2017-03-14-2/+97
| | | | | | | Since the DM pmic driver has changed the driver API, add a new file pfuze_dm.c for common pfuze100 init. Signed-off-by: Ye Li <ye.li@nxp.com>
* Prepare v2017.03Tom Rini2017-03-13-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* scripts/config_whitelist.txt: RegenerateTom Rini2017-03-13-64/+0
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* configs: Re-syncTom Rini2017-03-13-1189/+1154
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: omap-common: Fix typo in CONFIG_OMAP54XX guardMatthijs van Duin2017-03-11-1/+1
| | | | | | | | Some initialization was unintentionally being skipped on omap5. Fixes: f5af0827f276 ("arm: omap-common: Guard some parts of the code with CONFIG_OMAP44XX/OMAP54XX") Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* tools: binman: change shebang from python into python2Jörg Krause2017-03-11-1/+1
| | | | | | | This tool does not work with Python 3. Change the shebang to make sure the script is run by a Python 2 interpreter. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
* arm: OMAP2+: nandecc: propagate error to command return statusLadislav Michl2017-03-11-20/+16
| | | | | | | | | Currently nandecc returns zero even if underlaying omap_nand_switch_ecc function fails. Fix that by propagating error returned to command return value. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'pmic' of git://git.denx.de/u-boot-mmcTom Rini2017-03-09-1/+1
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| * sunxi: power: axp809.c: Fix aldo1-2 being disabled for mvolt != 0Rask Ingemann Lambertsen2017-03-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The execution flow is currently like this for aldo_num == 1 or 2: int axp_set_aldo(int aldo_num, unsigned int mvolt) { ... if (mvolt == 0) return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1, AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1)); ... return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1, AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1)); } I.e. aldo1 and aldo2 will always be disabled. This patch fixes it by setting (rather than clearing) the enable bit when mvolt != 0. Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk> Fixes: 795857df413a ("sunxi: power: add AXP809 support")
* | ARM: Migrate errata to KconfigTom Rini2017-03-09-122/+85
| | | | | | | | | | | | | | | | | | This moves all of the current ARM errata from various header files and in to Kconfig. This allows for a minor amount of cleanup as we had some instances where both a general common header file was enabling errata as well as the board config. We now just select these once at the higher level in Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
* | omap4: Migrate to using implyTom Rini2017-03-09-36/+12
| | | | | | | | | | | | | | Move the default y options under arch/arm/mach-omap2/omap4/Kconfig to be using imply instead in arch/arm/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
* | omap3: Migrate to using implyTom Rini2017-03-09-33/+11
| | | | | | | | | | | | | | Move the default y options under arch/arm/mach-omap2/omap3/Kconfig to be using imply instead in arch/arm/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
* | TI: Migrate board/ti/common/Kconfig to implyTom Rini2017-03-09-82/+39
| | | | | | | | | | | | | | The option that we had set in board/ti/common/Kconfig as default y are best done with imply under the appropriate main Kconfig option instead. Signed-off-by: Tom Rini <trini@konsulko.com>
* | am335x_evm: Switch to using imply keywordTom Rini2017-03-09-9/+3
| | | | | | | | | | | | | | | | These particular SPL options are part of what the ROM provides, but for compatibility with how we have previously used them, move them to being implied by the board being selected. Signed-off-by: Tom Rini <trini@konsulko.com>
* | kconfiglib.py: Kludge in 'imply' supportTom Rini2017-03-09-5/+6
| | | | | | | | | | | | | | | | | | Currently upstream does not yet understand the imply keyword. For what we use kconfiglib.py for today, this is OK. We only need to be able to evaluate in order to make boards.cfg and none of those choices will depend on how imply evaluates out. Signed-off-by: Tom Rini <trini@konsulko.com>
* | do_smhload: fix return codeRyan Harkin2017-03-09-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | do_smhload was using a ulong to store the return value from smh_load_file. That returns an int, where -1 indicates an error. As a ulong will never be negative, smh_load_file errors were not detected and so_smhload always returned zero. Also, when errors were spotted, do_smhload was returning 1, rather than the enumeration CMD_RET_FAILURE (which is also 1). Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
* | Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigsTom Rini2017-03-09-41/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases this is absolutely required, so select this for some secure features. This also requires migration of RSA_FREESCALE_EXP Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Saksham Jain <saksham.jain@nxp.freescale.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* | tools: Remove CONFIG_SYS_TEXT_BASE in MakefilePatrick Delaunay2017-03-09-1/+0
| | | | | | | | | | | | | | | | | | This define is not used in tools sources and can be removed to avoid unnecessary link between tools and defconfig Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | kbuild: turn of dtc unit address warnings by defaultMasahiro Yamada2017-03-09-1/+12
|/ | | | | | | | | | | | | | DTC 1.4.2 or later checks DT unit-address without reg property and vice-versa, and generates lots of warnings. Fixing DT files will take for a while. Until then, let's turn off the check unless building with W=*. Introduce a new helper dtc-option to check if the option is supported in order to suppress warnings on older versions. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2017-03-08-5/+5
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| * video: cfb_console: fix 32-bit display on 64-bit architecturesAndre Przywara2017-03-07-5/+5
| | | | | | | | | | | | | | | | | | | | | | "unsigned long" is a lousy data type when it comes to match peripheral hardware registers with a fixed size. Just do the obvious and match a 32-bit display format with an "u32" data type for casting. This fixes the logo display on 64-bit architectures, which produced a black line on the right side of the logo with non-black backgrounds. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2017-03-08-1/+1
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| * | net: zynq_gem: Fix masking of supported phydev featuresNathan Rossi2017-03-07-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the zynq_gem driver initializes the phy it sets the supported features that the phy can support and advertise. However instead of masking the supported features such that it limits the available features it sets the phy to have the exact supported features of the zynq_gem. This is problematic as it will enable features that a phy does not have or cannot advertise. Specifically this appears as an issue when using a phy that is only capable of 10/100, but the zynq_gem driver will override this and try to enable and advertise 10/100/1000. Reported-by: Arno Steffens <star@gmx.li> Fixes: 80243528ef ("net: gem: Fix gem driver on 1Gbps LAN") Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Tested-by: Arno Steffens <star@gmx.li> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
* | omap3_logic: Move SPL Stack into SDRAMAdam Ford2017-03-08-0/+3
|/ | | | | | | | | | | | | | | | A previous patch broke the board. This patch will add missing part from the previous patch and also move the SPL Stack into SDRAM at 0x82000000. Tested with GCC 4.8.2 and GCC 6.2 Fixes: 0959649dc6d9 ("omap3_logic: Switch to simple malloco in SPL") Signed-off-by: Adam Ford <aford173@gmail.com> Changes in V2: - Keep CONFIG_SPL_SYS_MALLOC_SIMPLE - Add CONFIG_SYS_MALLOC_F_LEN=0x2000 (8 MB)
* net: macb: Fix ETH not found when clock not supportWenyou Yang2017-03-01-4/+9
| | | | | | | | | | | | | For the boards such as smartweb on which the clock driver isn't supported, the ethernet fail to be found when booting up with the below log. ---8<--- Net: No ethernet found. --->8--- Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* armv8: spl: Call spl_relocate_stack_gd for ARMv8Philipp Tomsich2017-03-01-2/+12
| | | | | | | | | | As part of the startup process for boards using the SPL, we need to call spl_relocate_stack_gd. This is needed to set up malloc with its DRAM buffer. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* armv5te: make 'ret lr' produce iinterworking 'bx lr'Albert ARIBAUD2017-03-01-1/+1
| | | | | | | | | | | | | | | | | Current ARM assembler helper for the 'return to caller' pseudo-instruction turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain in its current ARM state even when the routine doing the 'ret' was called from Thumb-1 state, triggering an undefined instruction exception. This causes early run-time failures in all boards compiled using the Thumb-1 instruction set (for instance the Open-RD family). ARMv5TE supports 'bx lr' which properly implements interworking and thus correctly returns to Thumb-1 state from ARM state. This change makes 'ret lr' turn into 'bx lr' for ARMv5TE. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* Prepare v2017-rc3Tom Rini2017-02-27-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: mach-omap2: Flush cache after FIT post-processing imageAndrew F. Davis2017-02-27-0/+6
| | | | | | | | | | After we authenticate/decrypt an image we need to flush the caches as they may still contain bits of the encrypted image. This will cause failures if we attempt to jump to this image. Reported-by: Yogesh Siraswar<yogeshs@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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