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* LG Optimus Black (P970) codename sniper supportPaul Kocialkowski2015-08-12-0/+758
| | | | | | | | | | | | | | | | | | | | The LG Optimus Black (P970) codename sniper is a smartphone that was designed and manufactured by LG Electronics (LGE) and released back in 2011. It is using an OMAP3630 SoC GP version, which allows running U-Boot and the U-Boot SPL from the ground up. This port is aimed at running an Android version such as Replicant, the fully free Android distribution. However, support for upstream Linux with device-tree and common GNU/Linux distros boot commands could be added in the future. For more information about the journey to freeing this device, please read the series of blog posts at: http://code.paulk.fr/article20/a-hacker-s-journey-freeing-a-phone-from-the-ground-up-first-part Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Add CONFIG_OF_SUPPORT] Signed-off-by: Tom Rini <trini@konsulko.com>
* omap3: Reboot mode supportPaul Kocialkowski2015-08-12-0/+45
| | | | | | | | | | | | | | Reboot mode is written in scratchpad memory before reboot in the form of a single char, that is the first letter of the reboot mode string as passed to the reboot function. This mechanism is supported on OMAP3 both my the upstream kernel and by various TI kernels. It is up to each board to make use of this mechanism or not. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* input: twl4030: Keypad scan and inputPaul Kocialkowski2015-08-12-0/+42
| | | | | | | | | | | This allows scanning the twl4030 keypad, storing the result in a 64-byte long matrix with the twl4030_keypad_scan function. Detecting a key at a given column and row is made easier with the twl4030_keypad_key function. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* input: TWL4030 input support for power button, USB and chargerPaul Kocialkowski2015-08-12-0/+64
| | | | | | | This adds support for detecting a few inputs exported by the TWL4030. Currently-supported inputs are the power button, USB and charger presence. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl4030: Power off supportPaul Kocialkowski2015-08-12-8/+84
| | | | | | | | | | This adds support for powering off (the omap3 SoC) from the twl4030. This is especially useful when the kernel does not actually power off the device using this method but reboots and leaves it up to the bootloader to actually turn the power off. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* lpc32xx: devkit3250: add spl build supportVladimir Zapolskiy2015-08-12-0/+124
| | | | | | | | | | | | The change adds SPL build support to Timll DevKit3250 board, the generated SPL image can be uploaded over UART5, JTAG or stored on NAND. SPL is designed to load U-boot image from NAND. All new NAND chip defines in board configuration are needed by SPL NAND "simple" framework, the framework is used to reduce potentially duplicated code from LPC32xx SLC NAND driver. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* lpc32xx: devkit3250: update of board configurationVladimir Zapolskiy2015-08-12-6/+120
| | | | | | | | | | | | This change adds more peripherals to Timll DevKit3250 board, namely MAC and SMSC phy, SLC NAND, GPIO, SPI and I2C. Also the default serial console is changed to UART5, added an option to pass device tree blob by means of bootm, predefined environment variables are slightly extended and reserved space on NAND to store user defined U-boot environment. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
* nand: lpc32xx: add SLC NAND controller supportVladimir Zapolskiy2015-08-12-0/+186
| | | | | | | | | | | | | | | | | | | | | The change adds support of LPC32xx SLC NAND controller. LPC32xx SoC has two different mutually exclusive NAND controllers to communicate with single and multiple layer chips. This simple driver allows to specify NAND chip timings and defines custom read_buf()/write_buf() operations, because access to 8-bit data register must be 32-bit aligned. Support of hardware ECC calculation is not implemented (data correction is always done by software), since it requires a working DMA engine. The driver can be included to an SPL image. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
* spl: nand: simple: replace readb() with chip specific read_buf()Vladimir Zapolskiy2015-08-12-2/+5
| | | | | | | | | | | | | | | Some NAND controllers define custom functions to read data out, respect this in order to correctly support bad block handling in simple SPL NAND framework. NAND controller specific read_buf() is used even to read 1 byte in case of connected 8-bit NAND device, it turns out that read_byte() may become outdated. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Tom Rini <trini@konsulko.com> Cc: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
* image: fix Android ramdisk support when dtb is specifiedRob Herring2015-08-12-10/+8
| | | | | | | | | If a dtb is specified on the command-line, the Android boot image ramdisk will not be found. Fix this so that we can specify the ramdisk address and dtb address. The syntax is to enter the Android boot image address for both the kernel and ramdisk. Signed-off-by: Rob Herring <robh@kernel.org>
* JFFS2: Use merge sort when parsing filesystemMark Tomlinson2015-08-12-35/+69
| | | | | | | | | | | | | When building the file system the existing code does an insertion into a linked list. It attempts to speed this up by keeping a pointer to where the last entry was inserted but it's still slow. Now the nodes are just inserted into the list without searching through for the correct place. This unsorted list is then sorted once using mergesort after all the entries have been added to the list. This speeds up the scanning of the flash file system considerably. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* JFFS2: Use CLEANMARKER to reduce scanning timeMark Tomlinson2015-08-12-0/+25
| | | | | | | | | | | | If a sector has a CLEANMARKER at the beginning, it indicates that the entire sector has been erased. Therefore, if this is found, we can skip the entire block. This was not being done before this patch. The code now does the same as the kernel does when encountering a CLEANMARKER. It still checks that the next few words are FFFFFFFF, and if so, the block is assumed to be empty, and so is skipped. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* JFFS2: Change scansize to match linux kernelMark Tomlinson2015-08-12-1/+1
| | | | | | | | | | | | The scan code is similar to the linux kernel, but the kernel defines a much smaller size to scan through before deciding a sector is blank. Assuming that what is in the kernel is OK, make these two match. On its own, this change makes no difference to scanning of any sectors which have a clean marker at the beginning, since the entire sector is not blank. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* JFFS2: Optimize building lists during scanMark Tomlinson2015-08-12-4/+21
| | | | | | | If the flash is slow, reading less from the flash into buffers makes the process faster. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* JFFS2: Improve speed reading flash filesMark Tomlinson2015-08-12-6/+21
| | | | | | | | | | | | | | jffs2_1pass_read_inode() would read the entire data for each node in the filesystem, regardless of whether it was part of the file to be loaded or not. By only reading the header data for an inode, and then reading the data only when it is found to be part of the file to be loaded, much copying of data is saved. jffs2_1pass_list_inodes() read each inode for every file in the directory into a buffer. By using NULL as a buffer pointer, NOR flash simply returns a pointer, and therefore avoids a memory copy. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* JFFS2: Only list each directory entry onceMark Tomlinson2015-08-12-5/+33
| | | | | | | | | | | | | If multiple versions of a file exist, only the most recent version should be used. The scheme to write 0 for the inode in older versions did not work, since this would have required writing to flash. The only time this caused an issue was listing a directory, where older versions of the file would still be seen. Since the directory entries are sorted, just look at the next entry in the list, and if it's the same move to that entry instead. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* JFFS2: Speed up and fix comparison functionsMark Tomlinson2015-08-12-40/+47
| | | | | | | | | | | | | | | Copying complete nodes from flash can be slow if the flash is slow to read. By only reading the data needed, the sorting operation can be made much faster. The directory entry comparison function also had a two bugs. First, it did not ensure the name was copied, so the name comparison may have been faulty (although it would have worked with NOR flash). Second, setting the ino to zero to ignore the entry did not work, since this was either writing to a temporary buffer, or (for NOR flash) directly to flash. Either way, the change was not remembered. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* JFFS2: Return early when file read not necessaryMark Tomlinson2015-08-12-0/+6
| | | | | | | | | If a destination is not provided, jffs2_1pass_read_inode() only returns the length of the file. In this case, avoid reading all the data nodes, and return as soon as the length of the file is known. Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
* arm: bcmcygnus: Enable Ethernet supportJiandong Zheng2015-08-12-0/+22
| | | | | | | | Enable BCM SF2 ethernet and PHY for BCM Cygnus SoC Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* arm, at91: support for sam9260 based smartweb boardHeiko Schocher2015-08-12-0/+561
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | add support for the at91sam9260 based board smartweb from siemens. SPL is used without serial support, as this SoC has only 4k sram for running SPL. Here a U-Boot bootlog: RomBOOT > U-Boot 2015.07-rc2-00109-g4ae828c (Jun 15 2015 - 09:31:16 +0200) CPU: AT91SAM9260 Crystal frequency: 18.432 MHz CPU clock : 198.656 MHz Master clock : 99.328 MHz Watchdog enabled DRAM: 64 MiB WARNING: Caches not enabled NAND: 256 MiB In: serial Out: serial Err: serial Net: macb0 Hit any key to stop autoboot: 0 U-Boot> Signed-off-by: Heiko Schocher <hs@denx.de>
* nand, atmel: remove udelay in spl_nand_erase_one()Heiko Schocher2015-08-12-2/+0
| | | | | | | | remove unneeded udelay() in this function, as we use the dev_ready pin. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* spl, common, serial: build SPL without serial supportHeiko Schocher2015-08-12-11/+40
| | | | | | | | | This patch enables building SPL without CONFIG_SPL_SERIAL_SUPPORT support. Signed-off-by: Heiko Schocher <hs@denx.de> [trini: Ensure we build arch/arm/imx-common on mx28] Signed-off-by: Tom Rini <trini@konsulko.com>
* port vexpress to use distro boot commandsDennis Gilmore2015-08-12-17/+17
| | | | | | | | remove options defined in the distro defaults add distro bot commands set scriptaddr value Signed-off-by: Dennis Gilmore <dennis@ausil.us>
* Move setting CONFIG_BOOTP_VCI_STRING to before including the vexpress-common ↵Dennis Gilmore2015-08-12-3/+3
| | | | | | header Signed-off-by: Dennis Gilmore <dennis@ausil.us>
* PXE: if a board has set its own value for CONFIG_BOOTP_VCI_STRING do not set ↵Dennis Gilmore2015-08-12-0/+6
| | | | | | the default one. Use the board set value instead Signed-off-by: Dennis Gilmore <dennis@ausil.us>
* ARM: highbank: remove DRAM bank setupRob Herring2015-08-12-7/+2
| | | | | | | | | | | On the highbank platform the SoC's management controller firmware will probe the DRAM modules and populates the initial device tree with the correct values. Therefore the memory sizes in the DT are already correct, so remove U-Boot's DRAM bank setup so the memory node is not "fixed up" by u-boot. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Andre Przywara <osp@andrep.de>
* dm: pmic: max77686: Correct two typos in a commentSimon Glass2015-08-12-2/+2
| | | | | | These were pointed out in review but I missed them. Signed-off-by: Simon Glass <sjg@chromium.org>
* power: regulator: max77686 correct variable typePeng Fan2015-08-12-8/+8
| | | | | | | | | The return type of pmic_read and pmic_write is signed int, so correct variable 'ret' from type unsigned int to int. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com>
* fsl: common: pfuze: no use original pfuze code if DM_PMICPeng Fan2015-08-12-0/+2
| | | | | | | | | | | | If enable DM PMIC and REGULATOR, we should not use original power framework. So need to comment out the pfuze code for original power framework, when CONFIG_DM_PMIC_PFUZE100 defined. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* power: regulator: add pfuze100 supportPeng Fan2015-08-12-4/+597
| | | | | | | | | | | | | 1. Add new regulator driver pfuze100. * Introduce struct pfuze100_regulator_desc for maintaining info for one regulator. 2. Add new Kconfig entry DM_REGULATOR_PFUZE100 for pfuze100. 3. This driver intends to support PF100, PF200 and PF3000. 4. Add related macro definition in pfuze header file. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
* power: pmic: pfuze100 support driver modelPeng Fan2015-08-12-0/+1
| | | | | | | | | | | | | 1. Support driver model for pfuze100. 2. Introduce a new Kconfig entry DM_PMIC_PFUZE100 for pfuze100 3. This driver intends to support PF100, PF200 and PF3000, so add the device id into the udevice_id array. 4. Rename PMIC_NUM_OF_REGS macro to PFUZE100_NUM_OF_REGS. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* power: regulator: update comments for regulator-namePeng Fan2015-08-12-11/+9
| | | | | | | | | | We do not need that "regulator-name" property must be provided in dts. If "regulator-name" property is not provided in dts, node name will chosen for settings '.name' field of uc_pdata. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
* power: regulator use node name when no regulator-namePeng Fan2015-08-12-1/+3
| | | | | | | | | If there is no property named 'regulator-name' for regulators, choose node name instead, but not directly return failure value. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
* power: pfuze100 correct SWBST macro definitionPeng Fan2015-08-12-4/+4
| | | | | | | | | | According to datasheet, SWBST_MODE starts from bit 2 and it occupies 2 bits. So SWBST_MODE_MASK should be 0xC, and SWBST_MODE_xx should be ([mode] << 2). Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-dmTom Rini2015-08-10-3/+28
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| * dm: serial: Add a REQUIRE_SERIAL_CONSOLE option for boards with no serial portHans de Goede2015-08-10-3/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the serial code assumes that there is always at least one serial port (and panics / crashes due to null pointer dereferences when there is none). This makes it impossible to use u-boot on boards where there is no (debug) serial port, because e.g. all uart pins are muxed to another function. This commit adds a CONFIG_REQUIRE_SERIAL_CONSOLE Kconfig option, which defaults to y (preserving existing behavior), which can be set to n on such boards to make them work. This commit only implements this for CONFIG_DM_SERIAL=y configs, as allowing running without a serial port for CONFIG_DM_SERIAL=n configs is non trivial, and is not necessary at this moment. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-08-08-94/+786
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| * sunxi: display: Add composite video out supportHans de Goede2015-08-08-24/+191
| | | | | | | | | | | | | | | | | | | | Add composite video out support. This only gets enabled on the Mele M3 for now, since that is were it was tested. It will be enabled on more boards after testing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Add support for interlaced modesHans de Goede2015-08-08-13/+22
| | | | | | | | | | | | | | | | Add support for interlaced modes, this is a preparation patch for adding composite out support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Add a few extra register and constant definesHans de Goede2015-08-08-10/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a few extra sunxi display registers and constant defines. Also rename some existing defines (e.g. dropping _GCTRL) and make some more generic (e.g. dropping the 2x scaling from SUNXI_LCDC_TCON1_TIMING_V_TOTAL). This is a preparation patch for adding composite video out support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Correct clk_delay calculations for lcd displaysHans de Goede2015-08-08-4/+7
| | | | | | | | | | | | | | We should only subtract 2 from the vblank time when using tcon1. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Replace #ifdef-ery with helper functionsHans de Goede2015-08-08-34/+56
| | | | | | | | | | | | | | | | | | | | | | | | All the #ifdef-ery in selecting the default and fallback monitor type is becoming unyielding and makes the code hard to read, replace it with a few helper functions. This will also be useful with the upcoming CHIP board which has display adapter daughterboards which should be runtime detectable. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Enable musb in host mode on the Jesurun Q5Hans de Goede2015-08-08-0/+2
| | | | | | | | | | | | | | | | The Jesurun Q5 has the musb hooked up to an usb-a receptacle, enable it in host-only mode. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Do not add a stdout-path alias to dts on boards without a serial portHans de Goede2015-08-08-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not add a bogus (pointing to a non existing serial port) stdout-path alias to dts on boards without a serial port. Note that we still define CONS_INDEX as this is used by the SPL where we do not use DM_SERIAL and thus CONFIG_REQUIRE_SERIAL_CONSOLE is not honored. We are getting away with this because the sun5i die actually has an uart0, which in the A13 package is not routed to the outside, so we are simply sending SPL bootup messages to the tx pin at the edge of the die, and they go no further from there... And sofar we only have one A13 board which does not have a serial port, all others do have a serial port. This kinda makes sense since the A13 is a much lower pincount package compared to all the other sunxi SoCs. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Add CONFIG_USB0_ID_DET setting to 2 more tabletsHans de Goede2015-08-08-0/+2
| | | | | | | | | | | | | | | | Now that we have code to check the id-pin and detect usb-host adapters plugged into the otg port that way, enable it on the tablets which I own. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: usb-phy: Never power off the usb portsHans de Goede2015-08-08-14/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB devices are not really designed to get the power bounced off and on at them. Esp. USB powered harddisks do not like this. Currently we power off the USB ports both on a "usb reset" and when booting the kernel, causing the usb-power to bounce off and then back on again. This patch removes the powering off calls, fixing the undesirable power bouncing. Note this requires some special handling for the OTG port: 1) We must skip the external vbus check if we've already enabled our own vbus to avoid false positives 2) If on an usb reset we no longer detect that the id-pin is grounded, turn off vbus as that means an external vbus may be present now Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: nand: Add board configuration optionsPiotr Zierhoffer2015-08-08-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When SPL_NAND_SUNXI option is selected in config, set some configuration options for sunxi NAND. This commit also introduces the configurable options in Kconfig. Signed-off-by: Peter Gielda <pgielda@antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Karol Gugala <kgugala@antmicro.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: nand: Add basic sunxi NAND driver for SPL with DMA supportPiotr Zierhoffer2015-08-08-0/+354
| | | | | | | | | | | | | | | | | | | | | | | | | | This driver adds NAND support to SPL. It was tested on Allwinner A20. Signed-off-by: Peter Gielda <pgielda@antmicro.com> Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Signed-off-by: Karol Gugala <kgugala@antmicro.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: nand: Add pinmux and clock settings for NAND supportKarol Gugala2015-08-08-0/+30
| | | | | | | | | | | | | | | | | | | | To enable NAND flash in sunxi SPL, pins 0-6, 8-22 and 24 on port C are configured. Signed-off-by: Karol Gugala <kgugala@antmicro.com> Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Enable USB DRC on Wexler TAB7200Aleksei Mamlin2015-08-08-0/+5
| | | | | | | | | | | | | | | | Enable the otg/drc usb controller on the Wexler TAB7200 tablet. Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
generated by cgit v1.1 at 2024-11-09 05:33:04 +0000