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* sf: add struct spi_flash.sector_size parameterRichard Retanubun2011-04-12-64/+30
| | | | | | | | | | | | | | | This patch adds a new member to struct spi_flash (u16 sector_size) and updates the spi flash drivers to start populating it. This parameter can be used by spi flash commands that need to round up units of operation to the flash's sector_size. Having this number in one place also allows duplicated code to be further collapsed into one common location (such as erase parameter and the detected message). Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: atmel: undo unification of status pollingMike Frysinger2011-04-11-2/+29
| | | | | | | | The AT45 flashes are completely different (at the command set and status register level) from all other SPI flashes, so we can't unify their logic with common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: punt unused spi_flash_region structMike Frysinger2011-04-11-5/+0
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ftwdt010_wdt: support faraday ftwdt010 watchdogMacpaul Lin2011-04-11-0/+206
| | | | | | | | Faraday ftwdt010 watchdog is an architecture independant watchdog. It is usually used in SoC chip design. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* mp2usb: remove board supportEric BĂ©nard2011-04-11-945/+0
| | | | | | | this board was cancelled long time ago so remove it as it won't be maintained anymore Signed-off-by: Eric Bénard <eric@eukrea.com>
* ppc, mgcoge: add DIP switch detectionAndreas Huber2011-04-11-0/+23
| | | | | | | | | This reads the DIP switch on mgcoge. The DIP switch is connected to the BFTICU (0x40000089) FPGA. If the DIP switch is set the environment variable 'actual_bank' is set to 0 and starts the SW in bank0. Signed-off-by: Andreas Huber <andreas.huber@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* arm, keymile: remove unneeded codeHolger Brunck2011-04-11-7/+0
| | | | | | | | On first HW versions the BOCO FPGA was behind a MUX device. These HW versions are not supported anymore. And therefore this code can be removed, it is already unused. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* Net: Add Intel E1000 82574L PCIe card supportRoy Zang2011-04-11-8/+32
| | | | | | | | | Add Intel E1000 82574L PCIe card support. Test on MPC8544DS and MPC8572 board. Add the missing contact information for future support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* PowerPC: Add support for -msingle-pic-baseJoakim Tjernlund2011-04-11-12/+127
| | | | | | | | | | | | | -msingle-pic-base is a new gcc option for ppc and it reduces the size of my u-boot with 6-8 KB. While at it, add -fno-jump-tables too to save a few more bytes. -msingle-pic-base will be in gcc 4.6, however backported patches are available at http://bugs.gentoo.org/show_bug.cgi?id=347281 Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* PowerPC: Move -fPIC flag to common placeJoakim Tjernlund2011-04-11-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | The -fPIC flag belongs with -mrelocatable, move it there. Also change -fPIC to -fpic as this produces smaller binaries. However, currently -mrelocatable promotes -fpic to -fPIC, a fix for this is in upcoming gcc 4.6 or you can apply this small patch to gcc: diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h index 8da8410..e4b8280 100644 --- a/gcc/config/rs6000/sysv4.h +++ b/gcc/config/rs6000/sysv4.h @@ -227,7 +227,8 @@ do { \ } \ \ else if (TARGET_RELOCATABLE) \ - flag_pic = 2; \ + if (!flag_pic) \ + flag_pic = 2; \ } while (0) #ifndef RS6000_BI_ARCH -- Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* ea20: fix undefined PHY_* errorsBen Gardiner2011-04-11-3/+3
| | | | | | | | | | | This patch fixes ea20 after 8ef583a0351590a91394499eb5ca2ab8a703d959 where the u-boot custom PHY_ macros were replaced with those of linux/mii.h MII_ definitions except in the RMII support for davinci_emac. Probably also due to the merge path of changes in 2010.12. Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca> CC: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* ea20: fix libea20.o not foundBen Gardiner2011-04-11-1/+1
| | | | | | | | | | This patch fixes ea20 after commit 6d8962e814c15807dd6ac5757904be2a02d187b8 where $(obj)lib$(BOARD).a was changed to $(obj)lib$(BOARD).o in almost all the Makefiles except ea20, probably due to merge path of the changes in 2010.12. Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca> CC: Sebastien Carlier <sebastien.carlier@gmail.com> Acked-by : Stefano Babic <sbabic@denx.de>
* bootm: replace blob_start with image_startLei Wen2011-04-11-1/+1
| | | | | | | | | | | For uImage always has a 64 bytes header, we couldn't expect to do the xip from the header but should xip from the image start. The latter logic in that section is also move the image from image_start to the load address, so sync this logic to the xip operation. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify read functionsMike Frysinger2011-04-11-157/+22
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify erase functionsMike Frysinger2011-04-11-335/+83
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify status polling for ready bitMike Frysinger2011-04-11-283/+81
| | | | | | | | All of the spi flash drivers implement the status register polling for detecting the device ready state, so unify them all in a new helper function -- spi_flash_wait_ready. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify read/write helpersMike Frysinger2011-04-11-48/+19
| | | | | | | These functions largely do the same exact thing, so unify them all into one basic function. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-04-10-159/+394
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| * powerpc/85xx: Removed clearing of L2-as-SRAMFabian Cenedese2011-04-10-7/+0
| | | | | | | | | | | | | | | | Removed clearing of L2 cache as SRAM as it is not necessary without ECC. This also speeds up the booting process. Signed-off-by: Fabian Cenedese <cenedese@indel.ch> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl_esdhc: Deal with watermark level register related changesPriyanka Jain2011-04-10-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark level register description has been changed: 9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00 25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00 Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add PBL boot from SPI flash support on P4080DSShaohui Xie2011-04-10-2/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as 1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from CPC after PBL completes RCW and PBI phases. Signed-off-by: Chunhe Lan <b25806@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Update default hwconfig on P1022DSJiang Yutang2011-04-10-0/+1
| | | | | | | | | | | | | | | | Set default configuration to have SDHC controller enabled, AUDIO enabled(codec clock sources is 12MHz) and disable TDM. Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support usb2/etsec and tdm/audio pin multiplex on P1022DSJiang Yutang2011-04-10-11/+79
| | | | | | | | | | | | | | | | | | | | | | For soc which have pin multiplex relation, some of them can't enable simultaneously. This patch add environment var 'hwconfig' content defination for them. you can enable some one function by setting environment var 'hwconfig' content and reset board. Detail setting please refer doc/README.p1022ds Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Enable support for ATI graphics cards on P1022DSJiang Yutang2011-04-10-0/+16
| | | | | | | | | | | | | | Make the support for ATI graphics cards mutually exclusive with DIU. Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * p4080ds: remove rev1-specific code for the SERDES8 erratumTimur Tabi2011-04-10-59/+47
| | | | | | | | | | | | | | | | Remove the SERDES8 erratum work-around code that only applied to P4080 rev1, which is not supported by this version of U-Boot. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * p4080ds: add README.p4080ds which documents the "serdes" hwconfig optionTimur Tabi2011-04-10-0/+32
| | | | | | | | | | | | | | | | | | Add documentation for the "serdes" hwconfig option, which is used to specify the status of SerDes banks two and three for the SERDES8 erratum work-around. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Drop CONFIG_VIDEO support on corenet_ds boardsKumar Gala2011-04-09-23/+0
| | | | | | | | | | | | | | | | We don't really ever use Video cards on corenet_ds style boards and its bloating our image which is close the its max size. Drop support and also kill some defines for non-PNP PCI which we never use. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: rename NAND prefixes to CONFIG_SYSMatthew McClintock2011-04-08-41/+41
| | | | | | | | | | | | | | | | | | | | renaming 85xx define CONFIG_NAND_OR_PRELIM to CONFIG_SYS_NAND_OR_PRELIM and CONFIG_NAND_BR_PRELIM to CONFIG_SYS_NAND_BR_PRELIM to use the more appropriate CONFIG_SYS prefix as well as be consistent with 83xx. Signed-off-by: Matthew McClintock <msm@freescale.com> cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add some defines & registers in immap_85xx.hZhao Chenhui2011-04-05-1/+6
| | | | | | | | | | | | | | | | | | * Added SDHCDCR register to GUR struct * Added SDHCDCR_CD_INV define related to SDHCDCR * Added Pin Muxing define related to TDM on P102x Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add P1021 specific QE and UEC supportHaiying Wang2011-04-05-11/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | P1021 has some QE pins which need to be set in pmuxcr register before using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and UCC5 in Eth mode. QE9 and QE12 are set for MII management. QE12 needs to be released after MII access because QE12 pin is muxed with LBCTL signal. Also added relevant QE support defines unique to P1021. The P1021 QE is shared on P1012, P1016, and P1025. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: don't init SDRAM when CONFIG_SYS_RAMBOOTZhao Chenhui2011-04-05-0/+12
| | | | | | | | | | | | Signed-off-by: Zhao Chenhui <b35336@freescale.com> Acked-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2011-04-10-0/+16
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| * | nios2: reset cfi flash before reading envThomas Chou2011-04-08-0/+16
| |/ | | | | | | | | | | | | | | | | | | Flash might be in unknown state when u-boot is started with jtag. And got wrong env data. So reset it in board early init. We cannot use generic cfi flash routines, because flash_init() is not run yet. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2011-04-10-4930/+8203
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| * | Blackfin: bf526-ezbrd: get MAC from flashMike Frysinger2011-04-08-12/+17
| | | | | | | | | | | | | | | | | | The MAC address is stored in the last flash sector rather than OTP. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf518f-ezbrd: get MAC from flashMike Frysinger2011-04-08-14/+17
| | | | | | | | | | | | | | | | | | The MAC address is stored in the last flash sector rather than OTP. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf548-ezkit: move env sectorMike Frysinger2011-04-08-1/+1
| | | | | | | | | | | | | | | | | | | | | U-Boot itself takes up more than 0x40000 bytes, so we can't use that sector for the environment. Move it down a page. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: replace "bfin_reset_or_hang()" with "panic()"Kyle Moffett2011-04-08-19/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bfin_reset_or_hang function unnecessarily duplicates the panic() logic based on CONFIG_PANIC_HANG. This patch deletes 20 lines of code and just calls panic() instead. This also makes the following generic-restart conversion patch simpler. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: adi boards: enable CONFIG_MONITOR_IS_IN_RAMMike Frysinger2011-04-08-0/+2
| | | | | | | | | | | | | | | | | | Our monitor is always in RAM, so enable this define for the CFI layer. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bfin_sdh: add support for multiblock operationsSonic Zhang2011-04-08-4/+5
| | | | | | | | | | | | | | | | | | | | | Don't forget to count full data size for the multiblock operation request. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bfin_sdh: set all timer bits before transferCliff Cai2011-04-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The timer register is 32bits, not 16bit, so 0xFFFF won't fill it. Write out -1 to make sure to fill the whole thing. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: adi boards: enable ldrinfoMike Frysinger2011-04-08-0/+1
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: ldrinfo: new commandMike Frysinger2011-04-08-0/+194
| | | | | | | | | | | | | | | | | | Simple command to decode/check an LDR image before we try to boot it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bootldr: use common definesMike Frysinger2011-04-08-13/+8
| | | | | | | | | | | | | | | | | | | | | Now that the common bootrom.h sets up defines for us, switch to them rather than our own local set. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bootrom.h: sync with toolchainMike Frysinger2011-04-08-27/+59
| | | | | | | | | | | | | | | | | | We need the updated LDR bit defines for our LDR utils. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: adi boards: drop old ELF defineMike Frysinger2011-04-08-1/+0
| | | | | | | | | | | | | | | | | | This define isn't used anywhere anymore, so punt it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf506f-ezkit: new board portMike Frysinger2011-04-08-0/+185
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: default to L1 bank A when L1 bank B does not existMike Frysinger2011-04-08-3/+7
| | | | | | | | | | | | | | | | | | | | | Some parts lack Bank B in L1 data, so have the linker script fall back to Bank A when that happens. This way we can still leverage L1 data. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: turn off caches when self initializingMike Frysinger2011-04-08-12/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When bootstrapping ourselves on the fly at runtime (via "go"), we need to turn off the caches to avoid taking software exceptions. Since caches need CPLBs and CPLBs need exception handlers, but we're about to rewrite the code in memory where those exception handlers live, we need to turn off caches first. This new code also encourages a slight code optimization by storing the MMR bases in dedicated registers so we don't have to fully load up the pointer regs multiple times. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: only check for os log when we have external memoryMike Frysinger2011-04-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | If the part has no external memory configured, then there will be no os log for us to check, and any attempt to access that memory will trigger hardware errors. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
generated by cgit v1.1 at 2024-12-13 21:42:54 +0000