| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
|
|
| |
This patch adds support for A320 evaluation board from Faraday. This board
uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM.
FA526 is an ARMv4 processor and uses the ARM920T source in this patch.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
|
|
|
|
|
|
| |
This patch adds an FTRTC010 driver for Faraday A320 evaluation board.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
|
|
|
|
|
|
| |
This patch enables NAND on the DM6467 EVM
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
|
|
|
|
|
|
|
|
|
|
| |
Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits
Signed-off-by: Nishanth Menon <nm@ti.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Micron DDR timings based on:
http://www.sakoman.net/cgi-bin/gitweb.cgi?p=x-load-omap3.git;a=blob;f=include/asm/arch-omap3/mem.h;h=e6fbfe3947f5d0d85fea776e30821d4017316d86;hb=HEAD
Introduce Micron DDR timings and provide
CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config
options to allow for platform files to setup their timings as
per the type of DDR selected
Reported-by: Steve Sakoman in http://www.nabble.com/forum/Permalink.jtp?root=25779518&post=25959734&page=y
Signed-off-by: Nishanth Menon <nm@ti.com>
|
|
|
|
|
|
| |
Remove SDP referenced unused defines
Signed-off-by: Nishanth Menon <nm@ti.com>
|
|
|
|
|
|
|
|
|
| |
Integrate DA830 EVM support into U-Boot.
Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum
Digital EVM board. See http://www.spectrumdigital.com/
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add new directory for da830evm board
Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum
Digital EVM board. See http://www.spectrumdigital.com/
Provides:
Initial boot and configuration.
Support for i2c.
UART support (console).
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
See http://www.ti.com
Provides:
Low level initialisation.
System clock API.
Timer control.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
|
|
|
|
|
|
|
|
|
|
|
| |
Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
See http://www.ti.com
The DA8xx devices are similar to DaVinci devices but have a differing
memory map and updated peripheral versions.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
|
|
|
|
|
|
|
|
| |
Creates a method allowing pin settings to be logically grouped into data
structure arrays and provides an API to configure the pinmux settings to
enable the relevant pin functions.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
|
|
|
|
|
|
|
| |
Remove volatiles and memory mapped structure accesses and replace with
readl and writel macro usage.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When the board is booted without serial cable attached (which
is how most of them will be used) UART RX is left floating and
sometimes picks noise, which interrupts countdown and enters
U-Boot prompt instead of booting the kernel.
Fix this by setting up internal pullup on UART RX pin. This
does not prevent serial from working as the internal pullup
is weak.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
|
|
|
|
|
|
|
|
|
|
| |
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Fix stack_setup to place the stack on the correct address in DRAM
accroding to U-Boot standard and remove conditional compilation by
CONFIG_MEMORY_UPPER_CODE macro that is not necessry. This macro
was introduced and used only by this board for some unclear reason.
The definition of this macro is also removed because it's not
referenced elsewhere.
Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Tested-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
| |
Because of Frame error, Parity error and Overrun error are occured only receive
operation, need to masking when error checking.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Cleans up the s3c24x0 header files:
s4c24x0.h: removes the use of 'volatile' from the S3C24X0_REG8,
S3C24X0_REG16 and S3C24X0_REG32 register typedef's. Registers are always
accessed using the IO accessor functions which cast the register address
as 'volatile' anyway so it isn't required here.
s3c2400.h and s3c2410.h: insert a blank line between the static inline
functions
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
|
|
|
|
|
|
|
| |
This patch moves the s3c64xx header files from include/
to include/asm-arm/arch-s3c64xx
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.
checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:
ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch
As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.
The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:
WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8 S3C24X0_REG8;
+typedef volatile u16 S3C24X0_REG16;
+typedef volatile u32 S3C24X0_REG32;
I'll fix these errors in another patch.
Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
|
|
|
|
|
|
|
|
|
|
| |
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with
repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 156171c71a0dc4bce12b4408bb1591f8fe32dc1a
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
value
The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in
two banks for a total of 512MB of RAM. Based on this configuration
the existing values for SDRAM address control register are incorrect
and result in random kernel oops as memory is incorrectly accessed
(while for example extracting a large tarball such as a rootfs).
Based on the hardware configuration along with the supporting
documentation from Marvell these are the correct values, as
well this change mimics values previously used in Marvell's own
u-boot git tree for the SheevaPlug.
Other variants of the hardware such as the PogoPlug and TonidoPlug
may have different memory configurations but to properly support
those additional board directories should be maintained or a better
system to support other kwb*.cfg is needed.
Tested on SheevaPlug DevKit.
Signed-off-by: Mark Asselstine <mark.asselstine@windriver.com>
|
|
|
|
|
|
|
| |
Void function was returning 0 in the m41t94 rtc driver.
This makes it similar to m41t62 rtc driver.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
|
|
|
|
|
|
|
|
| |
From http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
Commit id 0996391139f43d032335b5360db11da62a2cbb39
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This patch cleans up the PPC4xx I2C intrastructure:
- Use C struct to describe the I2C registers instead of defines
- Coding style cleanup (braces, whitespace, comments, line length)
- Extract common code from i2c_read() and i2c_write()
- Remove unneeded IIC defines from ppc405.h & ppc440.h
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |
| |
| |
| |
| |
| | |
This code got included accidentally.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|/
|
|
|
|
|
|
| |
While hard_i2c support is not available
(see http://lists.denx.de/pipermail/u-boot/2009-March/049751.html),
this patch enables soft_i2c on AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
These commands are only enabled when the hush shell is enabled and can
be useful in scripts such as:
while true do
echo "Booting OS...";
run $bootcmd;
echo "Booting OS failed";
sleep 10;
done
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
|
|
|
|
|
|
|
| |
Shorten the overly-verbose help message of 'help' and clean up some
redundant ifdefery while we're at it.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
|
|
|
|
|
|
|
| |
command.c should contain common code related to commands, not
miscellaneous command implementations.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| | |
This patch adds support for NAND devices with a page size of
4K in the DaVinci NAND driver. The layout matches the layout that TI uses
for 4K page size NAND devices in the kernel NAND driver.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
|
| |
| |
| |
| |
| |
| |
| |
| | |
This patch add nand_read_buf() for S3C2410 NAND SPL.
In nand_spl/nand_boot.c, nand_boot() will check nand->select_chip,
so nand->select_chip should also be initialized.
Signed-off-by: Hui.Tang <zetalabs@gmail.com>
|
| |
| |
| |
| |
| |
| |
| | |
This patch updates a check condition in the NAND driver.
The check condition is similat to what is in linux/next.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| | |
NANDs with page size of lesser than and equal to 2K are
reaching EOL. They are bing replaced with NANDs of
page size 4K and above.
To support this we have to extend the eccpos field
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
|
|\ \ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This patch shrinks the PMC440 u-boot binary (from next branch)
to fit into 384kB again.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This is not the sequoia board.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
The latest changes in the u-boot/next branch increased the size of the
alpr image a bit more. Now it doesn't fit into the 256k reserved for it.
This patch now removes the commands "askenv" and "irq" which are not
needed in the production systems.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This patch removes the duplicted implementations of the pci_master_init()
function by introducing a weak default function for it. It can be
overridden by a board specific version.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |/
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This patch removes the duplicted implementations of the pci_target_init()
function by introducing a weak default function for it. This weak default
has a different implementation for 440EP(x)/GR(x) PPC's. It can be
overridden by a board specific version (e.g. PMC440, korat).
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
|
|/
|
|
|
|
|
|
|
|
| |
Add support to use second and third I2C bus, too.
Bus 0 is still the default, but by calling i2c_set_bus_num(1/2) before doing
I2C accesses, code can switch to bus 1 and 2, too. Don't forget to switch
back afterwards, then.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
|
|\ |
|
| |\ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Make smc911x_initialize return -1 on error and number of interfaces
detected otherwise.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
When the smc911x driver was converted to NET_MULTI, the smc911x eeprom was
missed. The config option needed updating as well as overhauling of the
rergister read/write functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
|
| |\ \ |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
We were incorrectly use the max CAM size as the number of entries in
the array for setting up the addrmap. We should be using the NENTRY
field which is the low 12-bits of TLB1CFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| | |/
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
commit 1542fbdeec0d1e2a6df13189df8dcb1ce8802be3
introduced one new bug to chip-select interleaving.
Single DDR controller also can do the chip-select
interleaving if there is dual-rank or qual-rank DIMMs.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|