summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* powerpc/85xx: remove SERDES4 soft-reset work-aroundTimur Tabi2011-07-11-22/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a bank soft-reset after the bank was configured and enabled, even though enabling a bank causes it to reset. Because the reset was required for multiple errata, it was not properly enclosed in an #ifdef, and so was not removed with all the other rev1 errata work-arounds. Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if bank 2 is enabled, but this was not being done for SERDES protocols 0xF and 0x10. The bank reset also happened to enable bank 3 (apparently an undocumented feature). Simply removing the reset breaks these two protocols. It turns out that every time we call enable_bank(), we do want at least one lane of the bank enabled, either because the bank is supposed to be enabled, or because we need the clock from that bank enabled. For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we call enable_bank(), because that array is used elsewhere to determine if the bank is available. Note that the side effect of these changes is that the work-arounds for these two errata are now linked. Specifically, if SERDES-A001 is enabled, then we need SERDES-8 enabled as well. Because this was the only SERDES bank soft-reset, there is no need to implement a work-around for erratum SERDES-A003. Also fix an off-by-one error in a printf(). Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Ed Swarthout <swarthou@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8xxx: Allow override DDR read-to-write turnaround timeYork Sun2011-07-11-0/+6
| | | | | | | Add this option to allow boards to override the default read-to-write turnaround time for better performance. Signed-off-by: York Sun <yorksun@freescale.com>
* qoriq/p1_p2_rdb: USB device-tree fixups for P1020Ramneek Mehresh2011-07-11-0/+47
| | | | | | | | | | Resolve P1020 second USB controller multiplexing with eLBC - mandatory to mention USB2 in hwconfig string to select it over eLBC, otherwise USB2 node is removed - works only for SPI and SD boot Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Specify hwconfig usage for USB controllerRamneek Mehresh2011-07-11-0/+25
| | | | | | | Specify hwconfig usage for USB mode and phy change Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Update USB mode device tree fixupRamneek Mehresh2011-07-11-12/+65
| | | | | | | | | | | | Modify support for USB mode fixup: - Add common support for USB mode and phy type device tree fix-up for all USB controllers mentioned in hwconfig string - Fetch USB mode and phy type via hwconfig; if not defined in hwconfig, then fetch them from env Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add basic support for P1023RDS boardRoy Zang2011-07-11-0/+1303
| | | | | | | | | | | | | | The P1023RDS board is the reference board for the P1023 SoC. Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe, UART, I2C, etc. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc85xx: Display a warning for unsupported DDR data ratesYork Sun2011-07-11-4/+27
| | | | | | | | If DDR initialziation uses a speed table and the speed is not matched, print a warning message instead of silently ignoring. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/corenet_ds: Fix RCW overriding for RDIMMYork Sun2011-07-11-1/+1
| | | | | | | Allow overriding RCW for all RDIMM, not only quad-rank ones. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8xxx: fix DDR data width checkingYork Sun2011-07-11-8/+27
| | | | | | | | | Checking width before setting DDR controller. SPD for DDR1 and DDR2 has data width and primary sdram width. The latter one has different meaning for DDR3. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8xxx: Adding fallback to raw timing on supported boardsYork Sun2011-07-11-0/+8
| | | | | | | | In case of empty SPD or checksum error, fallback to raw timing on supported boards. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8xxx: Enable calculation for fixed DDR chipsYork Sun2011-07-11-3/+39
| | | | | | | | | | We used to have fixed parameters for soldered DDR chips. This patch introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing data from DDR chip datasheet, implemneted in board-specific files or header files. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix pin muxing for second USB controllerFelix Radensky2011-07-11-1/+1
| | | | | | | | | | | On P1022/P1013 second USB controller is muxed with second Ethernet controller. The current code to enable second USB fails to properly clear pinmux bits used by ethernet. As a result, Linux freezes when this controller is used. This patch fixes the problem. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Adding more SPD registersYork Sun2011-07-11-1/+3
| | | | | | | Adding byte 32 and 33 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8xxx: Add 16-bit support for DDR3York Sun2011-07-11-2/+18
| | | | | | | | Add support for 16-bit DDR bus. Also deal with system using 64- and 32-bit DDR devices. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8xxx: check SPD length before using part numberYork Sun2011-07-11-1/+2
| | | | | | | | Only use DDR DIMM part number if SPD has valid length, to prevent from display garbage in case SPD doesn't cover these fields. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram widthYork Sun2011-07-11-4/+20
| | | | | | | | If the bus width is 32-bit, burst chop should be disabled and burst length should be 8. Read from SPD or other source to determine the width. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: display boot device and bank on the MPC8610 HPCDTimur Tabi2011-07-11-2/+23
| | | | | Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add NAND boot support for P3041/P5020DSShaohui Xie2011-07-11-6/+25
| | | | | | | When booting from NAND we get the environment and FMan ucode from NAND. Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add P2041 processor supportKumar Gala2011-07-11-0/+26
| | | | | | The P2041 is similar to P2040, however has a 10G port and backside L2 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2040: Add various p2040 specific informationMingkai Hu2011-07-11-0/+133
| | | | | | | | | | | Add P2040 SoC specific information: * LIODN setup * Portal configuration * etc Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBMAN isn't setKumar Gala2011-07-11-13/+24
| | | | | | | | | | | Add ifdef protection for qp_info and liodn associated with Q/BMan. Also rearrange setting of _tbl_sz variables to utilize existing ifdef protection for things like FMAN. Also add protection around setup_portals() call in corenet_ds board code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* qoriq/p1_p2_rdb: Add Dual Role USB support macro for P1020RDBRamneek Mehresh2011-07-11-0/+1
| | | | | | | Add CONFIG_HAS_FSL_DR_USB macro for P1020RDB Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix compile errors if CONFIG_SYS_{BR,OR}0_PRELIM aren't setKumar Gala2011-07-11-0/+2
| | | | | | | | Add ifdef protection in LBC code to handle the case in which CONFIG_SYS_BR0_PRELIM and CONFIG_SYS_OR0_PRELIM arent defined for a build. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix compile errors if CONFIG_SYS_{B,Q}MAN_MEM_PHYS aren't setKumar Gala2011-07-11-0/+8
| | | | | | | | Add ifdef protection in LAW & TLB code to handle the case in which CONFIG_SYS_BMAN_MEM_PHYS or CONFIG_SYS_QMAN_MEM_PHYS arent defined for a build. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC83XX: Fix PCI express clock setupBill Cook2011-07-06-2/+4
| | | | | | | | | | | | On a 8308 based board it was found that the PEX_GLK_RATIO register (programmed in arch/powerpc/cpu/mpc83xx/pcie.c) was getting set to 0, This was tracked to the fact that the pci express clock frequency was not being assigned to the pciexp1_clk entry in the global data structure in file arch/powerpc/cpu/mpc83xx/speed.c. Fix this and a similiar issue in 'do_clocks' command. Signed-off-by: Bill Cook <cook@isgchips.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* powerpc/83xx: remove empty board_early_init_f()Timur Tabi2011-07-06-13/+0
| | | | | | | Remove an empty board_early_init_f() from the MPC8323ERD and MPC360ERDK boards. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Add support for MergerBox boardAndre Schwarz2011-07-06-0/+1504
| | | | | | | | Includes board config file, documentation, maintainer and boards.cfg entries, and board specific files in vendor dir. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC83xx: add config options for memory setup.Andre Schwarz2011-07-06-1/+18
| | | | | | | | | CPO value and driver strength settings are board specifc. Also allow SPD data fetch from any accessible I2C EEPROM. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC83xx: add define for global half-strength enable (HSE)Andre Schwarz2011-07-06-0/+1
| | | | | Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC837x: set i2c1_clkAndre Schwarz2011-07-06-0/+2
| | | | | | | | | Running on mpc837x without CONFIG_FSL_ESDHC leads to i2c1_clk not being set at all. It is bound to clock of encryption module. fix this. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* fsl_dma: fix support for 83xx DMA engineIra W. Snyder2011-07-06-0/+2
| | | | | | | | | | | | | Commit 359ec4931944adb885882deb9b781e4095eabc94 broke support for the Freescale DMA engine on the 83xx parts. This is due to using registers which do not exist on 83xx. Remove the attribute register accesses from the 83xx build. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Cc: York Sun <yorksun@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Add support for Network Space v2 and parentsSimon Guinot2011-07-04-0/+566
| | | | | | | | | | | This patch add support for the Network Space v2 board and parents, based on the Marvell Kirkwood 6281 SoC. This include Network Space (Max) v2 and Internet Space v2. Additional information is available at: http://lacie-nas.org/doku.php?id=network_space_v2 Signed-off-by: Simon Guinot <sguinot@lacie.com>
* arm/km: add support for portl2 boardValentin Longchamp2011-07-04-3/+89
| | | | | | | | | | | | | | | This adds support for the keymile Kirkwood BEC portl2 board. This board relies on the km_arm (km_kirkwood) BEC. The egiga driver is configured for a 100M full-duplex, A/N off connnection to the backplane. This board has always ethernet present, because it is connected to the marvell switch similar to mgcoge3un. The reset_phy functionality is also the same to mgcoge3un. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: replace suenx targets with km_kirkwoodHolger Brunck2011-07-04-60/+25
| | | | | | | | | | | | | | suen3 and suen8 were in first HW version quite different, but now they are from a u-boot point of view similar. So these two boards can use the same header file. Other keymile boards differ only in the usage of the PCI interface. Therefore a target km_kirkwood_pci was introduced. All targets use the same header file. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: ethernet support for mgcoge3unValentin Longchamp2011-07-04-1/+38
| | | | | | | | | | The phy is also configured with "RGMII clock transitions when data stable" and "Class A driver for the direct backplane connection". Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: use board KM_ENV_BUS for CONFIG_I2C_ENV_EEPROM_BUSValentin Longchamp2011-07-04-1/+1
| | | | | | | | | | | This is defined for all km_kirkwood boards and was not used up to now. This value was the same for all boards but it could be changed for some boards (and thus needs to be defined for every board). Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: remove unneeded defineHolger Brunck2011-07-04-2/+0
| | | | | | | | | | | CONFIG_ENV_SIZE for NAND was later in this file overwritten because we have the environment in i2c eeprom, so remove this define. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/km: fix u-boot.kwb build breakageHolger Brunck2011-07-04-22/+7
| | | | | | | | | | | | | | | | | | | commit 010a958b (arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h) breaks building keymile arm targets, when u-boot.kwb tries to generate the binary with mkimage. A simple make <board> or MAKEALL succeeded because it don't try to build the kirwood binary at the end. Due this commit we use the CONFIG_SYS_KWD_CONFIG from the arch-kirkwood/config.h and it was removed from the board config. But it was forgotten to include the header. Now the header is included in km_arm.h. Some other defines were obsolete due to this include, these are also removed in this commit. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* arm/kirkwood: if CONFIG_SOFT_I2C is set don't set CONFIG_I2C_MVTWSIHolger Brunck2011-07-04-0/+2
| | | | | | | | | | | Some boards e.g. keymile arm boards have CONFIG_CMD_I2C switched on but they use soft i2c on kirkwood. So don't switch CONFIG_I2C_MVTWSI on in this case. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Heiko Schocher <hs@denx.de>
* Fix compiler error for cpu at91sam9, if lowlevel init is enabledJens Scharsig2011-07-04-1/+1
| | | | | | | * Fix compiler error for cpu at91sam9, if lowlevel init is enabled * use correct ATMEL_ name scheme to define ATMEL_BASE_SDRAMC Signed-off-by: Jens Scharsig
* atstk100x: switch to common cfi driverAndreas Bießmann2011-07-04-261/+8
| | | | | | | | | This patch removes the board implemenatation for flash driver which can now safely switched to the common cfi driver. Compile tested for all atstk100x boards, runtime tested on atstk1002. Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
* driver/serial: delete at91rm9200_usartAndreas Bießmann2011-07-04-127/+0
| | | | | | The at91rm9200_usart driver could be fully replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* cpuat91: use atmel_usartAndreas Bießmann2011-07-04-3/+12
| | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Eric Bénard <eric@eukrea.com>
* eb_cpux9k2: use atmel_usartAndreas Bießmann2011-07-04-2/+11
| | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> CC: Jens Scharsig <js_at_ng@scharsoft.de> Acked-by: Jens Scharsig<js_at_ng@scharsoft.de> Tested-by: Jens Scharsig<js_at_ng@scharsoft.de> (for eb_cpux9k2 board)
* at91rm9200ek: use atmel_usartAndreas Bießmann2011-07-04-2/+12
| | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm920t/at91: add at91rm9200_devices.cAndreas Bießmann2011-07-04-2/+93
| | | | | | | This is a copy of arm926ejs/at91 api for perpherial initialisation. At the moment we just need the usart part of the api. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm920t/at91: use new clock.c featuresAndreas Bießmann2011-07-04-4/+53
| | | | | | | | | This patch enables the new clock features from arm920t/at91/clock.c. This is an required step to get at91rm9200_usart replaced by atmel_usart driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Jens Scharsig <js_at_ng@scharsoft.de> Cc: Eric Bénard <eric@eukrea.com>
* arm920t/at91: add clock.cAndreas Bießmann2011-07-04-40/+198
| | | | | | | This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The arm926ejs specialities are removed from arm920t version and vice versa. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91rm9200.h: fix ATMEL_PMX_AA_TXD2Andreas Bießmann2011-07-04-1/+1
| | | | | | | | | This patch sets the ATMEL_PMX_AA_TXD2 to the correct value. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> CC: Jens Scharsig <js_at_ng@scharsoft.de> CC: eric@eukrea.com Acked-by: Eric Bénard <eric@eukrea.com>
* vision2: Fix build due to WEIM registers name changeFabio Estevam2011-07-04-5/+5
| | | | | | | | | commit 0015de1a (MX5: Make the weim structure complete) fixed the name for the WEIM registers in order to match with the MX51/MX53 manuals. Fix the WEIM register for vision2 board so that it can build again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
generated by cgit v1.1 at 2024-12-23 00:56:33 +0000