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* Add setenv_ulong() and setenv_addr()Simon Glass2011-10-26-0/+32
| | | | | | | It seems we put numbers and addresses into environment variables a lot. We should have some functions to do this. Signed-off-by: Simon Glass <sjg@chromium.org>
* Move simple_itoa to vsprintfSimon Glass2011-10-26-15/+17
| | | | | | | This function is generally useful and shouldn't hide away in hush. It has been moved as is. Signed-off-by: Simon Glass <sjg@chromium.org>
* altera_tse: Fix return of eth_device's recv() callbackJoachim Foerster2011-10-26-0/+2
| | | | | | | It seems to be good practice to return the number of received bytes in the eth_device's recv() callback, here: tse_eth_rx(). Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* altera_tse: m88e1111s: Honor device flags regarding PHY interface modeJoachim Foerster2011-10-26-2/+8
| | | | | | | | | Note: This is kind of guess work. The current code is preserved for all RGMII related modes. It is different for flags=0 (GMII) and flags=5 (SGMII). The last case, SGMII, is successfully tested on Altera's Terasic DE4. Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* altera_tse: Add support for dedicated descriptor memoryJoachim Foerster2011-10-26-5/+27
| | | | Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* altera_tse: Fix SGDMA reset triggeringJoachim Foerster2011-10-26-4/+4
| | | | | | The SW_RESET needs to be set instead of being masked out! Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* altera_tse: Clear SGDMA's RUN bit in async transfer, like in sync caseJoachim Foerster2011-10-26-0/+6
| | | | Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* part_efi: dcache: allocate cacheline aligned buffersAnton staaf2011-10-25-9/+9
| | | | | | | | | | | | | | | Currently part_efi.c allocates buffers for the gpt_header, the legacy_mbr, and the pte (partition table entry) that may be incorrectly aligned for DMA operations. This patch uses ALLOC_CACHE_ALIGN_BUFFER for the stack allocated buffers and memalign to replace the malloc of the pte. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
* mmc: dcache: allocate cache aligned buffers for ext_csdAnton staaf2011-10-25-2/+2
| | | | | | | | | | | | | | | Currently the mmc_change_freq and mmc_startup functions allocates buffers on the stack that are passed down to the MMC device driver. These buffers could be unaligned to the L1 dcache line size. This causes problems when using DMA and with caches enabled. This patch correctly cache alignes the buffers used for reading the ext_csd data from an MMC device. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* ext2: Cache line aligned partial sector bounce bufferAnton staaf2011-10-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Currently, if a device read request is done that does not begin or end on a sector boundary a stack allocated bounce buffer is used to perform the read, and then just the part of the sector that is needed is copied into the users buffer. This stack allocation can mean that the bounce buffer will not be aligned to the dcache line size. This is a problem when caches are enabled because unaligned cache invalidates are not safe. This patch uses ALLOC_CACHE_ALIGN_BUFFER to create a stack allocated cache line size aligned bounce buffer. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Dave Liu <r63238@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Change-Id: I32e1594d90ef039137bb219b0f7ced55768744ff Acked-by: Mike Frysinger <vapier@gentoo.org>
* mmc: dcache: allocate cache aligned buffer for scr and switch_statusAnton staaf2011-10-25-5/+5
| | | | | | | | | | | | | | | | | Currently the sd_change_freq function allocates two buffers on the stack that it passes down to the MMC device driver. These buffers could be unaligned to the L1 dcache line size. This causes problems when using DMA and with caches enabled. This patch correctly cache alignes the buffers used for reading the scr register and switch status values from an MMC device. Change-Id: Ifa8414f572ef907681bd2d5ff3950285a215357d Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
* tegra: define CONFIG_SYS_CACHELINE_SIZE for tegraAnton staaf2011-10-25-0/+2
| | | | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Tom Warren <twarren.nvidia@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76 Acked-by: Mike Frysinger <vapier@gentoo.org>
* cache: add ALLOC_CACHE_ALIGN_BUFFER macroAnton staaf2011-10-25-0/+60
| | | | | | | | | | | | | This macro is used to allocate cache line size aligned stack buffers for use with DMA hardware. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
* Revert "km_arm: enable POST for these boards"Wolfgang Denk2011-10-24-38/+0
| | | | | | | | | This reverts commit a2da616311151ecfab8b8fcc510686fc3c0c9a21. THis was applied by accident - a more recent version of this change was already present, see commit 9400f8f 2011-10-05 22:03:11 +0200 km_arm: enable POST for these boards Signed-off-by: Wolfgang Denk <wd@denx.de>
* arm: Correct build error introduced by getenv_ulong() patchSimon Glass2011-10-24-4/+8
| | | | | | | | | | Commit dc8bbea removed a local variable that is used in most ARM boards. Since we want to avoid an 'unused variable' warning with later compilers, and the #ifdef logic of whether this variable is required is bit painful, this declares the variable local to the block of code that needs it. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: Correct build warning introduced by getenv_ulong() patchSimon Glass2011-10-24-3/+7
| | | | | | | Commit 1272592 introduced a warning since the variable 's' is no longer always used, depending on the CONFIG options. Signed-off-by: Simon Glass <sjg@chromium.org>
* mkimage: adding support for Davinci AIS imageStefano Babic2011-10-23-5/+560
| | | | | | | | | | | Some Davinci processors supports the Application Image Script (AIS) boot process. The patch adds the generation of the AIS image inside the mkimage tool to make possible to generate a bootable U-boot without external tools (TI Davinci AIS Generator). Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
* net: xilinx_enet: drop unused !NET_MULTI driverMike Frysinger2011-10-23-4957/+0
| | | | | | | This driver doesn't support the NET_MULTI framework, and I can't find any boards/configs/files that reference this subdir, so punt it all. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: sc589: drop unused !NET_MULTI driverMike Frysinger2011-10-23-953/+0
| | | | | | | No boards appear to use this driver, and it doesn't support NET_MULTI, so punt the old driver. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: s3c4510b_eth: drop unused !NET_MULTI driverMike Frysinger2011-10-23-544/+0
| | | | | | | No boards appear to use this driver, and it doesn't support NET_MULTI, so punt the old driver. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: ns9750: drop !NET_MULTI driverMike Frysinger2011-10-23-1090/+0
| | | | | | | | Only one board uses this driver (ns9750dev), but the board doesn't seem to have an entry to actually build it in the Makefile/boards.cfg, so just delete net support from its board config. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: enc28j60_lpc2292: drop unused !NET_MULTI driverMike Frysinger2011-10-23-984/+0
| | | | | | | Everyone seems to have converted to the new enc28j60 driver, so drop this older one which isn't used and doesn't support NET_MULTI. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* powerpc/lib/board.c: Call run_post(POST_ROM) before relocatingBernhard Kaindl2011-10-23-7/+7
| | | | | | | | | | | | | | | | | | | The call to run_post(POST_ROM) which can run the POST memory test is currently called too late when gd has already been copied to DRAM. This results in failure to boot Linux after a POST_ROM memory test tested all RAM while gd was already relocated to DRAM due to gd being overwritten by the POST_ROM memory test. Support this by moving the call to run_post(POST_ROM) to run earlier, before U-Boot has started to move data to DRAM (from late board_init_f to early board_init_f) where DRAM is initialized, but not used yet. This allows that an POST memory test can test the whole DRAM, including the area where the board info struct is located. Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
* net/dns.c: Fix endian conversion for big-endian in dns commandBernhard Kaindl2011-10-23-12/+8
| | | | | | | | | | | | | | | | | net/dns.c used endian conversion macros wrongly (shorts in reply were put swapped into CPU, and then ntohs() was used to swap it back, which broke on big-endian). Fix this by using the correct linux conversion macro for reading a unaligned short in network byte order: get_unaligned_be16() Thanks to Mike Frysinger pointing at the best macro to use. Tested on big and little endian qemu boards (mips and versatile) Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl> Cc: Robin Getz <rgetz@blackfin.uclinux.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* x86: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-11/+3
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* sparc: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-10/+3
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-25/+8
| | | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de>
* mips: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-11/+3
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* microblaze: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-3/+2
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* m68k: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-25/+8
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* blackfin: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-7/+2
| | | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* avr32: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-13/+3
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-25/+11
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add getenv_ulong() to read an integer from an environment variableSimon Glass2011-10-23-0/+21
| | | | | | | | This is not an uncommon operation in U-Boot, so let's put it in a common function. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* common: fix missing function pointer relocation in fixup_cmdtable()Daniel Schwierzeck2011-10-23-1/+2
| | | | | | | | In commit fa28bd2eef588ec2048ccafedb2b384d5a355858 patch v1 was applied instead of v2. This is an incremental patch to update that commit to version 2. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* net: emaclite: Move RX/TX ping pong initialization toMichal Simek2011-10-23-14/+18
| | | | | | Init RX/TX ping pong directly from board not in the driver. Signed-off-by: Michal Simek <monstr@monstr.eu>
* net: emaclite: Use unsigned long for baseaddrMichal Simek2011-10-23-3/+3
| | | | | | Baseaddr should be unsigned long. Signed-off-by: Michal Simek <monstr@monstr.eu>
* arm, post, memory: fix bug if sdram base != 0x00000000Heiko Schocher2011-10-23-3/+4
| | | | | | | | | | commit 8d3fcb5e60b6c8e1d530dbc2e2e33ec6a44670da breaks post memory support for sdram base != 0x00000000. Fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* spi/eon: add support for new EON spi flash EN25Q32BShaohui Xie2011-10-23-0/+8
| | | | Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
* cache: include asm/cache.h for ARCH_DMA_MINALIGN definitionAnton Staaf2011-10-23-0/+8
| | | | | | | | | | | | | | | | | ARCH_DMA_MINALIGN will be used to allocate DMA buffers that are aligned correctly. In all current cases this means that the DMA buffer will be aligned to at least the L1 data cache line size of the configured architecture. If the board configuration file does not specify the architecture L1 data cache line size then the maximum line size of the architecture is used to align DMA buffers. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Laurence Withers <lwithers@guralp.com>
* x86: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+35
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Graeme Russ <graeme.russ@gmail.com>
* mips: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+36
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Shinya Kuribayashi <skuribay@pobox.com>
* microblaze: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+37
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Michal Simek <monstr@monstr.eu>
* avr32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+40
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
* sparc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+10
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Daniel Hellstrom <daniel@gaisler.com>
* sh: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+17
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+6
| | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Acked-by: Stefan Roese <sr@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de>
* nios2: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+11
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Scott McNutt <smcnutt@psyent.com>
* m68k: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+10
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Jason Jin <jason.jin@freescale.com>
* arm: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+11
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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