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* ARM: Define __raw_readX and __raw_writeXMarek Vasut2010-08-07-6/+40
| | | | | | | These functions are undefined on ARM when using __io. These are the commonly used versions and can be redefined. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* Merge branch 'master' of /home/wd/git/u-boot/masterWolfgang Denk2010-08-07-95109/+4121
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| * Fix condition where bootm_size not set and wrong memory size reportedMatthew McClintock2010-08-07-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If the user sets bootm_low and does not set bootm_size, u-boot will report the memory node in the flat device tree incorrectly. Instead of reporting the remaining size of memory, it will report the total available memory which is incorrect. Specifically this fixes the situation when booting a relocatable kernel and the memory is reported as an offset and size in the device tree, and the size needs to be adjusted accordingly. Signed-off-by: Matthew McClintock <msm@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
| * Replace CHANGELOG files by auto-generated "snapshot.commit"Wolfgang Denk2010-08-07-94577/+1
| | | | | | | | | | | | Idea and implementation courtesy of Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
| * net 52xx: fix ethernet device names with spacesWolfgang Denk2010-08-05-1/+1
| | | | | | | | | | | | | | | | | | Some commands (like 'mii') use this name to select devices, but they break when those names contain spaces. So drop the space from Ethernet driver names (cf. commit 1384f3bb). Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Ben Warren <biggerbadderben@gmail.com>
| * Rename getenv_r() into getenv_f()Wolfgang Denk2010-08-04-89/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While running from flash, i. e. before relocation, we have only a limited C runtime environment without writable data segment. In this phase, some configurations (for example with environment in EEPROM) must not use the normal getenv(), but a special function. This function had been called getenv_r(), with the idea that the "_r" suffix would mean the same as in the _r_eentrant versions of some of the C library functions (for example getdate vs. getdate_r, getgrent vs. getgrent_r, etc.). Unfortunately this was a misleading name, as in U-Boot the "_r" generally means "running from RAM", i. e. _after_ relocation. To avoid confusion, rename into getenv_f() [as "running from flash"] Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
| * bootm: fix pointer warning with lzmaMike Frysinger2010-08-04-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Avoid warning: cmd_bootm.c: In function 'bootm_load_os': cmd_bootm.c:394: warning: passing argument 2 of 'lzmaBuffToBuffDecompress' from incompatible pointer type For 32 bit systems, this change shouldn't make a difference to code size since sizeof(size_t) and sizeof(unsigned int) are equal. But it does fix the warning. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-08-04-245/+3917
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| | * powerpc/8xxx: query feature reporting register for num cores on unknown cpusKim Phillips2010-08-01-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | doing so helps avant garde users, such as those using simulators that allow users to configure the number of cores, so as to not have to manually adjust u-boot sources. h/w should also be reliably setting FRR NCPU in the future. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: configure autocompletion supportKim Phillips2010-08-01-11/+30
| | | | | | | | | | | | | | | | | | | | | because it's convenient. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/p4080: Add support for the P4080DS boardKumar Gala2010-08-01-0/+1494
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the P4080DS board, with the following features: * 36-bit only * Boots from NOR flash * FMAN drivers NOT supported * SPD DDR initialization Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfigyork2010-07-26-31/+39
| | | | | | | | | | | | | | | | | | | | | | | | Enabled SPD Enabled DDR2 Enabled hwconfig Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/8xxx: Improvement to DDR parametersyork2010-07-26-7/+8
| | | | | | | | | | | | | | | | | | Changes for P2020DS DDR applies to other 8xxx platform Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/8xxx: Enable DDR3 RDIMM supportyork2010-07-26-53/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enabled registered DIMMs using data from SPD. RDIMMs have registers which need to be configured before using. The register configuration words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software should read those RCWs and put into DDR controller before initialization. Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/8xxx: Enabled address hashing for 85xxyork2010-07-26-2/+34
| | | | | | | | | | | | | | | | | | | | | For 85xx silicon which supports address hashing, it can be activated by hwconfig. Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/8xxx: Enable quad-rank DIMMs.york2010-07-26-21/+61
| | | | | | | | | | | | | | | | | | | | | Previous code presumes each DIMM has up to two rank (chip select). Newer DDR controller supports up to four chip select on one DIMM. Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4york2010-07-26-77/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual rank with 512MB each rank. Also check dimm size and rank size for memory controller interleaving Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/8xxx: Enabled hwconfig for memory interleavingKumar Gala2010-07-26-26/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with hwconfig parameters. The syntax is setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>" The mode values for memory controller interleaving are cacheline page bank superbank The mode values for bank interleaving are cs0_cs1 cs2_cs3 cs0_cs1_and_cs2_cs3 cs0_cs1_cs2_cs3 Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/p4080: Add workaround for erratum CPU22Kumar Gala2010-07-26-1/+17
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/p4080: Add workaround for errata SERDES8Kumar Gala2010-07-26-0/+295
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/p4080: Add support for initializing SERDESKumar Gala2010-07-26-2/+357
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for initializing the SERDES blocks on CoreNet style QoriQ devices and the p4080 specific SERDES tables to know which actual componetns are enabled. Additionally, split out the Frame Manger (FMAN) into its specific ethernet ports instead of gross level of the full FMAN. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: Add support to initialize LIODN registers and portalsKumar Gala2010-07-26-0/+762
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the new QorIQ/CoreNet based platforms we need to initialize the "portals" as access into the Data Path subystem as well as Logical IO Device Numbers (LIODN) that are used for the IOMMU (PAMU). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * fdt: Add function to alloc phandle valuesKumar Gala2010-07-26-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we are creating reference (handles) to nodes in a device tree we need to first create a new phandle in node and this needs a new phandle value. So we search through the whole dtb to find the max phandle value and return the next greater value for a new phandle allocation. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
| | * powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platformsKumar Gala2010-07-26-1/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CoreNet style platforms can have a L3 cache that fronts the memory controllers. Enable that cache as well as add information into the device tree about it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/p2020: Move INIT_RAM_ADDR physical address higher for 36-bit for P2020DSyork2010-07-26-4/+16
| | | | | | | | | | | | | | | | | | | | | If 36-bit is enabled, move INIT_RAM_ADDR physical address higher to free lowest 4GB address space. Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/85xx: Move INIT_RAM_ADDR physical address to 36-bit spaceyork2010-07-26-0/+10
| | | | | | | | | | | | | | | | | | | | | If 36-bit physical address is used, move the INIT_RAM_ADDR to higher address. This frees the low 4GB address space for better use. Signed-off-by: York Sun <yorksun@freescale.com>
| | * powerpc/fsl_fman: Add initial fman immap structuresKumar Gala2010-07-26-0/+213
| | | | | | | | | | | | | | | | | | Add basic structures for Frame Manager on P4080/P3041/P5020 devices Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: Add additional p4080 platform related defines/structsKumar Gala2010-07-26-22/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Added PCIE4 address, offset, DEVDISR & LAW target ID * Added new p4080 DDR registers and defines to immap * Add missing corenet platform DEVDISR related defines * Updated ccsr_gur to include LIODN registers * Add RCWSR defines * Added Basic qman, pme, bman immap structs * Added SATA related offsets & addresses * Added Frame Manager 1/2 offsets & addresses * Renamed CONFIG_SYS_TSEC1_OFFSET to CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET * Added various offsets and addresses that where missing Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Blackfin: gpio: use common usage funcMike Frysinger2010-07-29-4/+2
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: jtag-console: handle newline stuffingMike Frysinger2010-07-25-9/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Serial devices currently have to manually stuff \r after every \n found, but this is a bit more difficult with the jtag console since we process everything in chunks of 4 bit. So we have to scan & stuff the whole string rather than what most serial drivers do which is output on a byte per byte basis. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: jtag-console: add debug markersMike Frysinger2010-07-25-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While we're in here, add some useful debug points. We need custom debug statements because we need the output to only go to the serial port. If we used the standard debug helpers, the output would also go to the stdout (which would be the jtag console) and make it hard to figure out what is going where exactly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: jtag-console: robustify against missing peerMike Frysinger2010-07-25-8/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | If the other side isn't listening, we should reset the state to ignore the whole message and not just the part we missed. This makes it easier to connect at any time to the jtag console without worrying about the two sides getting out of sync and thus sending garbage back and forth. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: jtagconsole: disable output processingMike Frysinger2010-07-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Avoid extra carriage returns in the output by disabling output processing. Otherwise, whenever the remote sends a \r\n, we end up with \r\r\n. Reported-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf533/bf561 boards: convert to new soft gpio i2c codeMike Frysinger2010-07-25-175/+11
| |/ | | | | | | | | | | | | | | Use the new common gpio framework to simplify and unify the soft i2c configuration settings. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-samsungWolfgang Denk2010-08-04-2/+597
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| * | s5p_goni: enable mmc0Minkyu Kang2010-08-03-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | Adds the board_mmc_init function and enable the mmc command Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * | S5P: support mmc driverMinkyu Kang2010-08-03-0/+552
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support mmc driver for s5p SoC Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * | SAMSUNG: serial: remove compiler warningsMinkyu Kang2010-07-09-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove below warnings serial_s5p.c: In function 'serial_getc_dev': serial_s5p.c:136: warning: dereferencing type-punned pointer will break strict-aliasing rules serial_s5p.c: In function 'serial_putc_dev': serial_s5p.c:152: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * | Merge branch 'master' of git://git.denx.de/u-bootMinkyu Kang2010-07-06-23873/+8238
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| * \ \ Merge branch 'master' of git://git.denx.de/u-boot-armMinkyu Kang2010-06-15-227/+4202
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| * | | | SAMSUNG: goni: add the GPL licenceMinkyu Kang2010-06-09-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Tom <Tom@bumblecow.com>
| * | | | s5pc1xx: Add support for Samsung Goni boardMinkyu Kang2010-06-03-4/+1237
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Samsung Goni board (S5PC110 SoC) Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * | | | s5pc1xx: gpio: bug fix at gpio_set_pull functionMinkyu Kang2010-05-31-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When set to PULL_NONE, gpio_set_pull function is returned without write the register. This patch fixed it. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | | Merge branch 'master' of git://git.denx.de/u-boot-armMinkyu Kang2010-05-31-1775/+11352
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/include/asm/mach-types.h Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * \ \ \ \ Merge branch 'master' of git://git.denx.de/u-boot-armMinkyu Kang2010-05-17-90/+935
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| | * | | | | Add SPI support to mx51evk boardStefano Babic2010-05-10-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds SPI devices to the mx51evk board. The MC13892 chip (PMIC) is supported. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | | | MX: Added definition file for MC13892Stefano Babic2010-05-10-0/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MC13892 is a Power Controller used with processors of the family MX.51. The file adds definitions to be used to setup the internal registers via SPI. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | | | SPI: added support for MX51 to mxc_spiStefano Babic2010-05-10-20/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | | | MX31: Add support for PMIC to the QONG moduleStefano Babic2010-05-10-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the PMIC (MC13783) controller and enables charging of the RTC battery. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | | | | MX: RTC13783 uses general function to access PMICStefano Babic2010-05-10-67/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC is part of the Freescale's PMIC controller. Use general function to access to PMIC internal registers. Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
generated by cgit v1.1 at 2024-12-25 05:07:52 +0000