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* Merge branch 'master' of git://www.denx.de/git/u-boot-netWolfgang Denk2008-06-11-339/+382
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| * net: Conditional COBJS inclusion of network driversShinya Kuribayashi2008-06-09-201/+34
| | | | | | | | | | | | | | Replace COBJS-y with appropriate driver config names. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * Merge branch 'master' of git://git.denx.de/u-bootBen Warren2008-06-08-1282/+8603
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| * | DM9000 fix status check fail 0x6d error for trizeps boardRemy Bohmer2008-06-05-9/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the Application Notes of the DM9000, only the 2 bits 0:1 of the status byte need to be checked to identify a valid packet in the fifo But, The several different Application Notes do not all speak the same language on these bits. They do not disagree, but only 1 Application Note noted explicitly that only these 2 bits need to be checked. Even the datasheets do not mention anything about these 2 bits. Because the old code, and the kernel check the whole byte, I left this piece untouched. However, I tested all board/DM9000[A|E|EP] devices with this 2 bit check, so it should work. Notice, that the 2nd iteration through this receive loop (when a 2nd packet is in the fifo) is much shorter now, compared to the older U-boot driver code, so that we can maybe run into a hardware condition now that was never seen before, or maybe was seen very unfrequently. Additionaly added a cleanup of a stack variable. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | Get rid of annoying/superfluous bad-checksum warning messageRemy Bohmer2008-06-04-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-boot can complain a lot about 'checksum bad' when it is attached to the network. It is annoying for ordinary users who start to doubt the network connection in general when they see messages like this. This is caused by the routine NetCksumOk() which cannot handle IP-headers longer than 20 bytes. Those packages can be ignored anyway by U-boot, so we trash them now before checking the checksum. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | Fix order for reading rx-status registers in 32bit mode of DM9000Remy Bohmer2008-06-04-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | A last minute cleanup before submitting the DM9000A patch series yesterday introduced a bug in reading the rx-status registers in 32bit mode only. This patch repairs this. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | DM9000: Some minor code cleanupsRemy Bohmer2008-06-04-15/+26
| | | | | | | | | | | | | | | | | | | | | | | | Some lines of the U-boot DM9000x driver are longer than 80 characters, or need some other minor cleanup. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | DM9000: Make driver work properly for DM9000ARemy Bohmer2008-06-04-39/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DM9000A network controller does not work with the U-boot DM9000x driver. Analysis showed that many incoming packets are lost. The DM9000A Application Notes V1.20 (section 5.6.1) recommend that the poll to check for a valid rx packet be done on the interrupt status register, not directly by performing the dummy read and the rx status check as is currently the case in the u-boot driver. When the recommended poll is done as suggested the driver starts working correctly on 10Mbit/HD, but on 100MBit/FD packets come in faster so that there can be more than 1 package in the fifo at the same time. The driver must perform the rx-status check in a loop and read and handle all packages until there is no more left _after_ the interrupt RX flag is set. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | DM9000: Improve eth_reset() routineRemy Bohmer2008-06-04-3/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the application notes of the DM9000 v1.22 chapter 5.2 bullet 2, the reset procedure must be done twice to properly reset the DM9000 by means of software. This errata is not needed anymore for the DM9000A, but it does not bother it. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | DM9000: improve eth_send() routineRemy Bohmer2008-06-04-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The eth_send routine of the U-boot DM9000x driver does not match the DM9000 or DM9000A application notes/programming guides. This change improves the stability of the DM9000A network controller. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | DM9000: repair debug loggingRemy Bohmer2008-06-04-12/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It seems that the debugging code of the DM9000x driver in U-boot has not been compiled for a long time, because it cannot compile... Also rearranged some loglines to get more useful info while debugging. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | DM9000: Add data bus-width auto detection.Remy Bohmer2008-06-04-66/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The U-boot DM9000x driver contains a compile time bus-width definition for the databus connected to the network controller. This compile check makes the code unclear, inflexible and is unneccessary. It can be asked to the network controller what its bus-width is by reading bits 6 and 7 of the interrupt status register. The linux kernel already uses a runtime mechanism to determine this bus-width, so the implementation below looks somewhat like that implementation. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | Merge branch 'master' of git://www.denx.de/git/u-bootBen Warren2008-06-02-56/+78
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| * | | E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop AdapterWolfgang Grandegger2008-06-02-2/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | ColdFire: Add 10 base ethernet support for mcf5445xTsiChung Liew2008-06-02-0/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | Add Marvell 88E1118 support for TSECRon Madrid2008-05-23-0/+31
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | | smc911x: add 16 bit supportJens Gehrlein2008-05-22-2/+34
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-06-11-5648/+2782
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| * | | | ppc4xx: Fix misspelled CONFIG_440SPE/440EPX/GRX config optionsStefan Roese2008-06-06-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use upper case letters for the AMCC processor defines (like CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and not CONFIG_440SPe. This patch fixes the last misspelled config options. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Unify AMCC's board config files (part 3/3)Stefan Roese2008-06-06-999/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch series unifies the AMCC eval board ports by introducing a common include header for all AMCC eval boards: include/configs/amcc-common.h This header now includes all common configuration options/defines which are removed from the board specific headers. The reason for this is ease of maintenance and unified look and feel of all AMCC boards. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Unify AMCC's board config files (part 2/3)Stefan Roese2008-06-06-1298/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch series unifies the AMCC eval board ports by introducing a common include header for all AMCC eval boards: include/configs/amcc-common.h This header now includes all common configuration options/defines which are removed from the board specific headers. The reason for this is ease of maintenance and unified look and feel of all AMCC boards. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Unify AMCC's board config files (part 1/3)Stefan Roese2008-06-06-0/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch series unifies the AMCC eval board ports by introducing a common include header for all AMCC eval boards: include/configs/amcc-common.h This header now includes all common configuration options/defines which are removed from the board specific headers. The reason for this is ease of maintenance and unified look and feel of all AMCC boards. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Fix problem with SDRAM init in bamboo NAND booting portStefan Roese2008-06-04-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a problem spotted by Eugene O'Brian (thanks Eugene) introduced by the commit: ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S With this patch SDRAM will get initialized again and booting from NAND is working again. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
| * | | | ppc4xx: Cleanup CPCI405 variant's config fileMatthias Fuchs2008-06-03-93/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes some dead code from CPCI405 board's config files. JFFS2 support is also removed. It's not used and CPCI4052 does not build anymore without some size reduction. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
| * | | | Remove shell variable UNDEF_SYM.Kenneth Johansson2008-06-03-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UNDEF_SYM is a shell variable in the main Makefile used to force the linker to add all u-boot commands to the final image. It has no use here. Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
| * | | | ppc4xx: Remove implementations of testdram()Stefan Roese2008-06-03-538/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the used testdram() implementations of the board that are maintained by myself. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Remove superfluous dram_init() call or replace it by initdram()Stefan Roese2008-06-03-286/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically the 405 U-Boot port had a dram_init() call in early init stage. This function was still called from start.S and most of the time coded in assembler. This is not needed anymore (since a long time) and boards should implement the common initdram() function in C instead. This patch now removed the dram_init() call from start.S and removes the empty implementations that are scattered through most of the 405 board ports. Some older board ports really implement this dram_init() though. These are: csb272 csb472 ERIC EXBITGEN W7OLMC W7OLMG I changed those boards to call this assembler dram_init() function now from their board specific initdram() instead. This *should* work, but please test again on those platforms. And it is perhaps a good idea that those boards use some common 405 SDRAM initialization code from cpu/ppc4xx at some time. So further patches welcome here. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC codeStefan Roese2008-06-03-2/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Fix common ECC generation code for 440GP style platformsStefan Roese2008-06-03-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the common 4xx ECC code really usable on 440GP style platforms. Since the IBM DDR controller used on 440GP/GX/EP/GR is not register compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT we need to make some processor dependant defines used later on by the driver. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Change Kilauea to use the common DDR2 init functionStefan Roese2008-06-03-271/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the kilauea and kilauea_nand (for NAND booting) board port to not use a board specific DDR2 init routine anymore. Now the common code from cpu/ppc4xx is used. Thanks to Grant Erickson for all his basic work on this 405EX early bootup. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2Stefan Roese2008-06-03-0/+1156
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all ppc4xx related SDRAM/DDR/DDR2 controller defines. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1Stefan Roese2008-06-03-1461/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes all SDRAM related defines from the PPC4xx headers ppc405.h and ppc440.h. This is needed since now some 405 PPC's use the same SDRAM controller as 440 systems do (like 405EX and 440SP). It also introduces new defines for the equipped SDRAM controller based on which PPC variant is used. There new defines are: used on 405GR/CR/EP and some Xilinx Virtex boards. used on 440GP/GX/EP/GR. used on 440EPx/GRx. used on 405EX/r/440SP/SPe/460EX/GT. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.SStefan Roese2008-06-03-132/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch consolidates the 405 and 440 parts of the NAND booting code selected via CONFIG_NAND_SPL. Now common code is used to initialize the SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc. Only *after* running from this location, nand_boot() is called. Please note that the initsdram() call is now moved from nand_boot.c to start.S. I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
| * | | | ppc4xx: Enable Primordial Stack for 40x and Unify ECC HandlingGrant Erickson2008-06-03-444/+330
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (Part 2 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | ppc4xx: Enable Primordial Stack for 40x and Unify ECC HandlingGrant Erickson2008-06-03-274/+723
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (Part 1 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | PPC4xx: Simplified post_word_{load, store}Grant Erickson2008-06-03-15/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch simplifies post_word_{load,store} by using the preprocessor to eliminate redundant, copy-and-pasted code. Signed-off-by: Grant Erickson <gerickson@nuovations.com>
| * | | | Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-06-03-13672/+15233
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* | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxWolfgang Denk2008-06-11-1561/+3221
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: include/asm-ppc/fsl_lbc.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | | | | FSL LAW: Add new interface to use the last free LAWKumar Gala2008-06-11-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LAWs have the concept of priority so its useful to be able to allocate the lowest (highest number) priority. We will end up using this with the new DDR code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | 85xx/86xx: Move to dynamic mgmt of LAWsKumar Gala2008-06-11-127/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the new LAW interface (set_next_law) we can move to letting the system allocate which LAWs are used for what purpose. This makes life a bit easier going forward with the new DDR code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com> Acked-by: Becky Bruce <becky.bruce@freescale.com>
| * | | | | FSL LAW: Keep track of LAW allocationsKumar Gala2008-06-11-25/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make it so we keep track of which LAWs have allocated and provide a function (set_next_law) which can allocate a LAW for us if one is free. In the future we will move to doing more "dynamic" LAW allocation since the majority of users dont really care about what LAW number they are at. Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | | | 85xx: remove dummy board_early_init_fKumar Gala2008-06-11-44/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | MPC8544DS: Update config.hKumar Gala2008-06-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Enable flash progress * remove CLEAR_LAW0 since we dont really use it Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | 85xx: Remove unused and unconfigured memory test code.Kumar Gala2008-06-11-275/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | Socrates: Added FPGA base address update in FDT.Sergei Poselenov2008-06-11-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | | | Socrates: NAND support added. Changed the U-Boot base address andSergei Poselenov2008-06-11-4/+227
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | | | NAND: Added support for 128-bit OOB, adaptedSergei Poselenov2008-06-11-14/+34
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | | | Socrates: added missed file with UPMA configuration data.Sergei Poselenov2008-06-11-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | Signed-of-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | | | Socrates: Added FPGA mapping. LAWs and TLBs cleanup.Sergei Poselenov2008-06-11-30/+27
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | | | Added the upmconfig() function for 85xx.Sergei Poselenov2008-06-11-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-12-21 01:54:58 +0000