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* fsl-ddr: Allow system to boot if we have more than 4G of memoryKumar Gala2009-02-16-1/+1
| | | | | | | | | | Previously if we >=4G of memory and !CONFIG_PHYS_64BIT we'd report an error and hang. Instead of doing that since DDR is mapped in the lowest priority LAWs we setup the DDR controller and the max amount of memory we report back is what we can map (CONFIG_MAX_MEM_MAPPED) Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
* mpc85xx: Add support for the P2020Srikanth Srinivasan2009-02-16-5/+32
| | | | | | | | | | | Added various p2020 processor specific details: * SVR for p2020, p2020E * immap updates for LAWs and DDR on p2020 * LAW defines related to p2020 Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: print boot header info to distinquish 36-bit addr map on MPC8572 DSKumar Gala2009-02-16-2/+6
| | | | | | | | Added some info that is printed out when we boot to distiquish if we built MPC8572DS_config vs MPC8572DS_36BIT_config since they have different address maps. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Fixup SGMII PHY ids in the device treeAndy Fleming2009-02-16-0/+79
| | | | | | | | | | | The device tree's PHY addresses need to be fixed up if we're using the SGMII Riser Card. The 8572, 8536, and 8544 DS boards were modified to call this function. Code idea taken from Liu Yu <yu.liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Make some minor whitespace changes to eliminate line-wrappingAndy Fleming2009-02-16-15/+16
| | | | Signed-off-by: Andy Fleming <afleming@freescale.com>
* Add eth_get_dev_by_indexAndy Fleming2009-02-16-0/+22
| | | | | | This allows code to iterate through the ethernet devices Signed-off-by: Andy Fleming <afleming@freescale.com>
* 85xx: Fix bug in device tree setup in 36-bit physical confgKumar Gala2009-02-16-1/+2
| | | | | | | | | | In the 36-bit physical config for MPC8572DS when need the start address of memory and it size to be kept in phys_*_t instead of a ulong since we support >4G of memory in the config and ulong cant represent that. Otherwise we end up seeing the memory node in the device tree reporting back we have memory starting @ 0 and of size 0. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Fix address map for 36-bit config of MPC8572DSKumar Gala2009-02-16-5/+10
| | | | | | | | | | When we introduced the 36-bit config of the MPC8572DS board we had the wrong PCI MEM bus address map. Additionally, the change to the address map exposes a small issue in our dummy read on the ULI bus. We need to use the new mapping functions to handle that read properly in the 36-bit config. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Fix how we map DDR memoryKumar Gala2009-02-16-48/+31
| | | | | | | | | Previously we only allowed power-of-two memory sizes and didnt handle >2G of memory. Now we will map up to CONFIG_MAX_MEM_MAPPED and should properly handle any size that we can make in the TLBs we have available to us Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controllerKumar Gala2009-02-16-0/+4
| | | | | | | | If we only have one controller we can completely ignore how memctl_intlv_ctl is set. Otherwise other levels of code get confused and think we have twice as much memory. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Format cpu freq printing to handle 8 coresKumar Gala2009-02-16-3/+5
| | | | | | | Only print 4 cpu freq per line. This way when we have 8 cores its a bit more readable. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2009-02-15-12/+11
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| * USB: Remove LUN number from CDBAbraham, Thomas2009-02-15-5/+0
| | | | | | | | | | | | | | The LUN number is not part of the Command Descriptor Block (CDB) for scsi inquiry, request sense, test unit ready, read capacity and read10 commands. This patch removes the LUN number information from the CDB. Signed-off-by: Thomas Abraham <t-abraham@ti.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
| * Added usbtty_configured() check. Fixed attribute(packed) warnings.Atin Malaviya2009-02-15-7/+11
| | | | | | | | | | | | | | | | | | | | | | V3: Fixed line-wrap problem due to user error in mail! Added usb_configured() checks in usbtty_puts() and usbtty_putc() to get around a hang when usb is not connected and the user has set up multi-io (setenv stdout serial,usbtty etc). Got rid of redundant __attribute__((packed)) directives that were causing warnings from gcc. Signed-off-by: Atin Malaviya <atin.malaviya@gmail.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2009-02-15-14/+6
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| * i.MX31: Start the I2C clock on driver initialisationGuennadi Liakhovetski2009-02-14-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | i.MX31 powers on with most clocks running, so, after a power on this explicit clock start up is not required. However, as Linux boots it disables most clocks to save power. This includes the I2C clock. If we then soft reboot from Linux the I2C clock stays off. This breaks the phycore, which has its environment in I2C EEPROM. Fix the problem by explicitly starting the clock in I2C driver initialisation routine. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Ack-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * i2c.h: drop i2c_reg_{read, write} hack for Blackfin partsMike Frysinger2009-02-12-14/+0
| | | | | | | | | | | | | | The Blackfin i2c driver has been rewritten thus the special ifdefs in the common code are no longer needed. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2009-02-12-44/+59
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| * | ppc4xx: Add README entry for CONFIG_PCI_DISABLE_PCIEDirk Eibach2009-02-12-0/+4
| | | | | | | | | | | | | | | Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Fix initialization of the SDRAM_CODT registerCarolyn Smith2009-02-12-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the initialization of the SDRAM_CODT register in the ppc4xx DDR2 initialization code. It also removes use of the SDRAM_CODT_FEEDBACK_RCV_SINGLE_END and SDRAM_CODT_FEEDBACK_DRV_SINGLE_END #define's since they are reserved bits. Signed-off-by: Carolyn Smith <carolyn.smith@tektronix.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Fix problem with board_eth_init() vs cpu_eth_init() on AMCC boardsStefan Roese2009-02-12-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Some AMCC eval boards do have a board_eth_init() function calling pci_eth_init(). These boards need to call cpu_eth_init() explicitly now with the new eth_init rework. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Autocalibration can set RDCC to over aggressive value.Adam Graham2009-02-12-36/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The criteria of the AMCC SDRAM Controller DDR autocalibration U-Boot code is to pick the largest passing write/read/compare window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample Cycle Select value. On some Kilauea boards the DDR autocalibration algorithm can find a large passing write/read/compare window with a small SDRAM_RDCC.[RDSS] aggressive value of Read Sample Cycle Select value "T1 Sample". This SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" proves to be to aggressive when later on U-Boot relocates into DDR memory and executes. The memory traces on the Kilauea board are short so on some Kilauea boards the SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" shows up as a potentially valid value for the DDR autocalibratiion algorithm. The fix is to define a weak default function which provides the minimum SDRAM_RDCC.[RDSS] Read Sample Cycle Select value to accept for DDR autocalibration. The default will be the "T2 Sample" value. A board developer who has a well defined board and chooses to be more aggressive can always provide their own board specific string function with the more aggressive "T1 Sample" value or stick with the default minimum SDRAM_RDCC.[RDSS] value of "T2". Also put in a autocalibration loop fix for case where current write/read/compare passing window size is the same as a prior window size, then in this case choose the write/read/compare result that has the associated smallest RDCC T-Sample value. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Fix problem with CONFIG_MAX_MEM_MAPPED in include/asm-ppc/config.hStefan Roese2009-02-12-3/+2
| |/ | | | | | | | | | | | | | | | | | | CONFIG_SDRAM_PPC4xx_IBM_DDR2 is not set when include/asm-ppc/config.h is included. So for katmai, CONFIG_MAX_MEM_MAPPED will get set to 256MB. It makes perfect sense to set CONFIG_MAX_MEM_MAPPED to 2GB for all PPC4xx boards right now. Signed-off-by: Stefan Roese <sr@denx.de>
* | 82xx, mgcoge: fix compile errorHeiko Schocher2009-02-12-0/+1
|/ | | | | | | | | | | | With actual u-boot compiling the mgcoge port fails, because since commit ba705b5b1a97b47388ed48858bef6bf7b6bfcd56 it is necessary to define CONFIG_NET_MULTI. Seems to me the mgcoge port is the only actual existing 8260 port who uses CONFIG_ETHER_ON_SCC, so no other 8260 port needed to be fixed. Signed-off-by: Heiko Schocher <hs@denx.de>
* Coding style cleanup; update CHANGELOGWolfgang Denk2009-02-12-54/+2440
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add feature-removal-schedule.txtPeter Tyser2009-02-11-0/+37
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* 8xx serial, smc: Coding-Style cleanup serial SMC driverHeiko Schocher2009-02-11-48/+24
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* 8xx serial, smc: add configurable SMC Rx buffer lenHeiko Schocher2009-02-11-38/+58
| | | | | | | | | | | | | | This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. With this option it is possible to allow the receive buffer for the SMC on 8xx to be greater then 1. In case CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the old version. When defining CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE must be defined to setup the maximum idle timeout for the SMC. Signed-off-by: Heiko Schocher <hs@denx.de>
* common/{hush, kgdb, serial}.c: build by COBJS-$(...) in MakefileMike Frysinger2009-02-11-16/+3
| | | | | | | | Move global '#ifdef CONFIG_xxx .... #endif' out of the .c files and into the COBJS-$(CONFIG_xxx) in the Makefile. Also delete unused var in kgdb code in the process. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* bzip2: move ifdef handling to Makefile COBJS-$(...)Mike Frysinger2009-02-11-20/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Fix whitespace damage: double space changed to a tabJerry Van Baren2009-02-11-6/+6
| | | | | | | | | | At some point an intentional double space at the end of the sentence got changed into a tab in the GPL header line: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the This patch fixes the damage. Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
* Merge branch 'master' of git://git.denx.de/u-boot-cfi-flashWolfgang Denk2009-02-11-1/+4
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| * cfi: make flash_get_info() non staticHeiko Schocher2009-02-11-1/+4
| | | | | | | | | | | | | | | | | | | | | | If on your board is more than one flash, you must know the size of every single flash, for example, for updating the DTS before booting Linux. So make this function flash_get_info() extern, and you can have all info about your flashes. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | net: removed board-specific CONFIGs from MPC5xxx FEC driverBen Warren2009-02-09-52/+48
| | | | | | | | | | | | | | Added new CONFIG options for the three type of MAC-PHY interconnect and applied them all relevant board config files Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | net/sntp.c: move ifdef into Makefile COBJS-$(...)Mike Frysinger2009-02-09-5/+1
| | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | tsec: Fix a bug in soft-resettingAndy Fleming2009-02-09-0/+1
| | | | | | | | | | | | | | | | | | | | SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30 clock cycles, so it's been mostly working. But we had no guarantee, and at slower bitrates, it's just over a microsecond (over 1000 clock cycles). This enforces a 2 microsecond gap between assertion and deassertion. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Fix 100Mbs ethernet operation on sh7763 based boardsSimon Munton2009-02-09-1/+1
| | | | | | | | | | | | | | | | 100Mbs ethernet does not work on sh7763 chips due to the wrong value being used in the GECMR register. Following diff fixes the problem Signed-off-by: Simon Munton <simon@nidoran.m5data.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Fix MPC8260 with ethernet on SCCksi@koi8.net2009-02-09-1/+1
|/ | | | | | | | This fixes MPC8260 compilation with ethernet on SCC. Probably was a typo or something... Signed-off-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* 82xx serial, smc: Coding-Style cleanup serial SMC driverHeiko Schocher2009-02-10-36/+18
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* 82xx serial, smc: add configurable SMC Rx buffer lenHeiko Schocher2009-02-10-37/+68
| | | | | | | | | | | | | | This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. With this option it is possible to allow the receive buffer for the SMC on 82xx to be greater then 1. In case CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the old version. When defining CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE must be defined to setup the maximum idle timeout for the SMC. Signed-off-by: Heiko Schocher <hs@denx.de>
* ppc: Fix roll over bug in flush_cache()Kumar Gala2009-02-10-2/+4
| | | | | | | | If we call flush_cache(0xfffff000, 0x1000) it would never terminate the loop since end = 0xffffffff and we'd roll over our counter from 0xfffffe0 to 0 (assuming a 32-byte cache line) Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc: Move CONFIG_MAX_MEM_MAPPED to common config.hKumar Gala2009-02-10-6/+8
| | | | | | | | Moved CONFIG_MAX_MEM_MAPPED to the asm/config.h so its kept consistent between the two current users (lib_ppc/board.c, 44x SPD DDR2). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de>
* Add an architecture specific config.h for common definesKumar Gala2009-02-10-0/+289
| | | | | | | | | | We have common defines that we duplicate in various ways. Having an arch specific config.h gives us a common location for those defines. Eventually we should be able to replace this when we have proper Kconfig support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8641hpcn: Change PCI MEM pci bus addressBecky Bruce2009-02-10-1/+10
| | | | | | | | | | Now that the rest of u-boot can support it, change the PCI bus address of the PCI MEM regions from 0x80000000 to 0xc0000000, and use the same bus address for both PCI1 and PCI2. This will maximize the amount of PCI address space left over to map RAM on systems with large amounts of memory. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* drivers/block/ahci: Fix pci mapping bugBecky Bruce2009-02-10-5/+2
| | | | | | | | The code assumes that the pci bus address and the virtual address used to access a region are the same, but they might not be. Fix this assumption. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* MPC8641HPCN: Enable CONFIG_ADDR_MAPBecky Bruce2009-02-10-0/+2
| | | | Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* mpc8641hpcn: Clean up PCI mapping conceptsBecky Bruce2009-02-10-11/+16
| | | | | | | | | Clean up PCI mapping concepts in the 8641 config - rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* mpc86xx: Add support to populate addr map based on BATsBecky Bruce2009-02-10-4/+69
| | | | | | | If CONFIG_ADDR_MAP is enabled, update the address map whenever we write a bat. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* powerpc: Move duplicated BAT defines to mmu.hBecky Bruce2009-02-10-183/+64
| | | | | | | | | | | The BAT fields are architected; there's no need for these to be in cpu-specific files. Drop the duplication and move these to include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only used by the alaska board, and switch to using the BATU_BL_xxx defines used by all the other boards. The BL_ defines previously in use had to be shifted into the proper position for use, which was inefficient. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* drivers/pci: Create pci_map_bar functionBecky Bruce2009-02-10-4/+43
| | | | | | | | It is no longer always true that the pci bus address can be used as the virtual address for pci accesses. pci_map_bar() is created to return the virtual address for a pci region. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
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