| Commit message (Collapse) | Author | Age | Lines |
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Freescale application note AN3638 describes an update to the NXID format,
which stores MAC addresses and related data on an on-board EEPROM. The new
version adds support for up to 23 MAC addresses, instead of just 8. Since
the initial implementation of NXID had a "0" in the 'version' field, this
new version is called "v1".
Boards that are shipped with EEPROMs in the NXID v1 format should define
CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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pumping line-rate traffic though a p4080 rev.2, which
is configured to encrypt packets prior to forwarding through
an IPsec tunnel, gets this error:
of_platform ffe302000.jq: DECO: desc idx 22: LIODN error. DECO was trying
to share from itself or from another DECO but the two Non-SEQ LIODN
values didn't match or the "shared from" DECO's Descriptor required that
the SEQ LIODNs be the same and they aren't.
Since high traffic rates cause DECOs to begin to start sharing
shared descriptors amongst themselves, and DECOs inherit job queue
LIODNs when accessing shared descriptors, and a recently discovered
rev.2 h/w erratum requires all sharing job queues in a partition
have same liodn assignment, reassign the first job queue's liodn
assignment to the rest.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Manual was updated to add a new register for disabling CDQ speculation.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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We configure the controller but dont have virtual address space thus any
devices on the 4th controller are not accessible in u-boot.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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* Make the U-Boot update command sequence conditional. Helps prevent
accidental erasing if an upload or previous step fails
* Make it easier to update other FLASH banks
* Enable DDR controller cache line interleaving and bank cs0/cs1 by default
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Update the code which writes to the on-board EEPROM so that it can detect if
the write failed because the EEPROM is write-protected. Most of the 8xxx-class
Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and
similar information. With this patch, if the EEPROM is protected, the
"mac save" command will display an error message indicating that the write
has not succeeded.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled. Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.
The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.
Also configure a pin muxing to select some SSI signals, which will disable
I2C1.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Enable half drive strength, set RTT to 60Ohm and set write leveling override.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32 calculation for ENV than it should
do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it
to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The OTP code does a little shuffling of arguments that aren't really
necessary, so use a local variable instead to fix build errors now
that the args[] parameter is const.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Building this board for parallel flash fills up the bss section and thus
fails to link, so bump up the monitor size a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than use a hardcoded "7", use the new Blackfin global define.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The current size used (256KiB) is smaller than the LDR created for
the bf548-ezkit, so 'run update' doesn't work correctly. So bump
up the size a bit by making this flexible per-board config.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The board includes:
* ADSP-BF561 rev. 0.5
* 32-bit SDRAM (2 * MT48LC16M16A2TG or MT48LC32M16A2TG)
* Gigabit Ether AX88180 (ASIX) + 88E1111 rev. B2 (Marvell)
* SPI boot flash on PF2 (M25P64 8MB, or M25P128 16 MB)
* FPGA boot flash on PF3 (M25P64 8MB, or M25P128 16 MB)
* Spartan6-LX150 (memory-mapped; both PPIs also connected)
* See http://www.skutek.com/
Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Since we're no longer extracting the env from the target ELF file (since
upstream wouldn't take that change), we're back to the problem of cpu
defines not properly propagating to the env setup stage. So the embedded
env built by the host compiler doesn't match the one that is linked into
the u-boot env.
Reported-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The intention all along was to accept pin names irrelevant of their case.
But I guess I forgot to test/implement support for that.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We need to use the Blackfin BootROM-specific OOB layout when we boot out
of NAND as that is what the on-chip ROM expects.
Also need to increase the monitor size a little to accommodate the extra
NAND code overhead.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We use the lock/unlock options in our default nand code, so enabl
support for the options.
Reported-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Let people easily override bootdelay and network settings.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make the GPIO command usable in a scripting environment by returning
the GPIO value rather than always 0.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Support for the Blackfin System Development Platform (SDP) base module.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The input sub command was missing from the help text, and it didn't show
the actual value currently read on the GPIO. This allows people to read
the value of input pins.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The CONFIG_BFIN_CPU option is largely used in the build system, so move
it out of the board config.h and into the board config.mk. It'd be nice
to keep everything in the config.h, but the patch to extract that value
early was rejected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Only the BF561 port was using the common dual core headers, so merge them
into the BF561 specific headers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Only the BF533 port was using the common extended headers, so merge them
into the BF533 specific headers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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These are unused now, so punt them to clean things up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
For the GPIO MMR usage, convert to the new GPIO framework.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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There is no BF541 processor variant, so punt headers for it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Simplify the command setup and status checking steps, and add a proper
timeout to the status polling code to avoid possible infinite hangs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This moves the last piece from the old spi_flash driver to the new SPI
framework -- optional DMA RX support. This typically cuts speeds by ~40%
at the cost of additional ~300 bytes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The GPIO 16 and 19 reconfiguration should be done once USB is initialized.
So moved the reconfiguration to the USB init function.
Signed-off-by: Rupjyoti Sarmah <rsarmah@apm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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