summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134York Sun2011-02-03-1/+116
| | | | | | | | | | | | | Workaround for the following errata: DDR111 - MCKE signal may not function correctly at assertion of HRESET DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can calibrate to incorrect values These two workarounds must be implemented together because they touch common registers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Rename MPC8572 DDR erratum to DDR115York Sun2011-02-03-2/+5
| | | | | | | | Use unique erratum number instead of platform number. Enable command that reports errata on MPC8572DS. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable Errata command on MPC8572DSYork Sun2011-02-03-1/+1
| | | | | | | Also removed duplicate CONFIG_CMD_IRQ define. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Remove unnecessary polling loop from DDR initYork Sun2011-02-03-2/+0
| | | | | | | | This polling loop is not required normally, unless specifically stated in workaround. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)Kumar Gala2011-02-03-0/+10
| | | | | | | Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8, and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable ESDHC111 Erratum on P2010/P2020 SoCsKumar Gala2011-02-03-0/+2
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Prepare v2011.03-rc1v2011.03-rc1Wolfgang Denk2011-02-02-3/+3
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Minor Coding Style Cleanup.Wolfgang Denk2011-02-02-69/+68
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2011-02-02-681/+13132
|\
| * armv7: add support for s5pc210 universal boardMinkyu Kang2011-02-02-2/+978
| | | | | | | | | | | | | | This patch adds support for Samsung s5pc210 universal board Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * armv7: add support for S5PC210 SoCMinkyu Kang2011-02-02-0/+1056
| | | | | | | | | | | | | | S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * S5P: serial: Use the inline function instead of static valueMinkyu Kang2011-02-02-2/+5
| | | | | | | | Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * arm: a320evb: fixes for relocation supportPo-Yu Chuang2011-02-02-41/+11
| | | | | | | | | | | | | | | | | | * add CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR * do not update gd->bd in dram_init() because bd is unavailable then * move CONFIG_SYS_TEXT_BASE from config.mk to a320evb.h * remove config.mk Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
| * arm926ejs: timer: Replace bss variable by gdrHeiko Schocher2011-02-02-16/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm926ejs timers implementation. The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c and added suggestions from Reinhard Meyer. Tested on the arm926ejs mx27 based magnesium board Tested on the arm926ejs kirkwood based suen3 board Signed-off-by: Heiko Schocher <hs@denx.de> cc: Albert ARIBAUD <albert.aribaud@free.fr> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Stefano Babic <sbabic@denx.de> cc: Reinhard Meyer <u-boot@emk-elektronik.de>
| * remove (double) LED initialization in arm920t start.sJens Scharsig2011-02-02-3/+0
| | | | | | | | | | | | * remove LED initialization in front of relocation and bss init Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
| * arm1136: timer: Replace bss variable by gdHeiko Schocher2011-02-02-20/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the arm1136 timer driver for mx31 and omap24xx The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. This patch is similiar to the patch Dirk Behme posted for the armv7/omap-common/timer.c Tested on the mx31 based qong board Signed-off-by: Heiko Schocher <hs@denx.de> cc: Albert ARIBAUD <albert.aribaud@free.fr> Acked-by: Albert ARIBAUD <albert.aribaud@free.fr>
| * ARM: */start.S: code cleanupLiu Hui-R643432011-02-02-28/+0
| | | | | | | | | | | | | | Remove the useless code from start.S Signed-off-by: Jason Liu <r64343@freescale.com> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * ARM: Avoid compiler optimization for readb, writeb and friends.Alexander Holler2011-02-02-12/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc 4.5.1 seems to ignore (at least some) volatile definitions, avoid that as done in the kernel. Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that gcc version to ignore the volatile type qualifier used e.g. in __arch_getl(). Anyway, using a definition as in the kernel headers avoids such optimizations when gcc 4.5.1 is used. Maybe the headers as used in the current linux-kernel should be used, but to avoid large changes, I've just added a small change to the current headers. Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alessandro Rubini <rubini-list@gnudd.com> Tested-by: Thomas Weber <weber@corscience.de> Acked-by: Alexander Holler <holler@ahsoftware.de> Tested-by: Alexander Holler <holler@ahsoftware.de>
| * armv7: s5pc1xx: don't use function pointer for clock functionsMinkyu Kang2011-02-02-23/+27
| | | | | | | | | | | | | | | | Because of the bss area is cleared after relocation, we've lost pointers. This patch fixed it. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * DaVinci: Remove incorrect CONFIG optionSandeep Paulraj2011-02-02-6/+0
| | | | | | | | | | | | | | | | | | The option CONFIG_SOC_DM6447 seems to have ended up in the code by mistake. It is not used anywhere and there is no chip called DM6447. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DaVinci Sonata: Fix Build ErrorSandeep Paulraj2011-02-02-0/+1
| | | | | | | | | | | | | | Fix a build error in the DaVinci Sonata Board Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DaVinci DM6467: Fix Build ErrorSandeep Paulraj2011-02-02-0/+16
| | | | | | | | | | | | | | This commit fixes build errors on the DM6467 port. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DaVinci DM6467: Enhance board SupportSandeep Paulraj2011-02-02-2/+55
| | | | | | | | | | | | | | | | | | | | | | | | Support for DM6467 was incomplete and the build failed as well. Patches were sent to the list but have not been added. This enhances the DM6467 support. Some more patches will need to be sent to bring it in line with what is available in internal TI trees Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM: Update mach typesSandeep Paulraj2011-02-02-15/+2290
| | | | | | | | | | | | | | This commit updates the mach-types for ARM Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DaVinci DM6467: Added ET1011C (LSI) PHY supportSandeep Paulraj2011-02-02-1/+66
| | | | | | | | | | | | | | | | | | | | Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling ET1011C gigabit phy. which overrides get_link_speed function from default implementation. This enables output of 125 MHz reference clock on SYS_CLK pin. Signed-off-by: Prakash PM <prakash.pm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DaVinci EMAC: Add name to Ethernet deviceSandeep Paulraj2011-02-02-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Adds "DaVinci-EMAC" as the name of the device so that it gets printed as "Using DaVinci-EMAC device" during network access (dhcp, tftp) instead of empty name in "Using" statement.This name also gets reflected in 'ethact' env variable. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DaVinci EMAC: Fix davinci_eth_gigabit_enableSandeep Paulraj2011-02-02-3/+4
| | | | | | | | | | | | | | | | | | | | | | Enabling the gigabit was overwriting the previous configuration by setting up only GIGAFORCE and GIG bits of MAC control register. Modified to retain previous configuration while gigabit enabling. Signed-off-by: Prakash PM <prakash.pm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DM365: Fix Build ErrorSandeep Paulraj2011-02-02-1/+1
| | | | | | | | | | | | | | | | | | After the merger of the next branch, the DM365 was broken. A function used only by DA8xx based SOCs was being incorrectly called. So fix it. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DaVinci DM365: Adding MMC/SD support for DM365 EVMSandeep Paulraj2011-02-02-0/+71
| | | | | | | | | | | | The patch adds support for MMC/SD in the DM365 EVM Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DaVinci DM355: Adding MMC/SD support for DM355 EVMSandeep Paulraj2011-02-02-0/+63
| | | | | | | | | | | | The patch adds support for MMC/SD in the DM355 EVM Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * Davinci MMCSD SupportSandeep Paulraj2011-02-02-0/+583
| | | | | | | | | | | | | | | | | | | | Added support for MMC/SD cards for Davinci. This feature is enabled by CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC options. This is tested on DM355 and DM365 EVMs with both the available mmc controllers. Signed-off-by: Alagu Sankar <alagusankar@embwise.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * OMAP3: add CM-T35 boardMike Rapoport2011-02-02-2/+789
| | | | | | | | | | | | | | This patch adds support for CM-T35 board Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM: fix broken build of ARMStefano Babic2011-02-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8aba9dceebb14144e07d19593111ee3a999c37fc breaks ARM boards because for ARM the -pie option is used for partial linking together with -r option. The patch adds the -pie option to link u-boot.bin only. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <liu.h.jason@gmail.com> CC: lool@dooz.org CC: Wolfgang Denk <wd@denx.de> CC: Albert Aribaud <albert.aribaud@free.fr> Tested-by: Alexander Holler <holler@ahsoftware.de>
| * MXC: removed warnings from IMX51 ATA driverStefano Babic2011-02-02-3/+0
| | | | | | | | | | | | | | | | Drop warnings due to unused variables. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
| * MX5: Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bssStefano Babic2011-02-02-2/+4
| | | | | | | | | | | | | | | | | | | | The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. This patch is the same as recently applied for arm926js architecture. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de>
| * Add support for Freescale's mx35pdk board.Stefano Babic2011-02-02-1/+1304
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds suupport for the Freescale's mx35pdk board (known as well as mx35_3stack). The board boots from the NOR flash. Following devices are supported: - two ethernet devices (FEC and SMC911x on debug board) - I2C - PMIC (MC13892) via I2C interface - UART - NOR flash (64MB) - NAND flash (2GB) - basic access to mc9sdz60 registers via I2C interface Signed-off-by: Stefano Babic <sbabic@denx.de>
| * SPI: mxc_spi: replace fixed offsets with structuresStefano Babic2011-02-02-66/+63
| | | | | | | | | | | | | | | | This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * SPI: mxc_spi: add SPI clock calculation and setup to the driverAnatolij Gustschin2011-02-02-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de>
| * SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx caseAnatolij Gustschin2011-02-02-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de>
| * SPI: mxc_spi: add support for i.MX35 processorStefano Babic2011-02-02-24/+72
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * Add basic support for Freescale's mc9sdz60Stefano Babic2011-02-02-2/+138
| | | | | | | | | | | | | | | | The patch adds helper funtions for basic access to the registers of the MC9sdz60 chip (multifunctional device with RTC and CAN) via I2C interface. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * I2C: mxc_i2c: address failure with mx35 processorStefano Babic2011-02-02-18/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is sporadic failures when more as one I2C slave is on the bus and the processor tries to communicate with more as one slave. The problem was seen on a mx35pdk (two I2C slaves, PMIC controller and CAN/RTC chip). The current driver uses the IIF bit in the status register to check if the bus is busy or not. According to the manual, this is not correct, because the IIB bit should be checked. Not only, to check if a transfer is finished must be checked the ICF bit, and this is not tested at all. This patch comes from analyse with a corresponding driver provided by Freescale as part of the LTIB tool. Comparing the two drivers, it appears that the current u-boot driver checks the wrong bits, and depending on race condition, the transfer can be successful or not. The patch gets rid also of own debug function (DPRINTF), replaced with the general debug(). Tested on Freescale mx35pdk. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * I2C: mxc_i2c: get rid of __REG accessStefano Babic2011-02-02-28/+44
| | | | | | | | | | | | | | | | | | | | | | This driver accesses to processor's register via __REG macros, that are removed (or are planned to be removed) and replaced by C structures. This patches replaces all occurrencies of __REG macros. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * mxc_i2c: Add support for the i.MX35 processorStefano Babic2011-02-02-4/+5
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * serial_mxc: add support for Freescale's i.MX35 processorStefano Babic2011-02-02-9/+6
| | | | | | | | | | | | The patch adds UART support for the i.MX35 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * Add support for MX35 processorStefano Babic2011-02-02-0/+2093
| | | | | | | | | | | | | | | | | | | | | | The patch adds basic support for the Freescale's i.MX35 (arm1136 based) processor. The patch adds also a prototype for the initialization of the FEC(ethernet controller) to netdev.h to avoid warnings. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * iMX5: EfikaMX: Preliminary board supportMarek Vasut2011-02-02-0/+1122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Supported: MMC IDE PMIC SPI flash LEDs I can boot the kernel supplied by freescale/genesi with this from MMC card and/or PATA disk. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * imximage: Add MX53 boot image supportLiu Hui-R643432011-02-02-160/+487
| | | | | | | | | | | | | | | | | | This patch add the MX53 boot image support. This patch has been tested on Freescale MX53EVK board and MX51EVK board. Signed-off-by: Jason Liu <r64343@freescale.com>
| * MX51EVK: Use SWx macros in PMIC initMarek Vasut2011-02-02-3/+3
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * MC13892: Add SWx buck switchers definitionsMarek Vasut2011-02-02-0/+39
| | | | | | | | | | | | | | Define voltages configurable on SWx buck switchers. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
generated by cgit v1.1 at 2024-12-11 10:14:34 +0000