summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* DaVinci DM6467: Added ET1011C (LSI) PHY supportSandeep Paulraj2011-02-02-1/+66
| | | | | | | | | | Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling ET1011C gigabit phy. which overrides get_link_speed function from default implementation. This enables output of 125 MHz reference clock on SYS_CLK pin. Signed-off-by: Prakash PM <prakash.pm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci EMAC: Add name to Ethernet deviceSandeep Paulraj2011-02-02-0/+1
| | | | | | | | | | | | Adds "DaVinci-EMAC" as the name of the device so that it gets printed as "Using DaVinci-EMAC device" during network access (dhcp, tftp) instead of empty name in "Using" statement.This name also gets reflected in 'ethact' env variable. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci EMAC: Fix davinci_eth_gigabit_enableSandeep Paulraj2011-02-02-3/+4
| | | | | | | | | | | Enabling the gigabit was overwriting the previous configuration by setting up only GIGAFORCE and GIG bits of MAC control register. Modified to retain previous configuration while gigabit enabling. Signed-off-by: Prakash PM <prakash.pm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DM365: Fix Build ErrorSandeep Paulraj2011-02-02-1/+1
| | | | | | | | | After the merger of the next branch, the DM365 was broken. A function used only by DA8xx based SOCs was being incorrectly called. So fix it. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci DM365: Adding MMC/SD support for DM365 EVMSandeep Paulraj2011-02-02-0/+71
| | | | | | The patch adds support for MMC/SD in the DM365 EVM Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* DaVinci DM355: Adding MMC/SD support for DM355 EVMSandeep Paulraj2011-02-02-0/+63
| | | | | | The patch adds support for MMC/SD in the DM355 EVM Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Davinci MMCSD SupportSandeep Paulraj2011-02-02-0/+583
| | | | | | | | | | Added support for MMC/SD cards for Davinci. This feature is enabled by CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC options. This is tested on DM355 and DM365 EVMs with both the available mmc controllers. Signed-off-by: Alagu Sankar <alagusankar@embwise.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP3: add CM-T35 boardMike Rapoport2011-02-02-2/+789
| | | | | | | This patch adds support for CM-T35 board Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: fix broken build of ARMStefano Babic2011-02-02-1/+1
| | | | | | | | | | | | | | | Commit 8aba9dceebb14144e07d19593111ee3a999c37fc breaks ARM boards because for ARM the -pie option is used for partial linking together with -r option. The patch adds the -pie option to link u-boot.bin only. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <liu.h.jason@gmail.com> CC: lool@dooz.org CC: Wolfgang Denk <wd@denx.de> CC: Albert Aribaud <albert.aribaud@free.fr> Tested-by: Alexander Holler <holler@ahsoftware.de>
* MXC: removed warnings from IMX51 ATA driverStefano Babic2011-02-02-3/+0
| | | | | | | | Drop warnings due to unused variables. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* MX5: Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bssStefano Babic2011-02-02-2/+4
| | | | | | | | | | The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. This patch is the same as recently applied for arm926js architecture. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de>
* Add support for Freescale's mx35pdk board.Stefano Babic2011-02-02-1/+1304
| | | | | | | | | | | | | | | | | The patch adds suupport for the Freescale's mx35pdk board (known as well as mx35_3stack). The board boots from the NOR flash. Following devices are supported: - two ethernet devices (FEC and SMC911x on debug board) - I2C - PMIC (MC13892) via I2C interface - UART - NOR flash (64MB) - NAND flash (2GB) - basic access to mc9sdz60 registers via I2C interface Signed-off-by: Stefano Babic <sbabic@denx.de>
* SPI: mxc_spi: replace fixed offsets with structuresStefano Babic2011-02-02-66/+63
| | | | | | | | This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de>
* SPI: mxc_spi: add SPI clock calculation and setup to the driverAnatolij Gustschin2011-02-02-1/+22
| | | | | | | | | | | | | The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de>
* SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx caseAnatolij Gustschin2011-02-02-5/+4
| | | | | | | | | | | | | | | We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de>
* SPI: mxc_spi: add support for i.MX35 processorStefano Babic2011-02-02-24/+72
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* Add basic support for Freescale's mc9sdz60Stefano Babic2011-02-02-2/+138
| | | | | | | | The patch adds helper funtions for basic access to the registers of the MC9sdz60 chip (multifunctional device with RTC and CAN) via I2C interface. Signed-off-by: Stefano Babic <sbabic@denx.de>
* I2C: mxc_i2c: address failure with mx35 processorStefano Babic2011-02-02-18/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is sporadic failures when more as one I2C slave is on the bus and the processor tries to communicate with more as one slave. The problem was seen on a mx35pdk (two I2C slaves, PMIC controller and CAN/RTC chip). The current driver uses the IIF bit in the status register to check if the bus is busy or not. According to the manual, this is not correct, because the IIB bit should be checked. Not only, to check if a transfer is finished must be checked the ICF bit, and this is not tested at all. This patch comes from analyse with a corresponding driver provided by Freescale as part of the LTIB tool. Comparing the two drivers, it appears that the current u-boot driver checks the wrong bits, and depending on race condition, the transfer can be successful or not. The patch gets rid also of own debug function (DPRINTF), replaced with the general debug(). Tested on Freescale mx35pdk. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* I2C: mxc_i2c: get rid of __REG accessStefano Babic2011-02-02-28/+44
| | | | | | | | | | | This driver accesses to processor's register via __REG macros, that are removed (or are planned to be removed) and replaced by C structures. This patches replaces all occurrencies of __REG macros. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* mxc_i2c: Add support for the i.MX35 processorStefano Babic2011-02-02-4/+5
| | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* serial_mxc: add support for Freescale's i.MX35 processorStefano Babic2011-02-02-9/+6
| | | | | | The patch adds UART support for the i.MX35 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
* Add support for MX35 processorStefano Babic2011-02-02-0/+2093
| | | | | | | | | | | The patch adds basic support for the Freescale's i.MX35 (arm1136 based) processor. The patch adds also a prototype for the initialization of the FEC(ethernet controller) to netdev.h to avoid warnings. Signed-off-by: Stefano Babic <sbabic@denx.de>
* iMX5: EfikaMX: Preliminary board supportMarek Vasut2011-02-02-0/+1122
| | | | | | | | | | | | | | Supported: MMC IDE PMIC SPI flash LEDs I can boot the kernel supplied by freescale/genesi with this from MMC card and/or PATA disk. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* imximage: Add MX53 boot image supportLiu Hui-R643432011-02-02-160/+487
| | | | | | | | | This patch add the MX53 boot image support. This patch has been tested on Freescale MX53EVK board and MX51EVK board. Signed-off-by: Jason Liu <r64343@freescale.com>
* MX51EVK: Use SWx macros in PMIC initMarek Vasut2011-02-02-3/+3
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* MC13892: Add SWx buck switchers definitionsMarek Vasut2011-02-02-0/+39
| | | | | | | Define voltages configurable on SWx buck switchers. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mxc_nand: add support for i.MX35 processorStefano Babic2011-02-02-3/+3
| | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* BLOCK: Add freescale IMX51 PATA driverMarek Vasut2011-02-02-0/+150
| | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
* MX5:MX53: add initial support for MX53EVK boardLiu Hui-R643432011-02-02-0/+784
| | | | | | | Add initial support for MX53EVK board support. FEC, SD/MMC, UART, I2C, have been supported. Signed-off-by: Jason Liu <r64343@freescale.com>
* fsl_pmic: add I2C interface supportLiu Hui-R643432011-02-02-5/+40
| | | | | | This patch add I2C interface for fsl_pmic driver support Signed-off-by: Jason Liu <r64343@freescale.com>
* mxc_i2c: add support for MX53 processorLiu Hui-R643432011-02-02-3/+18
| | | | | | This patch add I2C support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
* mxc_gpio: add support for MX53 processorLiu Hui-R643432011-02-02-2/+7
| | | | | | This patch add mxc_gpio support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
* serial_mxc: add support for MX53 processorLiu Hui-R643432011-02-02-0/+6
| | | | | | This patch add UART support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
* fec_mxc: add support for MX53 processorLiu Hui-R643432011-02-02-3/+3
| | | | | | This patch add FEC support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
* MX5: Add initial support for MX53 processorLiu Hui-R643432011-02-02-208/+599
| | | | | | | | | | Add initial support for Freescale MX53 processor, - Add the iomux support and the pin definition, - Add the regs definition, clean up some unused def from mx51, - Add the low level init support, make use the freq input of setup_pll macro Signed-off-by: Jason Liu <r64343@freescale.com>
* MX51EVK: UART does not print out the early informationLiu Hui-R643432011-02-02-3/+10
| | | | | | | | | | | | | | The early bootup information is not print out due to the UART pin iomux not set up correctly before board_init Add the board_early_init_f function and enable the CONFIG_BOARD_EARLY_INIT_F. Move the UART pin setting from board_init to board_early_init_f function. This patch also move the FEC pin iomux setup to the board_early_init_f. Signed-off-by: Jason Liu <r64343@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-01-31-1/+848
|\
| * mpq101: initial support for Mercury Computer Systems MPQ101 boardAlex Dubov2011-01-26-0/+847
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mpq101 is a RapidIO development board in AMC form factor, featuring MPC8548 processor, 512MB of hardwired DDR2 RAM, 128MB of hardwired NAND flash memory, real time clock and additional serial EEPROM on i2c bus (enabled). USB controller is available, but not presently enabled. Additional board information is available at: http://www.mc.com/products/boards/ensemble_mpq101_rapidio_powerquicc_iii.aspx Environment is configured to precede the actual u-boot image so that it's located at the beginning of flash erase block (made necessary by the recent changes to the embedded environment handling). This is achieved by means of custom ld script. Signed-off-by: Alex Dubov <oakad@yahoo.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * p1022ds: fix pixis_reset altbankYork Sun2011-01-26-1/+1
| | | | | | | | | | | | | | | | | | Fix the bits for ngpixis to reset to alternative bank. Originally the mask was 0xE0, which left it possible to reset to bank 3 if DIP switch is set to boot from bank 1. Changing to 0xF0 gurantees to reset to bank 2. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2011-01-31-3/+1
|\ \
| * | Fix at91 includes in soft_i2c driverRyan Mallon2011-01-27-3/+1
| |/ | | | | | | | | | | | | | | Make at91 header includes in soft_i2c depend only on CONFIG_AT91FAMILY rather than individual SoCs. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Acked-by: Reinhard Meyer<u-boot@emk-elektronik.de>
* | lcd: align fb writing address for horizontal display offsetLiu Ying2011-01-27-1/+1
|/ | | | | | | | | CONFIG_SPLASH_SCREEN_ALIGN makes uboot support display offset for splashimage. The framebuffer writing address should be calculated according to different kinds of framebuffer pixel format, i.e., bits per pixel value. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* Divides variable of linker flags to LDFLAGS-u-boot and LDFLAGSNobuhiro Iwamatsu2011-01-25-11/+17
| | | | | | | | | | Linker needs to use the proper endian/bfd flags even when doing partial linking. LDFLAGS_u-boot sets linker option which is called it when U-boot is built (u-boot final). LDFLAGS sets necessary option by partial linking (use in cmd_link_o_target). CC: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ftpmu010: support faraday ftpmu010 driverMacpaul Lin2011-01-25-0/+66
| | | | | | | | | Faraday's ftpmu010 is a power managemnet unit which support cpu sleep and frequency scaling. It has been integrated into many SoC. This patch also move ftpmu010 to a proper place for later enhancement. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* powerpc: Fix FPU post related link warningsKumar Gala2011-01-25-16/+16
| | | | | | | | | | | | | | | | | | | | | | If we built POST on PPC's that didn't enable CONFIG_SYS_POST_FPU we'd get the following warning with newer toolchains: powerpc-linux-gnu-ld: Warning: lib_powerpc/fpu/libpostpowerpcfpu.o uses hard float, libpost.o uses soft float We actually worked around this sometime ago with the following commit: commit ce82ff05388b5ddafdf6082ef0776cce72c40b1c Author: Yuri Tikhonov <yur@emcraft.com> Date: Sat Dec 20 14:54:21 2008 +0300 FPU POST: fix warnings when building with 2.18 binutils However, this only took into effect if CONFIG_SYS_POST_FPU was enabled. We can simply move the GNU_FPOST_ATTR out of the CONFIG_SYS_POST_FPU ifdef block to address the issue. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* UEC: Fix compiler warnings introduced by linux/mii.h changeKumar Gala2011-01-25-19/+9
| | | | | | | | | | | | | | | | | | | | | | | Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced the following compiler warnings in the uec ethernet driver: In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0, from uec.c:32: /local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined uec_phy.h:34:0: note: this is the location of the previous definition /local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined uec_phy.h:35:0: note: this is the location of the previous definition In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0, from uec_phy.c:27: /local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined uec_phy.h:34:0: note: this is the location of the previous definition /local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined uec_phy.h:35:0: note: this is the location of the previous definition Fix them be removing the duplication in the uec code and utlizing the linux/mii.h version instead. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-01-25-438/+1940
|\
| * powerpc/8xxx: Fix compile warning when build for a DDR1 or DDR2 boardKumar Gala2011-01-24-1/+1
| | | | | | | | | | | | | | | | | | ctrl_regs.c: In function 'set_ddr_sdram_mode_2': ctrl_regs.c:690:6: warning: unused variable 'i' 'i' is only used by DDR3 code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Protect all LBC code with CONFIG_FSL_LBCDipen Dudhat2011-01-19-2/+13
| | | | | | | | | | | | | | | | | | Future SoC (like the P1010) replace the LBC controller with the new IFC (Integrated Flash Controller) so ensure we properly protect code that is related to the LBC. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * ppc/85xx: Fix compile err when PCI disabled on P1_P2_RDBPrabhakar Kushwaha2011-01-19-7/+14
| | | | | | | | | | | | | | | | | | u-boot cannot be compiled after disabling CONFIG_PCI. Place PCI related codes under #ifdef CONFIG_PCI Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-12-03 13:29:33 +0000