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* Merge branch 'master' of git://www.denx.de/git/u-boot-blackfinWolfgang Denk2008-04-08-11048/+3899
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| * Blackfin: cleanup and overhaul common board init functionsMike Frysinger2008-03-30-236/+226
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: cleanup lib_blackfin/cache.cMike Frysinger2008-03-30-62/+8
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: unify cpu and boot modesMike Frysinger2008-03-30-9760/+2848
| | | | | | | | | | | | | | | | All of the duplicated code for Blackfin processors and boot modes have been unified. After all, the core is the same for all processors, just the peripheral set differs (which gets handled in the drivers). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: BF537-stamp: cleanup spi flash driverMike Frysinger2008-03-30-992/+819
| | | | | | | | | | | | | | This punts the old spi flash driver for a new/generalized one until the common one can be integrated. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-armWolfgang Denk2008-04-08-199/+4013
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| * | Bracket READ_TIMER macro in cpu/arm1136/omap24xx/interrupts.cPeter Pearse2008-03-30-1/+1
| | | | | | | | | | | | | | | | | | to prevent compilation error. Signed-off-by: Peter Pearse <peter.pearse@arm.com>
| * | Support for the MX31ADS evaluation board from FreescaleGuennadi Liakhovetski2008-03-30-0/+683
| | | | | | | | | | | | | | | | | | | | | This patch adds support for the MX31ADS evaluation board from Freescale, initialization code is copied from RedBoot sources, also provided by Freescale. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | Phytec Phycore-i.MX31 supportSascha Hauer2008-03-30-0/+481
| | | | | | | | | | | | | | | | | | | | | This patch adds support for the Phytec Phycore-i.MX31 board Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | mx31 litekit supportSascha Hauer2008-03-30-0/+449
| | | | | | | | | | | | | | | | | | | | | This patch adds support for the mx31 litekit board Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | add SMSC LAN9x1x Network driverSascha Hauer2008-03-30-0/+681
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the following smsc network controllers: LAN9115 LAN9116 LAN9117 LAN9215 LAN9216 LAN9217 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | add an i2c driver for mx31Sascha Hauer2008-03-30-0/+208
| | | | | | | | | | | | | | | | | | | | | This patch adds an i2c driver for Freescale i.MX processors Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | core support for Freescale mx31Sascha Hauer2008-03-30-0/+654
| | | | | | | | | | | | | | | | | | | | | This patch adds the core support for Freescale mx31 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | Separate omap24xx specific code from arm1136Sascha Hauer2008-03-30-79/+156
| | | | | | | | | | | | | | | | | | | | | Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
| * | Add pmdra into MAKEALLPeter Pearse2008-03-30-0/+1
| | | | | | | | | | | | Signed-off-by: Peter Pearse <peter.pearse@arm.com>
| * | Adds support for the Prodrive PMDRA board, based on a DM6441Pieter Voorthuijsen2008-03-30-0/+548
| | | | | | | | | | | | Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
| * | Removes all board specific code from the arch. part for DM644x (DaVinci) boardsPieter Voorthuijsen2008-03-30-73/+130
| | | | | | | | | | | | Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
| * | - Remove *_masked() functions as noted by WolfgangDirk Behme2008-03-30-47/+22
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Adapt register naming to recent TI spec (sprue26, March 2007) - Fix reset_timer() handling - As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this. [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179 - Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV). Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing! Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-shWolfgang Denk2008-04-08-50/+3863
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| * | sh: Add support stat structure and stat.hNobuhiro Iwamatsu2008-03-28-2/+2
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Removed warning when compiling drivers/serial/serial_sh.c.Mark Jonas2008-03-28-5/+0
| | | | | | | | | | | | | | | Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Remove disable_ctrlc function from R7780MPNobuhiro Iwamatsu2008-03-28-4/+1
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add maintainer of R7780MP to MAINTAINER fileNobuhiro Iwamatsu2008-03-28-1/+2
| | | | | | | | | | | | | | | | | | Update MAINTAINER entry for R7780MP. And fix maintainer's name. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support Renesas Solutions R2D plus boardNobuhiro Iwamatsu2008-03-28-0/+558
| | | | | | | | | | | | | | | | | | | | | | | | R2D plus is SH reference board used with SH7751R. This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface, one PCI bus, VGA, and two Ethernet controller. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support SH4 cache controlNobuhiro Iwamatsu2008-03-28-1/+37
| | | | | | | | | | | | | | | | | | Add support SH4 cache control and flash_cache function Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support PCI host driver for SH7751/SH7751RNobuhiro Iwamatsu2008-03-28-3/+204
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Move SuperH PCI driver from cpu/sh4 to drivers/pciNobuhiro Iwamatsu2008-03-28-13/+6
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support SuperH SH7751/SH7751RNobuhiro Iwamatsu2008-03-28-7/+9
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Added support for SH7720 based board MPR2.Mark Jonas2008-03-28-1/+640
| | | | | | | | | | | | | | | Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Fix receive FIFO level register of SH4ANobuhiro Iwamatsu2008-03-28-22/+30
| | | | | | | | | | | | | | | | | | | | | Receive FIFO level register is different in SH4A. Because register is different, cannot occasionally receive data. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support Renesas Solutions R7780MPYusuke Goda2008-03-28-4/+959
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renesas Solutions R7780MP is a reference board on SH7780. This board has serial, 10/100 base Ethernet deivice, CF slot and VGA devices. This board can set extension board. Extension board has 10/100/1000 base Ethernet device, PCI slot, S-ATA, iDVR slot. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support PCI of SuperH and SH7780Yusuke Goda2008-03-28-59/+309
| | | | | | | | | | | | | | | | | | | | | This patch add support PCI of SuperH base code and SH7780 specific code. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support SH7780Yusuke Goda2008-03-28-8/+516
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SH7780 is CPU of Renesas Technology. This CPU has - CPU clock 400MHz - PCI support - DDR-SDRAM controller - etc ... Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | sh: Add support Renesas Solutions Migo-R boardgoda.yusuke2008-03-28-0/+670
| |/ | | | | | | | | | | | | | | Migo-R is a board based on SH7722 and has may devices. In this patch, supported SCIF, NOR flash and Ethernet. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xxWolfgang Denk2008-04-07-232/+261
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: lib_ppc/board.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | Make MPC83xx one step closer to full relocation.Joakim Tjernlund2008-03-28-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx and use GOT relative reference. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc8323erdb: fix EEPROM page size and get MAC from EEPROMMichael Barkowski2008-03-28-3/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes eeprom page size so that you can now write more than 64 bytes at a time. It also makes the board take MAC addresses, if found, from EEPROM. User should place up to 4 addresses at offset 0x7f00, for eth{,1,2,3}addr. Any unused addresses should be zero. This group of four six-byte values should have it's CRC at the end. crc32 and eeprom commands can be used to accomplish this. If CRC fails, MAC addresses come from the environment. If CRC succeeds, the environment is overwritten at startup. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGEMichael Barkowski2008-03-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB controller on the PCI bus in Linux on the MPC8323ERDB. This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's config file. Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) codeKim Phillips2008-03-28-213/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6, 85xx's "Update SVR numbers to expand support", simplify SPRIDR processing and processor ID display. Add REVID_{MAJ,MIN}OR macros to make REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR convenience macros. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: display ddr frequency in board_add_ram_info bannerKim Phillips2008-03-28-4/+7
| | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: unreinvent mem_clkKim Phillips2008-03-28-15/+14
| | | | | | | | | | | | | | | | | | | | | delete ddr_clk and use mem_clk instead. Rename other ddr_*_clk to mem_*_clk for consistency's sake. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boardsKim Phillips2008-03-28-0/+46
| | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: enable the SATA interface on mpc837xemds boardDave Liu2008-03-28-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | Enable the first two SATA interfaces on MPC837xEMDS board, The two SATA ports are on LYNX1. (SATA0/1 on J4/5) Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: initialize serdes for MPC837xEMDS boardsDave Liu2008-03-28-0/+38
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is stolen from Anton Vorontsov's patch for mpc837xerdb boards. The reference clk and xcorevdd voltage of serdes1/2 is same between mpc837xemds and mpc837xerdb. 8377E: LYNX1- 2 SATA LYNX2- 2 PCIE 8378E: LYNX1- 2 SGMII LYNX2- 2 PCIE 8379E: LYNX1- 2 SATA LYNX2- 2 SATA Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flashWolfgang Denk2008-04-07-10/+57
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| * | MTD/CFI: flash_read64 is defined a weak function (for SPARC)Daniel Hellstrom2008-03-29-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address. SPARC CPUs implement flash_read64 which calls __raw_readq. For current SPARC architectures (LEON2 and LEON3) each read from the FLASH must lead to a cache miss. This is because FLASH can not be set non-cacheable since program code resides there, and alternatively disabling cache is poor from performance view, or doing a cache flush between each read is even poorer. Forcing a cache miss on a SPARC is done by a special instruction "lda" - load alternative space, the alternative space number (ASI) is processor implementation spcific and can be found by including <asm/processor.h>. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
| * | MTD/CFI: Add support for 16bit legacy AMD flashTor Krill2008-03-28-9/+54
| |/ | | | | | | | | | | | | | | Add entry for 512Kx16 AMD flash to jedec_table. Read out 16bit device id if chipwidth is 16bit. Fixed coding style after Stefans feedback Signed-off-by: Tor Krill <tor@excito.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-04-07-412/+1174
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| * ppc4xx: Fix 4xx enet driver to support 460GT EMAC2+3Stefan Roese2008-04-03-3/+13
| | | | | | | | | | | | | | | | This patch fixes a problem with the RGMII setup of the 460GT. The 460GT has 2 RGMII instances and we need to configure the 2nd RGMII instance for the EMAC2+3 channels. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Canyonlands: Init SATA/PCIe port correctlyStefan Roese2008-04-02-12/+34
| | | | | | | | | | | | | | | | | | Canyonlands (460EX) shares the first PCIe interface with the SoC SATA interface. This usage can be configured with the jumper J6. This patch correctly configures the SATA/PCIe PHY for SATA usage when this jumper is installed. Signed-off-by: Stefan Roese <sr@denx.de>
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