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* NETTA2: remove empty CONFIG_SHOW_ACTIVITY functionsWolfgang Denk2008-09-09-15/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2008-09-09-336/+2107
|\ | | | | | | | | | | | | | | Conflicts: Makefile Signed-off-by: Wolfgang Denk <wd@denx.de>
| * ppc4xx: Move ppc4xx specific prototypes to ppc4xx headerStefan Roese2008-09-08-22/+15
| | | | | | | | | | | | | | This patch moves some 4xx specific prototypes out of include common.h to a ppc4xx specific header. Signed-off-by: Stefan Roese <sr@denx.de>
| * Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-09-08-389/+772
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| * | ppc4xx: Update CPCI405(AB) configurationMatthias Fuchs2008-09-08-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | This patch add FDT support and command line editing capabilities for CPCI405 and CPCI405AB boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Cleanup CPCI405 linker scriptMatthias Fuchs2008-09-08-15/+0
| | | | | | | | | | | | | | | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Update CPCI405 variants handlingMatthias Fuchs2008-09-08-17/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces the BOARD_REVISION variable in include/config.mk by a using a temporary include file in the platform directory. The former way does not work anymore and the latter is also used by some other boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Remove CONFIG_CS8952_PHY defineStefan Roese2008-09-08-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Since this define is only used on one board that was never really in production, removing this compile time option doesn't hurt and makes the code more readable. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Fix compilation warning for PIP405Stefan Roese2008-09-08-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a compilation warning for the PIP405 board. It moves the #ifndef CONFIG_CS8952_PHY define a little so that the warning doesn't occur anymore. I am a little unsure if this #ifdef is at the correct place now or if it could be removed completely. This needs to get tested on the PIP405 board. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Fix compilation warning for canyonlands & glacierStefan Roese2008-09-08-7/+3
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-09-05-1/+1
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| * | | ppc4xx: Add support for GPCS, SGMII and M88E1112 PHYVictor Gallardo2008-09-05-5/+198
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds GPCS, SGMII and M88E1112 PHY support for the AMCC PPC460GT/EX processors. Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routinesAdam Graham2008-09-05-77/+153
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | ppc4xx: IBM Memory Controller DDR autocalibration routinesAdam Graham2008-09-05-0/+1212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Alternate SDRAM DDR autocalibration routine that can be generically used for any PPC4xx chips that have the IBM SDRAM Controller core allowing for support of more DIMM/memory chip vendors and gets the DDR autocalibration values which give the best read latency performance (SDRAM0_RDCC.[RDSS]). Two alternate SDRAM DDR autocalibration algoritm are provided in this patch, "Method_A" and "Method_B". DDR autocalibration Method_A scans the full range of possible PPC4xx SDRAM Controller DDR autocalibration values and takes a lot longer to run than Method_B. Method_B executes in the same amount of time as the currently existing DDR autocalibration routine, i.e. 1 second or so. Normally Method_B is used and it is set as the default method. The current U-Boot PPC4xx DDR autocalibration code calibrates the IBM SDRAM Controller registers.[bit-field]: 1) SDRAM0_RQDC.[RQFD] 2) SDRAM0_RFDC.[RFFD] This alternate PPC4xx DDR autocalibration code calibrates the following IBM SDRAM Controller registers.[bit-field]: 1) SDRAM0_WRDTR.[WDTR] 2) SDRAM0_CLKTR.[CKTR] 3) SDRAM0_RQDC.[RQFD] 4) SDRAM0_RFDC.[RFFD] and will also use the calibrated settings of the above four registers that produce the best "Read Sample Cycle Select" value in the SDRAM0_RDCC.[RDSS] register.[bit-field]. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | ppc44x: Unification of virtex5 pp440 boardsRicardo Ribalda Delgado2008-09-05-214/+530
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides an unificated way of handling xilinx v5 ppc440 boards. It unificates 3 different things: 1) Source code A new board called ppc440-generic has been created. This board includes a generic tlb initialization (Maps the whole memory into virtual) and defines board_pre_init, checkboard, initdram and get_sys_info weakly, so, they can be replaced by specific functions. If a new board needs to redefine any of the previous functions (specific initialization) it can create a new directory with the specific initializations needed. (see the example ml507 board). 2) Configuration file Common configurations are located under configs/xilinx-ppc440.h, this header file interpretes the xparameters file generated by EDK and configurates u-boot in correspondence. Example: if there is a Temac, allows CMD_CONFIG_NET Specific configuration are located under specific configuration file. (see the example ml507 board) 3) Makefile Some work has been done in order to not duplicate work in the Main Makefile. Please see the attached code. In order to support new boards they can be implemented in the next way: a) Simple Generic Board (90% of the time) Using EDK generates a new xparameters.h file, replace ppc440-generic/xparameters.h and run make xilinx-ppc440-generic_config && make b) Simple Boards with special u-boot parameters (9 % of the time) Create a new file under configs for it (use ml507.h as example) and change your paramaters. Create a new Makefile paragraph and compile c) Complex boards (1% of the time) Create a new folder for the board, like the ml507 Finally, it adds support for the Avnet FX30T Evaluation board, following the new generic structure: Cheap board by Avnet for evaluating the Virtex5 FX technology. This patch adds support for: - UartLite - 16MB Flash - 64MB RAM Prior using U-boot in this board, read carefully the ERRATA by Avnet to solve some memory initialization issues. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | disk-on-chip: remove duplicate doc_probe declarationJean-Christophe PLAGNIOL-VILLARD2008-09-09-11/+0
| | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | | onenand_uboot: fix warning: 'struct mtd_oob_ops' declared inside parameter listJean-Christophe PLAGNIOL-VILLARD2008-09-09-0/+1
| | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | | rs5c372: fix rtc_set prototypeJean-Christophe PLAGNIOL-VILLARD2008-09-09-2/+1
| | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | | ARM: fix warning: target CPU does not support interworkingSergei Poselenov2008-09-09-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes warnings like this: start.S:0: warning: target CPU does not support interworking which come from some ARM cross compilers and are caused by hard-coded (with "--with-cpu=arm9" configuration option) ARM targets (which support ARM Thumb instructions), while the ARM target selected from the command line (with "-march=armv4") doesn't support Thumb instructions. This warning is issued by the compiler regardless of the real use of the Thumb instructions in code. To fix this problem, we use options according to compiler version being used. Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | ARM: Use do_div() instead of division for "long long".Sergei Poselenov2008-09-09-6/+16
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | lib_arm/bootm.c: fix compile warningsWolfgang Denk2008-09-08-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | bootm.c:128: warning: label 'error' defined but not used bootm.c:65: warning: unused variable 'ret' Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | ml507: fix out of tree build problemWolfgang Denk2008-09-08-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | common/cmd_bootm.c: fix printf() format warningsWolfgang Denk2008-09-08-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | BMW, PCIPPC2, PCIPPC6, RBC82: fix compile warningsWolfgang Denk2008-09-08-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | missing doc_probe() prototype. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | | mk48t59: fix compile problem introduced by commit d1e23194Wolfgang Denk2008-09-08-1/+1
| |_|/ |/| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | Fix compiler warning in mpc8xxx ddr codeKumar Gala2008-09-07-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ctrl_regs.c: In function 'compute_fsl_memctl_config_regs': ctrl_regs.c:523: warning: 'caslat' may be used uninitialized in this function ctrl_regs.c:523: note: 'caslat' was declared here Add a warning in DDR1 case if cas_latency isn't a value we know about. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | rtc: allow rtc_set to return an error and use it in cmd_dateJean-Christophe PLAGNIOL-VILLARD2008-09-07-58/+134
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | ap325rxa/favr-32-ezkit: Use CONFIG_FLASH_CFI_DRIVERJean-Christophe PLAGNIOL-VILLARD2008-09-07-2/+2
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | config.mk: Move arch-specific condition to $(ARCH)_config.mkShinya Kuribayashi2008-09-07-16/+14
| | | | | | | | | | | | Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* | | Prevent crash if random/invalid ramdisks are passed to bootmKumar Gala2008-09-07-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adds returning an error from the ramdisk detection code if its not a real ramdisk (invalid). There is no reason we can't just return back to the console if we detect an invalid ramdisk or CRC error. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Prevent crash if random DTB address is passed to bootmAnatolij Gustschin2008-09-07-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds bootm_start() return value check. If error status is returned, we do not proceed further to prevent board reset or crash as we still can recover at this point. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | clean up some #if !defined() in drivers/video/cfb_console.cAndrew Dyer2008-09-07-12/+12
| | | | | | | | | | | | | | | | | | | | | rearrange some #if !defined() / #else / #endif statements to remove the negative logic. Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
* | | apollon: use the last memory area for u-bootKyungmin Park2008-09-07-1/+1
| | | | | | | | | | | | Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | | TQM8272: move NAND part in seperate FileHeiko Schocher2008-09-06-276/+331
| | | | | | | | | | | | | | | | | | | | | I didn't try to use drivers/mtd/nand/fsl_upm.c for the NAND driver, because I have no longer access to the hardware. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | TQM8272: Fix compiling error for the TQM8272 board.Heiko Schocher2008-09-06-18/+15
| | | | | | | | | | | | | | | | | | | | | Fix compile problems caused by commit cfa460adfdefcc30d104e1a9ee44994ee349bb7b Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Add JFFS2 command support on OneNANDKyungmin Park2008-09-06-9/+187
| | | | | | | | | | | | Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | | Allow console input to be disabledMark Jackson2008-09-06-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added new CONFIG_DISABLE_CONSOLE define and GD_FLG_DISABLE_CONSOLE. When CONFIG_DISABLE_CONSOLE is defined, setting GD_FLG_DISABLE_CONSOLE disables all console input and output. Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
* | | loads: allow negative offsetsRicardo Ribalda Delgado2008-09-06-5/+5
| | | | | | | | | | | | Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
* | | USB EHCI: reset root hubYuri Tikhonov2008-09-06-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of multi-function USB controllers (e.g. ISP1562) allow root hub resetting only via EHCI registers. So, this patch adds the corresponding kind of reset to OHCI's hc_reset() if the newly introduced CONFIG_PCI_EHCI_DEVNO option is set (e.g. for Socrates board). Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Acked-by: Markus Klotzbuecher <mk@denx.de>
* | | RX 8025 RTC: analyze 12/24-hour mode flag in rtc_get().Yuri Tikhonov2008-09-06-1/+5
| |/ |/| | | | | Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* | devices: Use list_add_tail() instead of list_add() to register a deviceStefan Roese2008-09-05-1/+1
|/ | | | | | | | | | | | | This patch fixes a problem spotted on Glacier/Canyonlands (and most likely lots of other board ports), that no serial output was seen after console initialization in console_init_r(). This is because the last added console device was used instead of the first added. This patch fixes this problem by using list_add_tail() instead of list_add() to register a device. This way the first added console is used again. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/masterWolfgang Denk2008-09-03-29/+191
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| * Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2008-09-03-29/+191
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| | * mpc83xx: fix mpc8313 in-tree building with NANDNick Spence2008-09-03-1/+4
| | | | | | | | | | | | | | | | | | | | | and add mpc8313 NAND build to MAKEALL Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * mpc83xx: clean up cache operations and unlock_ram_in_cache() functionsNick Spence2008-09-03-21/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Cleans up some latent issues with the data cache control so that dcache_enable() and dcache_disable() will work reliably (after unlock_ram_in_cache() has been called) Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * mpc83xx: Store and display Arbiter Event Register valuesNick Spence2008-09-03-1/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Record the Arbiter Event Register values and optionally display them. The Arbiter Event Register can record the type and effective address of an arbiter error, even through an HRESET. This patch stores the values in the global data structure. Display of the Arbiter Event registers immediately after the RSR value can be enabled with defines. The Arbiter values will only be displayed if an arbiter event has occured since the last Power On Reset, and either of the following defines exist: #define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and and type register values #define CONFIG_DISPLAY_AER_FULL - display and interpret the arbiter event register values Address Only transactions are one of the trapped events that can register as an arbiter event. They occur with some cache manipulation instructions if the HID0_ABE (Address Broadcast Enable) is set and the memory region has the MEMORY_COHERENCE WIMG bit set. Setting: #define CONFIG_MASK_AER_AO - prevents the arbiter from recording address only events, so that it can still capture other real problems. Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * mpc83xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cacheNick Spence2008-09-03-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed in unlock_ram_in_cache() because it is called from C and will corrupt the small data area anchor that is kept in R2. lock_ram_in_cache() is modified similarly as good coding practice, but is not called from C. Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * MPC83XX: Fix GPIO configuration - set gpio level before directionNick Spence2008-09-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set DAT value before DIR values to avoid creating glitches on the GPIO signals. Set gpio level register before direction register to inhibit glitches on high level output pins. Dir and data gets cleared at powerup, so high level output lines see a short low pulse between setting the direction and level registers. Issue was seen on a new board with the nReset line of the NOR flash connected to a GPIO. Setting the direction register puts the NOR flash in reset so the next instruction to set the level cannot get executed. Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/masterWolfgang Denk2008-09-03-847/+1207
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| * | Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2008-09-03-1/+63
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