| Commit message (Collapse) | Author | Age | Lines |
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Add a new function to the eth_device struct for programming a network
controller's hardware address.
After all network devices have been initialized and the proper MAC address
for each has been determined, make a device driver call to program the
address into the device. Only device instances with valid unicast addresses
will be programmed.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
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This driver supports the Altera triple speeds 10/100/1000 ethernet
mac.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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This patch ports the opencore 10/100 ethernet mac driver ethoc.c
from linux kernel to u-boot.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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SMSC911x chips have alignment function to allow frame payload data
(which comes after 14-bytes ethernet header) to be aligned at some
boundary when reading it from fifo (usually - 4 bytes boundary).
This is done by inserting fake zeros bytes BEFORE actual frame data when
reading from SMSC's fifo.
This function controlled by RX_CFG register. There are bits that
represents amount of fake bytes to be inserted.
Linux uses alignment of 4 bytes. Ethernet frame header is 14 bytes long,
so we need to add 2 fake bytes to get payload data aligned at 4-bytes
boundary.
Linux driver does this by adding IP_ALIGNMENT constant (defined at
skb.h) when calculating fifo data length. All network subsystem of Linux
uses this constant too when calculating different offsets.
But u-boot does not use any packet data alignment, so we don't need to
add anything when calculating fifo data length.
Moreover, driver zeros the RX_CFG register just one line up, so chip
does not insert any fake data at the beginig. So calculated data length
is always bigger by 1 word.
It seems that at almost every packet read we get an underflow condition
at fifo and possible corruption of data. Especially at continuous
transfers, such as tftp.
Just after removing this magic addition, I've got tftp transfer speed as
it aught to be at 100Mbps. It was really slow before.
It seems that fifo underflow occurs only when using byte packing on
32-bit blackfin bus (may be because of very small delay between reads).
Signed-off-by: Valentin Yakovenkov <yakovenkov@niistt.ru>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Cosmetic changes: Few comments updated
Functionality: Rx packet frame size is programming should
be done when port is in disabled state. this is corrected
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Fix MX27 FEC logic to check validity of the MAC address in fuse.
Only null (empty fuse) or invalid MAC address was retrieved from mx27 fuses before this change.
Signed-off-by: Eric Jarrige <jorasse@armadeus.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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When gracefully stopping the controller, the driver was continuing if
*either* RX or TX had stopped. We need to wait for both, or the
controller could get into an invalid state.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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The current dm9000x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
Blackfin systems as the accesses can get out of order. So convert the
direct volatile dereferences to use the normal in/out macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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This saves the autonegotation delay when not using ethernet in U-Boot
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Avoid using the internal eeprom on MX25 like MX51 already does.
Signed-off-by: John Rigby <jcrigby@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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This patch enabled support for having PHYs on bitBang MII and uec MII
operating at the same time. Modeled after the MPC8360ADS implementation.
Added the ability to specify which ethernet interfaces have bitbang SMI
on the board header file.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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For some reason, (which I can't find any documentation on), if U-Boot
gives a port number higher than 17500 to a Microsoft DNS server, the
server will reply to port 17500, and U-Boot will ignore things (since
that isn't the port it asked the DNS server to reply to).
This fixes that by ensuring the random port number is less than 17500.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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For code archeologists, this is a nice example of copy and paste history.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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This patch fixes following build warnings for kirkwood_egiga.c
kirkwood_egiga.c: In function "kwgbe_init":
kirkwood_egiga.c:448: warning: dereferencing type-punned pointer will break strict-aliasing rules
kirkwood_egiga.c: In function "kwgbe_recv":
kirkwood_egiga.c:609: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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This patch fixes APC405 build, by defining CONFIG_PPC4XX_I2C. This is
needed since the move of the PPC4xx I2C driver into the drivers/i2c
directory.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
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This patch adds support for the Mosaix Technologies, Inc. ICON board,
based on the AppliedMicro (AMCC) PPC440SPe. It's equipped with an SODIMM
(512MB standard) and 64MByte of NOR FLASH.
Support for the onboard SM502 will be added later.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
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Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Stefan Roese <sr@denx.de>
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ubifsmount is not working and causes an access with
a pointer set to zero because the ubifs_fs_type
is not initialized correctly.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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Also enable HUSH shell.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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The "mtdparts add" command wrote through a NULL pointer - on many
systems this went unnoticed (PowerPC has writable RAM there, some ARM
systems have ROM where a write has no effect), but on arm1136
(i.MX31) it crashed the system.
Add appropriate checks.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Added support for LCD and splash image to the QONG module.
The supported display is VBEST-VGG322403.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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before, MPC8349ITX boots u-boot in 4.3sec:
column1 is elapsed time since first message
column2 is elapsed time since previous message
column3 is the message
0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX
0.000 0.000:
0.000 0.000: Reset Status:
0.000 0.000:
0.032 0.032: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.032 0.000: Board: Freescale MPC8349E-mITX
0.032 0.000: UPMA: Configured for compact flash
0.032 0.000: I2C: ready
0.061 0.028: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
1.516 1.456: FLASH: 16 MB
2.641 1.125: PCI: Bus Dev VenId DevId Class Int
2.652 0.011: 00 10 1095 3114 0180 00
2.652 0.000: PCI: Bus Dev VenId DevId Class Int
2.652 0.000: In: serial
2.652 0.000: Out: serial
2.652 0.000: Err: serial
2.682 0.030: Board revision: 1.0 (PCF8475A)
3.080 0.398: Net: TSEC1: No support for PHY id ffffffff; assuming generic
3.080 0.000: TSEC0, TSEC1
4.300 1.219: IDE: Bus 0: .** Timeout **
after, MPC8349ITX boots u-boot in 3.0sec:
0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX
0.010 0.000:
0.010 0.000: Reset Status:
0.010 0.000:
0.017 0.007: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.017 0.000: Board: Freescale MPC8349E-mITX
0.038 0.020: UPMA: Configured for compact flash
0.038 0.000: I2C: ready
0.038 0.000: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
0.260 0.222: FLASH: 16 MB
1.390 1.130: PCI: Bus Dev VenId DevId Class Int
1.390 0.000: 00 10 1095 3114 0180 00
1.390 0.000: PCI: Bus Dev VenId DevId Class Int
1.400 0.010: In: serial
1.400 0.000: Out: serial
1.400 0.000: Err: serial
1.400 0.000: Board revision: 1.0 (PCF8475A)
1.832 0.432: Net: TSEC1: No support for PHY id ffffffff; assuming generic
1.832 0.000: TSEC0, TSEC1
3.038 1.205: IDE: Bus 0: .** Timeout **
also tested on these boards (albeit with a less accurate
boottime measurement method):
seconds: before after
8349MDS ~2.6 ~2.2
8360MDS ~2.8 ~2.6
8313RDB ~2.5 ~2.3 #nand boot
837xRDB ~3.1 ~2.3
also tested on an 8323ERDB.
v2: also remove the delayed icache enablement assumption in arch ppc's
board.c, and add a CONFIG_MPC83xx define in the ITX config file for
consistency (even though it was already being defined in 83xx'
config.mk).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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because it's convenient.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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marketing didn't extend their postpend-with-an-A naming strategy
on rev.2's and higher beyond the first two 83xx families. This
patch stops us from misreporting we're running e.g., on an MPC8313EA,
when such a name doesn't exist.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define
instead of a platform define. This will enable all the 83xx
platforms to use sdhc_clk based on CONFIG_FSL_ESDHC. It's
the same patch as commit 6b9ea08c5010eab5ad1056bc9bf033afb672d9cc
for the ppc/85xx.
Signed-off-by: Rini <rini@arvoo.nl>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Adds coprocessor communication POST code
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Add common post_word_load/post_word_store routines
for all mpc5121 boards. pdm360ng board POST support
added by subsequent patch needs them.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.
Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Configure CONFIG_SYS_MAX_RAM_SIZE address range in
DDR Local Access Window and determine the RAM size.
Fix DDR LAW afterwards using detected RAM size.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Extend mpc512x serial driver to support multiple PSC ports.
Subsequent patches for PDM360NG board support make use of this
functionality by defining CONFIG_SERIAL_MULTI in the board config
file. Additionally the used PSC devices are specified by defining
e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6.
Support for PSC devices other than 1, 3, 4 and 6 is not added
by this patch because these aren't used currently. In the future
it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and
INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c.
Additionally you have to add code for registering added
devices in serial_initialize() in common/serial.c.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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The MPC83xx SERDES control is different from the other FSL PPC chips.
For now lets split it out so we can standardize on interfaces for
determining of a device on SERDES is configured.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Lan Chunhe <b25806@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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clean up the wrong io_sel for PCI express according to latest manual.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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This fixes an overflow during the link phase.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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cpu.c: In function 'checkcpu':
cpu.c:47: warning: unused variable 'gur'
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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For P1022 SATA host controller, the data snoop bit of DW3 in PRDT
is moved to bit28.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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After power on, the SATA host controller of P1022 Rev1 is configured
in legacy mode instead of the expected enterprise mode.
Software needs to clear bit[28] of HControl register to change to
enterprise mode after bringing the host offline.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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