| Commit message (Collapse) | Author | Age | Lines |
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Include config.h earlier in the set of #includes
so as to avoid a incidental and duplicate definition
of CFG_CACHELINE_SIZE.
Signed-off-by: Jon Loeliger
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Doing so prevents it from being individually set
and useful in other files.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Assumes the presence of the aliases node in the DTS to
locate the ethernet, pci and serial nodes for fixups.
Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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This bug was detected on the LWMON5 target which has 2 Intel 16bit wide
flash chips connected to a 32bit wide port.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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The bash builtin versions of the "test" (resp. "[") command allow
using "==" for string comparisons, but POSIX compatible implemen-
tations (like /usr/bin/test) insist on using "=" only. On such systems
you will see:
$ /usr/bin/test a == a && echo OK
/usr/bin/test: ==: binary operator expected
This patch fixes Makefiles and scripts to use POSIX style.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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The check for an sufficiently erased destination was missing in the
buffered write function of the cfi flash driver (when
CFG_FLASH_USE_BUFFER_WRITE is defined). This patch adds this check to that
writing to such a region will fail with the currect error message.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Conflicts:
cpu/ppc4xx/fdt.c
include/configs/kilauea.h
include/configs/sequoia.h
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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This patch brings the PMC440 board configuration file.
Finally it enables the PMC440 board support.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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This patch adds some BSP commands and FPGA booting support
for esd's PMC440 boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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This patch adds the first files for the new esd PMC440 boards.
The next two patches will complete the PMC440 board support.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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- add EEPROM write protection for esd PLU405 boards.
- initialize NAND GPIOs
- use correct io accessors
- cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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This patch fixes esd's LCD dectection code to work correctly with
newer gcc versions.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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- add EEPROM write protection
- initialize NAND GPIOs
- use correct io accessors
- slow down I2C clock to 100kHz
- enable ext. I2C bus
- cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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In an attmemt to clean up the 4xx start.S file, I removed the enabling
of the internal 405EP PCI arbiter. This is needed for multiple other
405EP platforms, like most of the esd 405EP. Now the internal PCI
arbiter is enabled again per default as it has been before.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Use correct link to nand_ecc now located in drivers/mtd/nand/ for the
platforms mentioned above.
Signed-off-by: Stefan Roese <sr@denx.de>
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- enable command line history
- increase malloc space (because of bigger flash sectors)
Signed-off-by: Martin Krause <martin.krause@tqs.de>
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Signed-off-by: Martin Krause <martin.krause@tqs.de>
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Signed-off-by: Martin Krause <martin.krause@tqs.de>
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CAS-Latency=2, Write Recovery Time tWR=2
The max. supported bus frequency is 66 MHz. Therefore, changed
threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
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On the TQM885D the measurement of cpuclk with the PIT reference
timer ist not necessary. Since all module variants use the same
external 10 MHz oscillator, the cpuclk only depends on the PLL
configuration - which is readable by software.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
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At 133 MHz the current SDRAM refresh rate is too fast
(measured 4 * 1.17 us).
CFG_MAMR_PTA changes from 39 to 128. This result
in a refresh rate of 4 * 7.8 us at the default clock
66 MHz. At 133 MHz the value will be then 4 * 3.8 us.
This is a compromise until a new method is found to
adjust the refresh rate.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
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Signed-off-by: Martin Krause <martin.krause@tqs.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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Conflicts:
MAINTAINERS
Signed-off-by: Wolfgang Denk <wd@denx.de>
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The composition of the directory in the drivers/ changed.
I moved SuperH serial driver and marubun PCMCIA driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Conflicts:
drivers/Makefile
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Add MS7750SE and MS7722SE's board maintainer to MAINTAINERS file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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This document is a summary of information concerning SuperH of U-Boot.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Marubun pcmcia is a chip for PCMCIA used with SuperH.
Of course, this can be used even by other architectures.
When use this driver, came to be able to use CompactFlash
and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- Changed volatile unsigned to vu_.
- Changed Makefile for kconfig.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Conflicts:
drivers/Makefile
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add support MS7722SE01 to Makefile.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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