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* ppc/85xx: Clean up do_resetKumar Gala2009-09-08-16/+9
| | | | | | | | | | | There is no reason to do a run time check for e500 v1 based cores to determine if we have the GUTs RSTCR facility. Only the first generation of PQ3 parts (MPC8540/41/55/60) do not have it. So checking to see if we are e500 v2 would miss future parts (like e500mc). Just change this to be ifdef'd based on CONFIG_MPC85{40,41,55,60}. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu().Poonam Aggrwal2009-09-08-6/+10
| | | | | | | While in probecpu() UART is still not initialized. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx/86xx: Device tree fixup for number of coresPoonam Aggrwal2009-09-08-0/+61
| | | | | | | | | | | | | | Fixing the number of cores in the device tree based on the actual number of cores on the system. With this same device tree image can be used for dual core and single core members of otherwise exactly same SOC. For example: * P2020RDB and P2010RDB * P1020RDB and P1011RDB * MPC8641D and MPC8641 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx,86xx: Handling Unknown SOC versionPoonam Aggrwal2009-09-08-13/+9
| | | | | | | | | | | Incase the system is detected with Unknown SVR, let the system boot with a default value and a proper message. Now with dynamic detection of SOC properties from SVR, this is necessary to prevent a crash. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala2009-09-08-68/+284
| | | | | | | | | | | Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Cleanup makefile and related optional filesKumar Gala2009-09-08-18/+19
| | | | | | | | Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious cases we have like PCI, CPM2, QE. Also reworked it to use one line per file for everything and sorted in alphabetical order. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: add register read-back to set_law()Timur Tabi2009-09-08-1/+2
| | | | | | | | | After programming a new LAW, we should read-back the LAWAR register so that we sync the writes. Otherwise, code that attempts to use the new LAW-mapped memory might fail right away. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Fix bug in setup_mp codeKumar Gala2009-09-08-3/+29
| | | | | | | | | | | | | | Its possible that we try and copy the boot page code out of flash into a DDR location that doesn't have a TLB cover it. For example, if we have 3G of DDR we typically only map the first 2G. In the cases of 4G+ this wasn't an issue since the reset page TLB mapping covered the last page of memory which we wanted to copy to. We now change the physical address of the reset page TLB to map to the true physical location of the boot page code, copy and than set the TLB back to its 1:1 mapping of the reset page. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Add a simple function to search the TLBKumar Gala2009-09-08-2/+32
| | | | | | | | | | | Allow us to search the TLB array based on an address. This is useful if we want to change an entry but dont know where it happens to be located. For example, the boot page mapping we use on MP or the flash TLB that we change the WIMGE settings for after we've relocated. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add support for setting IVORs to fixed offset defaultsKumar Gala2009-09-08-0/+107
| | | | | | | | | | | | In future Book-E implementations IVORs will most likely go away and be replaced with fixed offsets. The IVPR will continue to exist to allow for relocation of the interrupt vectors. This code adds support to setup the IVORs as their fixed offset values per the ISA 2.06 spec when we transition from u-boot to another OS either via 'bootm' or a cpu release. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Fix up eSDHC controller clock frequency in the device treeDipen Dudhat2009-09-08-0/+7
| | | | | Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala2009-09-08-31/+1
| | | | | | | | The ddr_pd_cntl isn't defined in any reference manual and thus we wil remove especially since we set it to 0, which would most likely be its POR value. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: relocate cpu pointer in global dataKumar Gala2009-09-08-0/+4
| | | | | | | Now that we have a pointer to the cpu struct we need to relocate it once we get into ram. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: sys_eeprom: Fix 'may be used uninitialized' warningAnton Vorontsov2009-09-08-1/+2
| | | | | | | | The warning is bogus, so silence it by initializing the 'ret' variable. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clkDipen Dudhat2009-09-08-1/+1
| | | | | | | | | | Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a platform define. This will enable all the 85xx platforms to use sdhc_clk based on CONFIG_FSL_ESDHC. Signed-off-by: Gao Guanhua <B22826@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2009-09-07-4/+77
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| * fsl_i2c: increase I2C timeout values and make them configurableTimur Tabi2009-09-06-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The value of I2C_TIMEOUT in fsl_i2c.c has several problems. First, it is defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes no sense to derive it from a clock rate. Second, the current value (250) is too low for some boards, so it needs to be increased. Third, the timeout necessary for multiple-master arbitration is larger than the timeout for basic read/write operations, so we shouldn't have a single constant for both timeouts. Finally, it would be nice if we could override these values on a per-board basis. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de> Tested-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Peter Tyser <ptyser@xes-inc.com>
| * Reset i2c slave devices during init on mpc5xxx cpusEric Millbrandt2009-09-06-0/+57
| | | | | | | | | | | | | | | | | | | | | | Reset any i2c devices that may have been interrupted during a system reset. Normally this would be accomplished by clocking the line until SCL and SDA are released and then sending a start condtiion (From an Atmel datasheet). There is no direct access to the i2c pins so instead create start commands through the i2c interface. Send a start command then delay for the SDA Hold time, repeat this by disabling/enabling the bus a total of 9 times. Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-09-07-45/+2911
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| * ARM: DaVinci: Adding Support for DaVinci DM365 EVMSandeep Paulraj2009-09-05-0/+308
| | | | | | | | | | | | | | This patch adds support for the DM365 EVM. It has been tested on a DM365 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARM: DaVinci: DaVinci DM365 SOC specific codeSandeep Paulraj2009-09-05-0/+36
| | | | | | | | | | | | This patch adds support for DaVinci DM365 SOC. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * DM9000 init for pm9261Ilko Iliev2009-09-05-0/+7
| | | | | | | | Signed-off-by: Ilko Iliev <iliev@ronetix.at>
| * Add support for the DevKit8000 boardFrederik Kriewitz2009-09-05-0/+921
| | | | | | | | | | | | This patch adds support for the DevKit8000 board. Signed-off-by: Frederik Kriewitz <frederik@kriewitz.eu>
| * omap3: move the other boards to board/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-2/+2
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: move Logicpd's boards to board/logicpd/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-3/+3
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * omap: move TI's boards to board/ti/Jean-Christophe PLAGNIOL-VILLARD2009-09-05-7/+7
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * Support for the Calao TNY-A9260/TNY-A9G20 boardsAlbin Tonnerre2009-09-01-1/+403
| | | | | | | | | | | | | | | | | | | | | | | | The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by Calao Systems <http://www.calao-systems.com>. Their components are very similar to the AT91SAM9260EK board, so their configuration is based on the configuration of this board. There are however some differences: different clocks, no LCD, no ethernet. They also can use SPI EEPROM to store the environment. Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * arm: Kirkwood: add SYSRSTn Duration Counter SupportPrafulla Wadaskar2009-09-01-0/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This feature can be used to trigger special command "sysrstcmd" using reset key long press event and environment variable "sysrstdelay" is set (useful for reset to factory or manufacturing mode execution) Kirkwood SoC implements a hardware-based SYSRSTn duration counter. When SYSRSTn is asserted low, a SYSRSTn duration counter is running. The counter value is stored in the SYSRSTn Length Counter Register The counter is based on the 25-MHz reference clock (40ns) It is a 29-bit counter, yielding a maximum counting duration of 2^29/25 MHz (21.4 seconds). When the counter reach its maximum value, it remains at this value until counter reset is triggered by setting bit 31 of KW_REG_SYSRST_CNT Implementation: Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be executed if pre-defined in environment variables. This feature will be disabled if "sysrstdelay" variable is unset. for-ex. setenv sysrst_cmd "echo starting factory reset; nand erase 0xa0000 0x20000; echo finish ed sysrst command;" will erase particular nand sector if triggered by this event Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Add support for the Calao SBC35-A9G20 boardAlbin Tonnerre2009-09-01-1/+517
| | | | | | | | | | | | | | | | | | | | | | The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems <http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND flash, two USB host ports, and an USB device port. More informations can be found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936> Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
| * imx27lite: add support for imx27lite board from LogicPDIlya Yanok2009-09-01-0/+629
| | | | | | | | | | | | | | | | | | This patch adds support for i.MX27-LITEKIT development board from LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND flash, FEC ethernet controller integrated into i.MX27. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Wolfgang Denk <wd@denx.de>
| * at91sam9260/afeb9260: Fix SPI initializationAlbin Tonnerre2009-09-01-2/+2
| | | | | | | | | | | | | | Commit 7ebafb7ec1a0285af8380623c009576f92583b98 introduced a mistake in the spi init function call for those boards. This patch fixes this. Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
| * Remove duplicate set_crSimon Kagstrom2009-09-01-30/+0
| | | | | | | | | | | | | | | | | | | | Remove duplicate set_cr set_cr is defined in both asm-arm/proc-armv/system.h and include/asm-arm/system.h. This patch removes it (and some duplicate defines) from the former. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
* | ARM: Update mach-typesWolfgang Denk2009-09-04-12/+2056
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | push LOAD_ADDR out to arch mk filesMike Frysinger2009-09-04-64/+37
| | | | | | | | | | | | | | | | | | | | Rather than maintain/extend the current ifeq($(ARCH)) mess that exists in the standalone Makefile, push the setting up of LOAD_ADDR out to the arch config.mk (and rename to STANDALONE_LOAD_ADDR in the process). This keeps the common code clean and lets the arch do whatever crazy crap it wants in its own area. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | zlib: fix code when DEBUG is definedGiuseppe CONDORELLI2009-09-04-2/+3
| | | | | | | | | | | | | | Removed stdio.h inclusion and moved trace macros to use printf avoiding to write debug informations to standard error. Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
* | mxc_nand: Remove Freescale's "All Rights Reserved."Scott Wood2009-09-04-1/+1
| | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com>
* | mpc83xx/serdes: License cleanup: remove "All Rights Reserved" noticeAnton Vorontsov2009-09-04-1/+1
| | | | | | | | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | License cleanup: remove unintended "All Rights Reserved" notices.Wolfgang Denk2009-09-04-7/+0
| | | | | | | | | | | | | | | | Some files included my old standerd file header which had a "All Rights Reserved" part. As this has never been my intention, I remove these lines to make the files compatible with GPL v.2 and later. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | cmd_mtdparts.c: fix compiler warning in debug codeWolfgang Denk2009-09-04-1/+1
| | | | | | | | | | | | | | | | | | | | Fix warning messages: cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long unsigned int', but argument 6 has type 'u32' cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long unsigned int', but argument 7 has type 'u32' Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Move uninitialized_var() macro from ubi_uboot.h to compiler.hAnton Vorontsov2009-09-04-3/+4
| | | | | | | | | | | | This is needed so that we could use this macro for non-UBI code. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* | arm: Remove -fno-strict-aliasingKumar Gala2009-09-04-32/+16
| | | | | | | | | | | | -fno-strict-aliasing is hidding warnings. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | ppc: Remove -fno-strict-aliasingKumar Gala2009-09-04-5/+5
| | | | | | | | | | | | -fno-strict-aliasing is hidding warnings. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | galaxy5200: Add chip select region for an Epson S1D15313Eric Millbrandt2009-09-04-0/+5
| | | | | | | | Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
* | Add ability for arch code to make changes before we bootKumar Gala2009-09-04-0/+10
| | | | | | | | | | | | | | | | | | Added a arch_preboot_os() function that cpu specific code can implement to allow for various modifications to the state of the machine right before we boot. This can be useful to setup register state to a specific configuration. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Use different PBA value for E1000 PCI and PCIe cardsRoy Zang2009-09-04-2/+10
| | | | | | | | | | Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: André Schwarz <andre.schwarz@matrix-vision.de>
* | Add PCI support to eNET boardGraeme Russ2009-09-04-7/+103
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | i386: Moved PCI from #ifdef to conditional compile for sc520 boardsGraeme Russ2009-09-04-564/+617
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | i386: Replace [read, write]_mmcr_[byte, word, long] with memory mapped structureGraeme Russ2009-09-04-545/+550
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | Misc sc520 cdp fixupsGraeme Russ2009-09-04-22/+0
| | | | | | | | | | | | | | Now that the PCI, SATA et al compile problems have been resolved, the cludge that was applied to avoid them can be removed Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | Fixup sc520_spunk boardGraeme Russ2009-09-04-2/+33
| | | | | | | | | | | | | | | | Primary intent is to resolve build errors for this board which has been neglected for a very long time. I do not have one of these boards, so I cannot test functionality Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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