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* [PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM supportStefan Roese2007-02-20-42/+3109
| | | | | | | | | | | | | | | | | This patch adds support for the DDR2 controller used on the 440SP and 440SPe. It is tested on the Katmai (440SPe) eval board and works fine with the following DIMM modules: - Corsair CM2X512-5400C4 (512MByte per DIMM) - Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM) - Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM) This patch also adds the nice functionality to dynamically create the TLB entries for the SDRAM (tlb.c). So we should never run into such problems with wrong (too short) TLB initialization again on these platforms. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 filesStefan Roese2007-02-20-413/+478
| | | | | | | | | | Since the existing 4xx SPD SDRAM initialization routines for the 405 SDRAM controller and the 440 DDR controller don't have much in common this patch splits both drivers into different files. This is in preparation for the 440 DDR2 controller support (440SP/e). Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] PPC4xx: Add support for multiple I2C bussesStefan Roese2007-02-20-363/+383
| | | | | | | | | | | | | | This patch adds support for multiple I2C busses on the PPC4xx platforms. Define CONFIG_I2C_MULTI_BUS in the board config file to make use of this feature. It also merges the 405 and 440 i2c header files into one common file 4xx_i2c.h. Also the 4xx i2c reset procedure is reworked since I experienced some problems with the first access on the 440SPe Katmai board. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Correctly display PCI arbiter en-/disabled on some 4xx boardsStefan Roese2007-02-02-6/+10
| | | | | | | | Previously the strapping DCR/SDR was read to determine if the internal PCI arbiter is enabled or not. This strapping bit can be overridden, so now the current status is read from the correct DCR/SDR register. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Change configuration output of Sycamore, Yellowstone & RainierStefan Roese2007-02-02-8/+4
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Remove PCI-PNP configuration from Sequoia/Rainier config fileStefan Roese2007-02-01-1/+1
| | | | | | | | When PCI PNP is enabled the pci pnp configuration routine is called which sets the PCI_CACHE_SIZE_LINE to 8. This seems to generate some problems with some PCI cards. For now disable the PCI PNP configuration. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update 440EPx/440GRx cpu detectionStefan Roese2007-01-31-6/+10
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update esd cpci5200 filesStefan Roese2007-01-31-10/+53
| | | | Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* [PATCH] Add support for esd mecp5200 boardStefan Roese2007-01-31-3/+867
| | | | Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
* [PATCH] Remove unneccessary yellowstone board config fileStefan Roese2007-01-31-340/+0
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/sr/git/u-boot/denx-merge-srWolfgang Denk2007-01-30-945/+74
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| * [PATCH] Update Sequoia (440EPx) config fileStefan Roese2007-01-30-9/+19
| | | | | | | | | | | | | | | | The config file now handles the 2nd target, the Rainier (440GRx) evaluation board better. Additionally the PPC input clock was adjusted to match the correct value of 33.0 MHz. Signed-off-by: Stefan Roese <sr@denx.de>
| * [PATCH] Merge Yosemite & Yellowstone board portsStefan Roese2007-01-30-931/+49
| | | | | | | | | | | | | | | | | | Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR) share one config file and all board specific files. This way we don't have to maintain two different sets of files for nearly identical boards. Signed-off-by: Stefan Roese <sr@denx.de>
| * [PATCH] Update Prodrive SCPU (PDNB3 variant) boardStefan Roese2007-01-30-5/+6
| | | | | | | | | | | | SCPU doesn't use redundant environment in flash. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge with /home/sr/git/u-boot/denx-merge-srWolfgang Denk2007-01-30-6/+8
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| * [PATCH] alpr: Update alpr board config fileStefan Roese2007-01-30-6/+8
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | LPC2292 SODIMM port coding style cleanup.Wolfgang Denk2007-01-30-372/+412
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* | Add port for the lpc2292sodimm evaluation board from EmbeddedArtistsGary Jennejohn2007-01-24-4/+2787
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* | Merge with /home/tur/proj/idmr/u-bootWolfgang Denk2007-01-24-4/+58
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| * | [iDMR] Add MTD and JFFS2 support, also add default partition definition.Bartlomiej Sieka2007-01-23-0/+12
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| * | [iDMR] Flash driver on initialisation write-protects some sectors,Bartlomiej Sieka2007-01-23-1/+1
| | | | | | | | | | | | | | | | | | currently sectors 0-3. Sector 3 does not need to be protected, though (U-boot occupies sectors 0-1 and the environment sector 2). This commit fixes this, i.e., only sectors 0-2 are protected.
| * | [iDMR] Using MII-related commands on iDRM board doesn't work now (e.g.,Bartlomiej Sieka2007-01-23-2/+6
| | | | | | | | | | | | | | | | | | "mii device" results in "Unexpected exception"). Fixing this properly requires some clean-up in the FEC drivers infrastructure for ColdFire, so this commit disables MII commads for now.
| * | [ColdFire MCF5271 family] Add CPU detection based on the value of ChipBartlomiej Sieka2007-01-23-1/+39
| | | | | | | | | | | | Identification Register (CIR).
* | | Minor code cleanup.Wolfgang Denk2007-01-19-4/+70
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* | | Merge with /home/hs/SC3/u-boot-devWolfgang Denk2007-01-19-28/+26
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| * | | [PATCH] SC3 board: added CFG_CMD_AUTOSCRIPT.Heiko Schocher2007-01-19-12/+13
| | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| * | | [PATCH] CFI: define CFG_WRITE_SWAPPED_DATA for the CFI-Flash driverHeiko Schocher2007-01-19-16/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | if you must swap the bytes between reading/writing. (Needed for the SC3 board) Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | Merge with /home/hs/SC3/u-boot-devWolfgang Denk2007-01-19-22/+34
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| * | [PATCH] Fix: Compilerwarnings for SC3 board.Heiko Schocher2007-01-18-22/+34
| | | | | | | | | | | | | | | | | | | | | The EBC Configuration Register is now by CFG_EBC_CFG definable Added JFFS2 support for the SC3 board. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | [PATCH] Add support for Prodrive SCPU (PDNB3 variant) boardStefan Roese2007-01-18-5/+50
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | [PATCH] Update Prodrive P3Mx supportStefan Roese2007-01-18-8/+64
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | [PATCH] Add missing Taishan config fileStefan Roese2007-01-18-0/+333
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge with /home/stefan/git/u-boot/denx-merge-srStefan Roese2007-01-18-40/+61
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| * | Raname solidcard3 into sc3; add redundant env for sc3Wolfgang Denk2007-01-16-40/+60
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* | | [PATCH] Add support for AMCC Taishan PPC440GX eval boardStefan Roese2007-01-18-79/+1485
|/ / | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | Update default environment for Solidcard3Wolfgang Denk2007-01-16-0/+25
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* | Merge with /home/hs/SC3/u-bootWolfgang Denk2007-01-15-21/+2285
|\ \ | | | | | | | | | Some code cleanup.
| * | Added support for the SOLIDCARD III board from EurodesignHeiko Schocher2007-01-11-4/+2074
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Merge with /home/hs/MAN/u-boot-devWolfgang Denk2007-01-15-5/+1119
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| * | | [FIX] correct I2C Writes for the LM81 Sensor.Heiko Schocher2007-01-14-3/+4
| | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| * | | [PATCH] Add support for the UC101 board from MAN.Heiko Schocher2006-12-21-5/+1118
| | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* | | | Merge with /home/sr/git/u-boot/denx-merge-srWolfgang Denk2007-01-15-1/+1
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| * | | | [PATCH] Fix 440SPe rev B detection from previous patchStefan Roese2007-01-15-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge with /home/sr/git/u-boot/denx-merge-srWolfgang Denk2007-01-13-45/+81
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| * | | | Merge with git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx-merge-srStefan Roese2007-01-13-51/+1206
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| * | | | | [PATCH] Update 440SP(e) cpu revisionsStefan Roese2007-01-13-9/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | [PATCH] Update Yellowstone (440GR) to display board rev and PCI bus speedStefan Roese2007-01-13-18/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | [PATCH] Update Yosemite (440EP) to display board rev and PCI bus speedStefan Roese2007-01-13-18/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | | [PATCH] Update Sequoia (440EPx) to display board rev and PCI bus speedStefan Roese2007-01-13-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | Merge with /home/git/u-bootWolfgang Denk2007-01-13-14/+29
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