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* Merge branch 'eth-cleanup' of git://git.denx.de/u-boot-avr32Haavard Skinnemoen2008-07-30-84/+24
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| * Moved initialization of AVR32 Ethernet controllers to board_eth_init()Ben Warren2008-07-24-84/+24
| | | | | | | | | | | | | | | | Renamed initialization functions for atngw100 and atstk1000. Removed initializations for these boards from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | Merge branch 'format-warnings' of git://git.denx.de/u-boot-avr32Haavard Skinnemoen2008-07-24-16/+18
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| * spi flash: Fix printf() format warningsHaavard Skinnemoen2008-07-23-3/+3
| | | | | | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * atmel_mci: Fix printf() format warningsHaavard Skinnemoen2008-07-23-8/+8
| | | | | | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * avr32: Fix printf() format warningsHaavard Skinnemoen2008-07-23-5/+7
| | | | | | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: asm/io.h needs asm/types.hHaavard Skinnemoen2008-07-23-0/+2
|/ | | | | | | map_physmem() takes a phys_addr_t as parameter. This type is defined in asm/types.h, so we need to include that file. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* microblaze: Fix printf() format issuesMichal Simek2008-07-20-5/+5
| | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* Remove unused code from lib_arm/bootm.cGururaja Hebbar K R2008-07-20-3/+0
| | | | Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
* tqm85xx: Demystify 'DK: !!!' commentDetlev Zundel2008-07-20-1/+2
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* 83xx/85xx/86xx: Add LTEDR local bus definitionsDetlev Zundel2008-07-20-0/+9
| | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* serial_xuartlite.c: fix compiler warningsRicardo Ribalda Delgado2008-07-20-5/+5
| | | | | Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es> Acked-by: Grant Likely <grant.likely@secretlab.ca>
* POST: Add disable interrupts in some of the missing CPU POST testsStefan Roese2008-07-20-0/+36
| | | | | | | Some CPU POST tests did not disable the interrupts while running. This seems to be necessary to protect this self modifying code. Signed-off-by: Stefan Roese <sr@denx.de>
* ide: Use CFG_64BIT_LBA instead of CFG_64BIT_STRTOULStefan Roese2008-07-20-2/+2
| | | | | | | This is needed for boards that define CFG_64BIT_STRTOUL but don't define CFG_64BIT_LBA. Signed-off-by: Stefan Roese <sr@denx.de>
* POST PPC4xx/spr IVPR only if PPC440Niklaus Giger2008-07-20-0/+2
| | | | | | | | The SPR IVPR register is only present (as far as I know) for processors with a PPC440 core. Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com> Acked-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2008-07-20-12/+18
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| * ppc4xx: Enable 64bit printf format on 440/460 platformsStefan Roese2008-07-18-0/+6
| | | | | | | | | | | | | | | | This patch defines CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL for all 440/460 platforms. This may be needed since those platforms support 36bit physical address space. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Fix incorrect MODTx setup for some DIMM configurationsStefan Roese2008-07-18-12/+12
| | | | | | | | | | | | | | | | | | | | This patch fixes a problem with incorrect MODTx (On Die Termination) setup for a configuration with multiple DIMM's and multiple ranks. Without this change Katmai was unable to boot Linux with DDR2 frequency >= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux with DDR2 frequency = 640MHz and mem=4GB. Signed-off-by: Stefan Roese <sr@denx.de>
* | cfi_flash: fix flash on BE machines with CFG_WRITE_SWAPPED_DATASebastian Siewior2008-07-17-1/+4
|/ | | | | | | | | | | | | | This got broken by commits 93c56f212c [cfi_flash: support of long cmd in U-boot.] That command needs to be in little endian format on BE machines with CFG_WRITE_SWAPPED_DATA. Without this patch, the command 0xf0 gets saved on stack as 0x00 00 00 f0 and 0x00 gets written into the cmdbuf in case portwidth = chipwidth = 8bit. Cc: Alexey Korolev <akorolev@infradead.org> Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru> Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
* Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort MakefileWolfgang Denk2008-07-15-122/+1228
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Round the serial port clock divisor value returned by calc_divisor()Hugo Villeneuve2008-07-15-9/+3
| | | | | | | | Round the serial port clock divisor value returned by calc_divisor() Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* Fix DHCP protocol so U-Boot does not respond too earlyRobin Getz2008-07-15-2/+0
| | | | | | | | | | on the network with it's offered IP number; it should not reply until after it has received a DHCP ACK message. Also ensures that U-Boot does it's DHCPREQUEST as broadcast (per RFC 2131). Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Acked-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* cfi_flash: make the command u32 onlySebastian Siewior2008-07-15-4/+4
| | | | | | | | | | | | | This got changed by commit 93c56f212c [cfi_flash: support of long cmd in U-boot.] Long is the wrong type because it will behave differently on 64bit machines in a way that is probably not expected. u32 should be enough. Cc: Alexey Korolev <akorolev@infradead.org> Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru> Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
* tools/gitignore: update to all generated filesJean-Christophe PLAGNIOL-VILLARD2008-07-15-0/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxWolfgang Denk2008-07-15-1/+1132
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| * mpc5xxx: Add MVBC_P board supportAndre Schwarz2008-07-15-1/+1132
| | | | | | | | | | | | | | | | The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet controller (using e1000) and custom Altera Cyclone-II FPGA on PCI. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc86xxWolfgang Denk2008-07-15-214/+400
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| * | Update Freescale sys_eeprom.c to handle CCID formatsTimur Tabi2008-07-15-214/+400
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats. The NXID format replaces the older CCID format, but it's important to support both since most boards out there still use the CCID format. This change is in preparation for using one file to handle both formats. This will also unify EEPROM support for all Freescale 85xx and 86xx boards. Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR instead of ID_EEPROM_ADDR. Signed-off-by: Timur Tabi <timur@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2008-07-15-0/+12
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| * | pci: sh: Add pci_skip_dev and pci_print_dev functionNobuhiro Iwamatsu2008-07-15-0/+12
| |/ | | | | | | | | | | | | Add function of new PCI, pci_skip_dev and pci_print_dev. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-07-15-120/+366
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| * | Clean up INIT_RAM optionsAndy Fleming2008-07-14-17/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | The L2_INIT_RAM option was unused, and recent changes to the TLB code meant that the INIT_RAM TLBs weren't being cleared out. In order to reduce the amount of mapped space attached to nothing, we change things so the TLBs get cleared. Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | Remove fake flash bank from 8544 DSAndy Fleming2008-07-14-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The fake flash bank was generating errors for anyone who didn't have a PromJET hooked up to the board. As that constitutes the vast majority of users, we remove it. Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | MPC8544DS: Add ATI Video card supportKumar Gala2008-07-14-2/+23
| | | | | | | | | | | | | | | | | | Add support for using a PCIe ATI Video card on PCIe2. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx: Add some L1/L2 SPR register definitionsKumar Gala2008-07-14-0/+20
| | | | | | | | | | | | | | | | | | Add new L1/L2 SPRs related to e500mc cache config and control. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | MPC8544DS: Report board id, board version and fpga version.Kumar Gala2008-07-14-1/+4
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx: Cleanup L2 cache size detectionKumar Gala2008-07-14-17/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The L2 size detection code was a bit confusing and we kept having to add code to it to handle new processors. Change the sense of detection so we look for the older processors that aren't changing. Also added support for 1M cache size on 8572. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | sbc8560: enable CONFIG_OF_LIBFDT by defaultPaul Gortmaker2008-07-14-0/+5
| | | | | | | | | | | | | | | | | | | | | Make the default build for the sbc8560 board be powerpc capable with libfdt support. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * | Fix indentation for default boot environment variablesAndy Fleming2008-07-14-19/+19
| | | | | | | | | | | | | | | | | | | | | This was proposed by Paul Gortmaker in response to Wolfgang's comments on similar #defines in sbc8560.h. Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | sbc8560: add default fdt valuesPaul Gortmaker2008-07-14-5/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add in the default fdt settings and the typical EXTRA_ENV settings as borrowed from the mpc8560ads. Fix a couple of stale references to the mpc8560ads dating back to the original clone/fork. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | sbc8560: add in ft_board_setup()Paul Gortmaker2008-07-14-0/+28
| | | | | | | | | | | | | | | | | | | | | Add in for the sbc8560, the ft_board_setup() routine, based on what is in use for the Freescale MPC8560ADS board. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * | sbc8560: define eth0 and eth1 instead of eth1 and eth2Paul Gortmaker2008-07-14-26/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing config doesn't define CONFIG_HAS_ETH0, and so the fdt support doesn't update the zeros in the dtb local-mac with real data from the u-boot env. Since the existing config is tailored to just two interfaces, get rid of the ETH2 definitions at the same time. Also don't include any end user specific data into the environment by default -- things like MAC address, network parameters etc. need to come from the end user. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | sbc8560: properly set cs0_bnds for 512MBPaul Gortmaker2008-07-14-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | The sbc8560 board ships with 512MB of memory installed, but the current cs0_bnds is hard coded for 256MB. Set the value based on CFG_SDRAM_SIZE. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * | sbc8560: proper definitions for TSEC.Paul Gortmaker2008-07-14-10/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | The definitions for the TSEC have become out of date. There is no longer any such options like "CONFIG_MPC85xx_TSEC1" or similar. Update to match those of other boards, like the MPC8560ADS. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
| * | 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreqPaul Gortmaker2008-07-14-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards that have external 16550 UARTs don't have a direct tie between bi_busfreq and the clock used for the UARTs. Boards that do have such a tie should set CFG_NS16550_CLK to be get_bus_freq(0) -- which most of them do already. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
| * | Change the temp map to ROM to align addresses to page size.Andrew Klossner2008-07-14-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With a page size of BOOKE_PAGESZ_16M, both the real and effective addresses must be multiples of 16MB. The hardware silently truncates them so the code happens to work. This patch clarifies the situation by establishing addresses that the hardware doesn't need to truncate. Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | mpc85xx: use IS_E_PROCESSOR macroKim Phillips2008-07-14-1/+1
| | | | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | fdt: add crypto node handling for MPC8{3, 5}xxE processorsKim Phillips2008-07-14-1/+131
| | | | | | | | | | | | | | | | | | | | | | | | Delete the crypto node if not on an E-processor. If on 8360 or 834x family, check rev and up-rev crypto node (to SEC rev. 2.4 property values) if on an 'EA' processor, e.g. MPC8349EA. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | Remove LBC_CACHE_BASE from 8544 DSAndy Fleming2008-07-14-13/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping space for some anyway, we were allowing speculative loads into unmapped space, which would cause an exception (annoying, even if ultimately harmless). Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the problem. Signed-off-by: Andy Fleming <afleming@freescale.com>
* | | ARM DaVinci: Remove extern phy_t declaration by moving code to proper placeHugo Villeneuve2008-07-14-20/+6
| | | | | | | | | | | | | | | | | | | | | ARM DaVinci: Remove extern phy_t declaration by moving code to proper place. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
generated by cgit v1.1 at 2024-12-23 18:55:07 +0000