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* ppc4xx: 4xx_pcie: Fix problem with SDRN access using port number as idxStefan Roese2007-10-31-6/+6
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Rename 405gp_pci to 4xx_pci since its used on all 4xx platformsStefan Roese2007-10-31-11/+11
| | | | | | | | These files were introduced with the IBM 405GP but are currently used on all 4xx PPC platforms. So the name doesn't match the content anymore. This patch renames the files to 4xx_pci.c/h. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add a comment for 405EX PCIe endpoint configurationStefan Roese2007-10-31-0/+6
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (3)Stefan Roese2007-10-31-421/+322
| | | | | | | | | | | | | | | (3) This patch introduces macros like SDRN_PESDR_DLPSET(port) to access the SDR registers of the PCIe ports. This makes the overall design clearer, since it removed a lot of switch statements which are not needed anymore. Also, the functions ppc4xx_init_pcie_rootport() and ppc4xx_init_pcie_entport() are merged into a single function ppc4xx_init_pcie_port(), since most of the code was duplicated. This makes maintainance and porting to other 4xx platforms easier. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (2)Stefan Roese2007-10-31-33/+26
| | | | | | | | | | | This patch is the first patch of a series to make the 440SPe PCIe code usable on different 4xx PPC platforms. In preperation for the new 405EX which is also equipped with PCIe interfaces. (2) This patch renames the functions from 440spe_ to 4xx_ with a little additional cleanup Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (1)Stefan Roese2007-10-31-12/+10
| | | | | | | | | | This patch is the first patch of a series to make the 440SPe PCIe code usable on different 4xx PPC platforms. In preperation for the new 405EX which is also equipped with PCIe interfaces. (1) This patch renames the files from 440spe_pcie to 4xx_pcie Signed-off-by: Stefan Roese <sr@denx.de>
* Merge git://www.denx.de/git/u-bootStefan Roese2007-10-27-228/+573
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| * TQM5200: increase kernel_addr_r and fdt_addr_r (hinted by Wolfgang Denk).Bartlomiej Sieka2007-10-25-2/+2
| | | | | | | | Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * Merge branch 'motionpro_ng' of /home/tur/git/u-bootWolfgang Denk2007-10-24-14/+21
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| | * Motion-PRO: Update configuration to accomodate next generation board.Bartlomiej Sieka2007-10-23-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New board has faster oscillator and a different Flash chip. This affects: - CFG_MPC5XXX_CLKIN - SDRAM timings - Flash CS configuration (timings) - Flash sector size, and thus MTD partition layout - malloc() arena size (due to bigger Flash sectors) - smaller memory test range (due to bigger malloc() arena) This patch also enables more extensive memory testing via "mtest". Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| | * Motion-PRO: Add setting of SDelay reg. to SDRAM controller configuration.Bartlomiej Sieka2007-10-23-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Per AN3221 (MPC5200B SDRAM Initialization and Configuration), the SDelay register must be written a value of 0x00000004 as the first step of the SDRAM contorller configuration. Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
| * | TQM5200: fix spurious characters on second serial interfaceMartin Krause2007-10-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | With this patch PSC3 is configured as UART. This is done, because if the pins of PSC3 are not configured at all (-> all pins are GPI), due to crosstalk, spurious characters may be send over the RX232_2_TXD signal line. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| * | TQM5200S: fix commands for STK52xx base board because of missing SM501 ↵Martin Krause2007-10-24-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | grafic controller Some commands for the STK52xx base board try to access the SM501 grafic controller. But the TQM5200S has no grafic controller (only the TQM5200 and the TQM5200B have). This patch deactivates the commands accessing the SM501 for the TQM5200S. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| * | Mips: Fix string functions differ prototype declarationJean-Christophe PLAGNIOL-VILLARD2007-10-24-5/+5
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | fsl_pci_init enable COMMAND_MEMORY if inbound windowEd Swarthout2007-10-24-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Patch 16e23c3f removed PCSRBAR allocation. But passing zero windows to pciauto_setup_device has the side effect of not getting COMMAND_MEMORY set. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
| * | delta: Fix OHCI_REGS_BASE undeclared and wait_ms implicit declarationJean-Christophe PLAGNIOL-VILLARD2007-10-24-0/+3
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | fix warning: no return statement in function returning non-voidJean-Christophe PLAGNIOL-VILLARD2007-10-24-7/+7
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | xsengine: Fix no partition type specified, use DOS as defaultJean-Christophe PLAGNIOL-VILLARD2007-10-24-2/+3
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | lubbock: Fix no partition type specified, use DOS as defaultJean-Christophe PLAGNIOL-VILLARD2007-10-24-0/+1
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | Coding style: keep lists sorted; update CHANGELOGWolfgang Denk2007-10-23-16/+75
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | Fix missing drivers makefile entries ds1722.c mw_eeprom.cJean-Christophe PLAGNIOL-VILLARD2007-10-23-5/+6
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | Fix warning differ in signedness in board/innokom/innokom.cJean-Christophe PLAGNIOL-VILLARD2007-10-23-1/+1
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| * | fix pxa255_idp boardMarcel Ziswiler2007-10-23-55/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pxa255_idp being an old unmaintained board showed several issues: 1. CONFIG_INIT_CRITICAL was still defined. 2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined. 3. Symbol flash_addr was undeclared. 4. The boards lowlevel_init function was still called memsetup. 5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000. 6. Using -march=armv5 instead of -march=armv5te resulted in lots of 'target CPU does not support interworking' warnings on recent compilers. 7. The PXA's serial driver redefined FFUART, BTUART and STUART used as indexes rather than the register definitions from the pxa-regs header file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to avoid any ambiguities. 8. There were several redefinition warnings concerning ICMR, OSMR3, OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file. 9. The board configuration file was rather outdated. 10. The part header file defined the vendor, product and revision arrays as unsigned chars instead of just chars in the block_dev_desc_t structure. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
| * | Make MPC8266ADS command selection more robustRune Torgersen2007-10-23-33/+20
| | | | | | | | | | | | | | | | | | Fix MPC8266 command line definition so it won't break when new commands are added to u-boot. Signed-off-by Rune Torgersen <runet@innovsys.com>
| * | Minor coding style cleanup; update CHANGELOGWolfgang Denk2007-10-21-17/+259
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | Fix NE2000 driver:Vlad Lungu2007-10-21-24/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed typo in ne2000.h, thinko re n2k_inb() usage, don't try to do anything in eth_stop() if eth_init() was not called. Simplified RX path in order to avoid timeouts on really really fast NE2000 cards (read: qemu with internal tftp), NetLoop() is clever enough to cope with 1 packet per eth_rx(). Signed-off-by: Vlad Lungu <vlad@comsys.ro>
| * | Merge branch 'master' of git://www.denx.de/git/u-boot-tq-groupWolfgang Denk2007-10-21-31/+47
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| | * | TQM860M: adjust for doubled flash sector size.Martin Krause2007-10-15-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * | TQM8xx: Fix CAN timing.Jens Gehrlein2007-10-15-7/+9
| | | | | | | | | | | | | | | | Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * | TQM866M: fix SDRAM refreshMartin Krause2007-10-15-16/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At 133 MHz the current SDRAM refresh rate is too fast (measured 4 * 1.17 us). CFG_MAMR_PTA changes from 39 to 97. This result in a refresh rate of 4 * 7.8 us at the default clock 50 MHz. At 133 MHz the value will be then 4 * 2.9 us. This is a compromise until a new method is found to adjust the refresh rate. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| | * | TQM866M: adjust for doubled flash sector size.Martin Krause2007-10-15-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause <martin.krause@tqs.de>
| * | | Merge branch 'master' of /home/git/u-boot/Wolfgang Denk2007-10-21-66/+135
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| | * | Fix two typos.Detlev Zundel2007-10-19-2/+2
| | | | | | | | | | | | | | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
| | * | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2007-10-18-1/+7
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| | * | | mpc83xx: Add configure entry for MPC83xx ATM supportTony Li2007-10-18-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MPC8360EMDS_ATM_config and MPC832XEMDS_ATM_config into Makfile and MAKEALL Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | | mpc83xx: pq-mds-pib.c typo errorTony Li2007-10-18-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct to val8 from val. Signed-off-by: Tony Li <tony.li@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | | Merge git://www.denx.de/git/u-bootKim Phillips2007-10-18-516/+3477
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| | * \ \ \ Merge branch 'master' of git://www.denx.de/git/u-bootKim Phillips2007-09-24-175/+626
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| | * | | | | Update MPC8349ITX*_config to place config.tmp in right place.Sam Sparks2007-09-14-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC834ITX*_config does not store config.tmp at the correct locatation, causing MPC8349ITXGP to have the wrong TEXT_BASE. Signed-off-by: Sam Sparks <SSparks@twacs.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | | | | Make MPC8266ADS board compile again.runet@innovsys.com2007-10-16-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Runet Torgersen <runet@innovsys.com>
* | | | | | | ppc4xx: lwmon5: Some further GPIO config changesStefan Roese2007-10-23-2/+2
| |_|_|_|/ / |/| | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | | ppc4xx: Add 667/133 (CPU/PLB) frequency setup to Sequoia bootstrap commandStefan Roese2007-10-18-1/+7
| |_|_|/ / |/| | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge branch 'master' of git+ssh://gemini_vpn/home/wd/git/u-boot/masterWolfgang Denk2007-10-16-9/+21
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| * | | | 86xx: Allow for fewer DDR slots per memory controller.Jon Loeliger2007-10-16-9/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a direct correlation exists between DDR DIMM slots and SPD EEPROM addresses used to configure them, use the individually defined SPD_EEPROM_ADDRESS* values to determine if a DDR DIMM slot should have its SPD configuration read or not. Effectively, this now allows for 1 or 2 DIMM slots per memory controller. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* | | | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2007-10-15-40/+72
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| * \ \ \ \ Merge branch 'master' of git://www.denx.de/git/u-boot-usbWolfgang Denk2007-10-15-40/+72
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| | * | | | | Bugfix: Use only one PTD for one endpointTimo Ketola2007-10-02-40/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Original isp116x-hcd code prepared multiple PTDs for longer than 16 byte transfers for one endpoint. That is unnecessary because the ISP116x is able to split long data from one PTD into multiple transactions based on the buffer size of the endpoint. It also caused serious problems if the endpoint NAKed some of the transactions. In that case ISP116x wouldn't notice that the other PTDs were for the same endpoint and would try the other PTDs possibly out of order. That would break the whole transfer. This patch makes isp116x_submit_job to use one PTD for one transfer. Signed-off-by: Timo Ketola <timo.ketola@exertus.fi> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
* | | | | | | Merge branch 'master' of git+ssh://gemini_vpn/home/wd/git/u-boot/masterWolfgang Denk2007-10-15-0/+16
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| * | | | | PXA USB OHCI: "usb stop" implementation.Rodolfo Giometti2007-10-15-0/+16
| | |_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some USB keys need to be switched off before loading the kernel otherwise they can remain in an undefined status which prevents them to be correctly recognized by the kernel. Signed-off-by: Rodolfo Giometti <giometti@linux.it>
* | | | | ppc4xx: Fix bug in I2C bootstrap values for Sequoia/RainierStefan Roese2007-10-15-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C bootstrap values that can be setup via the "bootstrap" command, were setup incorrect regarding the generation of the internal sync PCI clock. The values for PLB clock == 133MHz were slighly incorrect and the values for PLB clock == 166MHz were totally incorrect. This could lead to a hangup upon booting while PCI configuration scan. This patch fixes this issue and configures valid PCI divisor values for the sync PCI clock, with respect to the provided external async PCI frequency. Here the values of the formula in the chapter 14.2 "PCI clocking" from the 440EPx users manual: AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz 33MHz async PCI frequency: PLB = 133: => 32 <= 44.3 <= 65 (div = 3) PLB = 166: => 32 <= 55.3 <= 65 (div = 3) 66MHz async PCI frequency: PLB = 133: => 65 <= 66.5 <= 132 (div = 2) PLB = 166: => 65 <= 83 <= 132 (div = 2) Signed-off-by: Stefan Roese <sr@denx.de>
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