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* ppc4xx: ML2 shouldn't include the 4xx EMAC driverStefan Roese2008-11-21-1/+0
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: katmai: Change default configYuri Tikhonov2008-11-21-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables support for EXT2, and increases the CONFIG_SYS_BOOTMAPSZ size for the default configuration of the katmai boards to use them as the RAID-reference AMCC setups. EXT2 enabling allows one to boot kernels from the EXT2 formatted Compact Flash cards. CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the Linux kernels, which use PAGE_SIZE of 256KB. Otherwise, the memory area with DTB file (which is placed at the end of the bootmap area) will turn out to be overlapped with the BSS segment of the 256KB kernel, and zeroed in early_init() of Linux. Actually, increasing of the bootmap size could be done via setting of the bootm_size U-Boot variable, but it looks like the current U-Boot implementation have some bootm_size- related functionality lost. In many places through the U-Boot code the CONFIG_SYS_BOOTMAPSZ definition is used directly (instead of trying to read the corresponding value from the environment). The same is truth for the boot_jump_linux() function in lib_ppc/bootm.c, where U-Boot transfers control to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size) value to the booting kernel. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initializationDave Mitchell2008-11-21-9/+22
| | | | | | | | | | | | | | | | | | Expanded OCM TLB to allow access to 64K OCM as well as 256K of internal SRAM. Adjusted internal SRAM initialization to match updated user manual recommendation. OCM & ISRAM are now mapped as follows: physical virtual size ISRAM 0x4_0000_0000 0xE300_0000 256k OCM 0x4_0004_0000 0xE304_0000 64k A single TLB was used for this mapping. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRsDave Mitchell2008-11-21-70/+108
| | | | | | | | | | | Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and L2 cache DCRs from ppc440.h to this new header. Also converted these DCR defines from lowercase to uppercase and modified referencing modules to use them. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.hSteven A. Falco2008-11-21-12/+3
| | | | | | | | | | | | | The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed. The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, and are unused, so they can be removed too. A definition for SDR0_DDRCFG is added. Signed-off-by: Steven A. Falco <sfalco@harris.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Clear all potentially pending exceptions in MCSRStefan Roese2008-11-20-0/+4
| | | | | | | | This is needed on Canyonlands which still has an exception pending while running relocate_code(). This leads to a failure after trap_init() is moved to the top of board_init_r(). Signed-off-by: Stefan Roese <sr@denx.de>
* Align end of bss by 4 bytesSelvamuthukumar2008-11-18-81/+260
| | | | | | | | | | Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc86xxWolfgang Denk2008-11-18-278/+721
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| * mpc8641: fix address-cells default in old .dts detectionBecky Bruce2008-11-11-3/+3
| | | | | | | | | | | | | | | | address-cells defaults to 2, not 1; so in the unlikely event that it isn't specified, this patch is required for correct operation. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * lib_ppc: Move trap_init to occur earlierBecky Bruce2008-11-10-5/+5
| | | | | | | | | | | | | | | | | | | | | | Doing trap_init immediately once we're running from RAM means we're no longer dependent on the physical location of the flash on non-BookE platforms. Before trap_init, those platforms switch to real mode and go to 0xfff00100 on exception. After the switch, they go to 0x00000100 This makes it easier to move the flash location. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Try to detect old .dts filesBecky Bruce2008-11-10-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | Since we've changed the memory map of the board, be nice and add some checking to try to catch out-of-date .dts files. We do this by checking the CCSRBAR location in the .dts and comparing it to the CCSRBAR location in u-boot. If they don't match, a warning msg is printed. This isn't foolproof, but it's simple and will catch most of the cases where an out-of-date .dts is present, including all of the cases where a new u-boot is used with an old standard MPC8641 .dts file as supplied with Linux. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * toplevel Makefile: Add MPC8641HPCN_36BIT targetBecky Bruce2008-11-10-1/+7
| | | | | | | | | | | | This will enable CONFIG_PHYS_36BIT for MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Support 36-bit physical addressingBecky Bruce2008-11-10-53/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch creates a memory map with all the devices in 36-bit physical space, in addition to the 32-bit map. The CCSR relocation is moved (again, sorry) to allow for the physical address to be 36 bits - this requires translation to be enabled. With 36-bit physical addressing enabled, we are no longer running with VA=PA translations. This means we have to distinguish between the two in the config file. The existing region name is used to indicate the virtual address, and a _PHYS variety is created to represent the physical address. Large physical addressing is not enabled by default. Set CONFIG_PHYS_64BIT in the config file to turn this on. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Change 32-bit memory mapBecky Bruce2008-11-10-68/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory map on the 8641hpcn is modified to look more like the 85xx boards; this is a step towards a more standardized layout going forward. As part of this change, we now relocate the flash. The regions for some of the mappings were far larger than they needed to be. I have reduced the mappings to match the actual sizes supported by the hardware. In addition I have removed the comments at the head of the BAT blocks in the config file, rather than updating them. These get horribly out of date, and it's a simple matter to look at the defines to see what they are set to since everything is right here in the same file. Documentation has been changed to reflect the new map, as this change is user visible, and affects the OS which runs post-uboot. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLYBecky Bruce2008-11-10-11/+39
| | | | | | | | | | | | | | | | | | | | | | We define CONFIG_MONITOR_BASE_EARLY to define the initial location of the bootpage in flash. Use this to create an early mapping definition for the FLASH, and change the early_bats code to use this. This change facilitates the relocation of the flash since the early mappings are no longer tied to the final location of the flash. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc86xx: Use SRR0/1/rfi to enable address translation, not blrBecky Bruce2008-11-10-11/+8
| | | | | | | | | | | | | | | | | | | | Using a mtmsr/blr means that you have to be executing at the same virtual address once you enable translation. This is unnecessarily restrictive, and is not really how this is usually done. Change it to use the more common mtspr SRR0/SRR1 and rfi method. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: make DIAG_ADDR == FLASH_BASEBecky Bruce2008-11-10-1/+1
| | | | | | | | | | | | Currently, that's what it is, but it's hardcoded. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Drop imaginary second flash bank, map 8MBBecky Bruce2008-11-10-28/+15
| | | | | | | | | | | | | | | | | | There's a lot of setup and foo for the second flash bank. The problem is, this board doesn't actually have one. Clean this up. Also, the flash is 8M in size. Get rid of the confusing aliased overmapping, and just map 8M. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: only define CONFIG_ENV_SIZE onceBecky Bruce2008-11-10-2/+1
| | | | | | | | | | | | | | | | It's currently defined twice inside in an if/else block, but both halves set the same value. Move the define outside the if. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc86xx: Move setup_bats into cpu_init_fBecky Bruce2008-11-10-5/+4
| | | | | | | | | | | | | | | | | | | | | | In order to later allow for a physical relocation of the flash, setup_bats, which sets up the final BAT mapping for the board, needs to happen *after* init_laws(). Otherwise, there will be no window programmed for the flash at the new physical location at the point when we change the mmu translation. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * mpc8641: Remove extra "0" from BR2 defineBecky Bruce2008-11-10-1/+1
| | | | | | | | Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * Merge commit 'wd/master'Jon Loeliger2008-11-10-8536/+7619
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| * | powerpc: change 86xx SMP boot methodBecky Bruce2008-11-04-73/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | We put the bootpg for the secondary cpus into memory and use BPTR to get to it. This is a step towards converting to the ePAPR boot methodology. Also, the code is written to deal properly with more than 4GB of RAM. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | 8641HPCN: Config file cleanupBecky Bruce2008-11-03-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several items in the config file that were hardcoded but that should really be based on other config options, since the regions are contiguous and depend on being so. This cleans that up a bit. Also, add BR_PHYS_ADDR() macro to convert addresses into the proper format for BR registers. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | 86xx: Make dram_size a phys_size_tBecky Bruce2008-11-03-6/+6
| | | | | | | | | | | | | | | | | | It's currently a long and should be phys_size_t. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | powerpc 86xx: Handle CCSR relocation earlierBecky Bruce2008-11-03-16/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the CCSR gets relocated while translation is enabled, meaning we need 2 BAT translations to get to both the old location and the new location. Also, the DEFAULT CCSR location has a dependency on the BAT that maps the FLASH region. Moving the relocation removes this unnecessary dependency. This makes it easier and more intutive to modify the board's memory map. Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same BAT for CCSR space. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI buildBecky Bruce2008-11-03-17/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | You can't actually have both, and with some coming changes to change the memory map for the board and support 36-bit physical, we need the extra BAT that is being consumed by having both. I also make non-PCI configs build cleanly, for the sake of sanity. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
| * | mpc8641: Stop supporting non-PCI_PNP configsBecky Bruce2008-11-03-27/+1
| | | | | | | | | | | | | | | | | | | | | We don't actually ever do this, remove the code so we can stop maintaining it. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* | | drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver.Richard Retanubun2008-11-09-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c. This adds support for PHY-less MAC connections to the UEC. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | ColdFire: Add mii driver in drivers/netTsiChung Liew2008-11-09-17/+326
| | | | | | | | | | | | | | | | | | | | | All CF platforms' mii.c are consolidated into one Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of PPC4xx EMAC to cpu_eth_init()Ben Warren2008-11-09-4/+15
| | | | | | | | | | | | | | | | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* | | Moved PPC4xx EMAC driver to drivers/netBen Warren2008-11-09-20/+19
| | | | | | | | | | | | | | | | | | | | | Also changed path in all linker scripts that reference this driver Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* | | Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMACBen Warren2008-11-09-12/+53
| | | | | | | | | | | | | | | | | | | | | All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* | | Moved initialization of MPC8XX SCC to cpu_eth_init()Ben Warren2008-11-09-4/+5
| | | | | | | | | | | | | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of MPC8220 FEC to cpu_eth_init()Ben Warren2008-11-09-4/+16
| | | | | | | | | | | | | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of QE Ethernet controller to cpu_eth_init()Ben Warren2008-11-09-20/+38
| | | | | | | | | | | | | | | | | | Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of FCC Ethernet controller to cpu_eth_initBen Warren2008-11-09-6/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Affected boards: Several MPC8xx boards Several MPC8260/MPC8272 boards Several MPC85xx boards Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Fix typo in cpu/mpc85xx/cpu.cBen Warren2008-11-09-1/+1
| | | | | | | | | | | | | | | | | | CONFIG_MPC85xx_FEC -> CONFIG_MPC85XX_FEC Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | net: Move initialization of Au1x00 SoC ethernet MAC to cpu_eth_initShinya Kuribayashi2008-11-09-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init as a part of ongoing eth_initialize cleanup work. The function ret value is also fixed as it should be negative on fail. Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Moved initialization of IXP4XX_NPE Ethernet controller to cpu_eth_init()Ben Warren2008-11-09-4/+10
| | | | | | | | | | | | | | | | | | Also, removed the driver initialization from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | xilinx_emaclite buffer overrunClive Stubbings2008-11-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Patch to fix buffer allocation size and alignment. Buffer needs to be u32 aligned and PKTSIZE_ALIGN bytes long. Acked-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | NET: QE: UEC: Make uec_miiphy_read() and uec_miiphy_write() use the devname arg.richardretanubun2008-11-09-3/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current uec_miiphy_read and uec_miiphy_write hardcode access devlist[0] This patch makes these function use the devname argument that is passed in to allow access to the phy registers of other devices in devlist[]. Signed-of-by: Richard Retanubun <RichardRetanubun@RugggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Adds two more ethernet interface to 83xxrichardretanubun2008-11-09-0/+8
| |/ |/| | | | | | | | | Fixed compiler warning "declared but unused" eth5_uec_info and eth6_uec_info. Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2008-11-09-37/+47
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| * \ Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2008-11-09-37/+47
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| | * | Change to use "do_div" macroTomohiro Masubuchi2008-11-04-13/+45
| | | | | | | | | | | | | | | | Signed-off-by: Tomohiro Masubuchi <tomohiro_masubuchi@tripeaks.co.jp>
| | * | ARM926EJ-S: relocate OMAP specific 'cpuinfo.c' into OMAP directoryRoman Mashak2008-11-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP identification is implemented in 'cpuinfo.c' and located in ARM926EJ-S directory. It makes sense to place this file in OMAP specific subdirectory, i.e. cpu/arm926ejs/omap Signed-off-by: Roman Mashak <romez777@gmail.com>
| | * | ARM/Versatile port: Removed unused functionsRoman Mashak2008-11-04-22/+0
| | |/ | | | | | | | | | | | | | | | Removal of never used functions. Signed-off-by: Roman Mashak <romez777@gmail.com>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2008-11-09-30/+619
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| * | Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2008-11-09-30/+619
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