summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* buildman: Correct 'Series-cover-cc' detection logicSimon Glass2015-08-31-1/+1
| | | | | | This requires 'Series-cover_cc' at present which is incorrect. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
* drivers: kconfig: Sort driver menu in alphabetical orderBin Meng2015-08-31-24/+26
| | | | | | | Sort different types of drivers in alphabetical order. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* drivers: kconfig: Move PHYS_TO_BUS to "Device Drivers" menuBin Meng2015-08-31-2/+2
| | | | | | | Right now PHYS_TO_BUS shows in the Kconfig main menu, move it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* drivers: kconfig: Move "Generic Driver Options" menu to the topBin Meng2015-08-31-2/+2
| | | | | | | Make "Generic Driver Options" menu show on the top in the Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: core: Add Kconfig for simple bus driverMarek Vasut2015-08-31-6/+17
| | | | | | | | | | | | Add Kconfig entries for the simple-bus driver, both for U-Boot and for SPL. The simple-bus is enabled by default in U-Boot and disabled by default in SPL to preserve the original behavior. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Modified to fit on top of Masahiro's $(SPL) setup: Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Use dev_get_addr() where possibleSimon Glass2015-08-31-29/+26
| | | | | | | | | | This is a convenient way for a driver to get the hardware address of a device, when regmap or syscon are not being used. Change existing callers to use it as an example to others. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* dm: simplify uclass_foreach_dev() implementationMasahiro Yamada2015-08-31-7/+2
| | | | | | | | This can be simply written with list_for_each_entry(), maybe this macro was not necessary in the first place. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board supportMasahiro Yamada2015-08-31-2/+334
| | | | | | | | | | | | | | Initial version of DTSI for ProXstream2 and PH1-LD6b and DTS for PH1-LD6b reference board. Import from Linux with some adjustments: - Use SPDX-License-Identifier - Add clock-frequency to serial nodes - Drop unusable nodes from -ref.dts While I am here, sort Makefile entries alphabetically. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add PH1-Pro5 SoC supportMasahiro Yamada2015-08-31-0/+216
| | | | | | | | Initial version of UniPhier PH1-Pro5 device tree. (Imported from Linux with adjustment for SPDX License Identifier) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: sync with LinuxMasahiro Yamada2015-08-31-107/+472
| | | | | | | This commit imports device tree updates from Linux. It eventually adds pinctrl-related nodes and properties. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* serial: uniphier: drop platform data supportMasahiro Yamada2015-08-31-44/+15
| | | | | | | | | | This driver is enabled only for UniPhier SoCs and ARCH_UNIPHIER now selects OF_CONTROL and SPL_OF_CONTROL. This driver no longer needs to support platform data configuration. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: uniphier: enable SPL_OF_CONTROLMasahiro Yamada2015-08-31-67/+31
| | | | | | | | | | | | | Device Tree really improves code maintainability and is now available for SPL too. This is the state-of-the-art implementation in U-boot. The board files (platform data) are no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: uniphier: select SPL_DM rather than default in defconfigMasahiro Yamada2015-08-30-4/+1
| | | | | | Now UniPhier SoCs highly depend on Driver Model for SPL, too. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unused macroMasahiro Yamada2015-08-30-2/+0
| | | | | | This macro is not referenced at all. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix build error when CONFIG_DEBUG_LL is definedMasahiro Yamada2015-08-30-0/+2
| | | | | | | The build error happens if CONFIG_DEBUG_LL and CONFIG_MACH_PH1_SLD3 are both enabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mtd: denali_spl: do not allocate page_buffer in .bss sectionMasahiro Yamada2015-08-30-20/+12
| | | | | | | | | | | | | | | | | | | Since commit 2580a2a7e719 ("mtd: nand: Increase max sizes of OOB and Page size"), three boards (ph1_ld4, ph1_pro4, ph1_sld8) fail to build with the following error message: arm-linux-gnueabi-ld.bfd: SPL image plus BSS too big They compile drivers/mtd/nand/denali_spl.c and it has a page_buffer as static data: static uint8_t page_buffer[NAND_MAX_PAGESIZE]; This buffer required 8KB in .bss section before that commit and now it has been increased to 16KB. Given limited code/memory size for SPL, it is not a good idea to allocate a page buffer statically. In the first place, the load address 'dst' can be used as a page buffer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* tools/atmelimage.c: Fix warning when debug is enabledTom Rini2015-08-28-1/+1
| | | | | | | | | | Otherwise we get: tools/atmelimage.c:134:3: warning: format ‘%d’ expects argument of type ‘int’, but argument 2 has type ‘size_t’ [-Wformat=] debug("atmelimage: interrupt vector #%d is 0x%08X\n", pos+1, ^ Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP5/AM43xx: remove enabling USB clocks from enable_basic_clocks()Kishon Vijay Abraham I2015-08-28-42/+0
| | | | | | | | | | Now that we have separate function to enable USB clocks, remove enabling USB clocks from enable_basic_clocks(). Now board_usb_init() should take care to invoke enable_usb_clocks() for enabling USB clocks. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: invoke clock API to enable and disable clocksKishon Vijay Abraham I2015-08-28-0/+10
| | | | | | | | invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: AM43xx: Add functions to enable and disable USB clocksKishon Vijay Abraham I2015-08-28-0/+73
| | | | | | | | | | | Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively. Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP5: Add functions to enable and disable USB clocksKishon Vijay Abraham I2015-08-28-0/+101
| | | | | | | | | | | Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively. Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: OMAP5: added USB initializtion codeKishon Vijay Abraham I2015-08-28-0/+81
| | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in omap5 board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: beagle_x15: added USB initializtion codeKishon Vijay Abraham I2015-08-28-1/+112
| | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in beagle_x15 board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* include: configs: am43xx_evm: add 'usb stop' in usbboot envKishon Vijay Abraham I2015-08-28-0/+2
| | | | | | | | | | | | The usbboot environment variable has 'usb start' command but doesn't have the corresponding 'usb stop' command. This breaks usb peripheral mode if tried after 'run usbboot' fails to load the images in usb host mode. Fix it here by adding 'usb stop' command in usbboot env. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: remove duplicate initialization of vbus_id_statusKishon Vijay Abraham I2015-08-28-4/+0
| | | | | | | | vbus_id_status is initialized in board_usb_init. So remove it while creating dwc3_device objects. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* TI PHY: Add support to control 2nd USB PHY in DRA7xx/AM57xxKishon Vijay Abraham I2015-08-28-4/+11
| | | | | | | | Added support to power on/power off the second USB PHY present in DRA7xx and AM57xx. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2Kishon Vijay Abraham I2015-08-28-0/+23
| | | | | | | | Enabled clocks for the second dwc3 controller and second USB PHY present in DRA7. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* usb: dwc3: dwc3-omap: Use the clear register inorder to clear the interruptsKishon Vijay Abraham I2015-08-28-18/+28
| | | | | | | | | | Writing "0x00" to the USBOTGSS_IRQENABLE_SET_MISC and USBOTGSS_IRQENABLE_SET_0 doesn't disable the interrupts. Used USBOTGSS_IRQENABLE_CLR_MISC and USBOTGSS_IRQENABLE_CLR_0 instead. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* Makefile: fix SOURCE_DATE_EPOCH for *BSD hostAndreas Bießmann2015-08-28-3/+15
| | | | | | | | | | | | | | | | | | | The SOURCE_DATE_EPOCH mechanism for reproducible builds require some date(1) with -d switch to print the relevant date and time strings of another point of time. In other words it requires some date(1) that behaves like the GNU date(1) [1]. The BSD date(1) [2] on the other hand has the same switch but with a different meaning. Respect this and check the date(1) abilities before usage, error on non working version. Use the well known pre- and suffixes for the GNU variant of a tool on *BSD hosts to search for a working date(1) version. [1] http://man7.org/linux/man-pages/man1/date.1.html [2] http://www.freebsd.org/cgi/man.cgi?query=date Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* picosam9g45: adopt CONFIG_SYS_PROMPTAndreas Bießmann2015-08-28-1/+1
| | | | | | | | Commit 181bd9dc61d2da88b78f1c1138a685dae39354d6 introduced Kconfig selection for SYS_PROMPT. When applying the new picosam9g45 board this change slipped through, adopt it. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91sam9260ek: add missing files to MAINTAINERSAndreas Bießmann2015-08-28-0/+1
| | | | | | | | | | | This fixes the following genboardscfg.py warnings: ---8<--- WARNING: no status for 'at91sam9g20ek_2mmc' WARNING: no maintainers for 'at91sam9g20ek_2mmc' --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91sam9rlek: add missing files to MAINTAINERSAndreas Bießmann2015-08-28-0/+1
| | | | | | | | | | | This fixes following genboardscfg.py warning: ---8<--- WARNING: no status for 'at91sam9rlek_mmc' WARNING: no maintainers for 'at91sam9rlek_mmc' --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* omap-common: SYS_BOOT fallback logic correction and support for more devicesPaul Kocialkowski2015-08-28-10/+22
| | | | | | | | | | | | | | | | | | | | | The SYS_BOOT-based fallback shouldn't only check for one of the conditions of use and then let the switch/case handle each boot device without enforcing the conditions for each type of boot device again. For instance, this behaviour would trigger the fallback for UART when BOOT_DEVICE_UART is defined, CONFIG_SPL_YMODEM_SUPPORT is enabled (which should be a show-stopper) and e.g. BOOT_DEVICE_USB is enabled and not CONFIG_SPL_USB_SUPPORT. Separating the logic for USB and UART solves this. In addition, this adds support for more peripheral devices (USBETH and CPGMAC) to the fallback mechanism. Note that the USBETH boot device should always be different from the USB boot device (each should match a different bootrom handoff case). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* mtd/nand/ubi: assortment of alignment fixesMarcel Ziswiler2015-08-28-7/+19
| | | | | | | | | | | | | | Various U-Boot adoptions/extensions to MTD/NAND/UBI did not take buffer alignment into account which led to failures of the following form: ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x1f7f1108 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <scottwood@freescale.com> [trini: Add __UBOOT__ hunk to lib/zlib/zutil.c due to malloc.h in common.h] Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: spear: Some changes / updates to the x600 config headerStefan Roese2015-08-28-5/+16
| | | | | | | | | | | | | | | This patch brings the following changes to the x600 board support: - Add USB EHCI support - Add VFAT support for USB key file access - Increase malloc size (for UBI / UBIFS usage) - Enable Thumb mode to save some image space - Remove unreferenced CONFIG_STACKSIZE - Remove unreferenced CONFIG_SPL_NO_PRINTF Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com>
* arm: spear: Enable caches on SPEArStefan Roese2015-08-28-0/+10
| | | | | | | | | | | The designware ethernet driver supports d-cache now. So there is nothing stopping us now to enable the caches completely on SPEAr. Tested on SPEAr600 x600 board. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com>
* arm: spear: Move to common SPL infrastructureStefan Roese2015-08-28-271/+85
| | | | | | | | | | | | | The SPL implementation for SPEAr600 is older than the common SPL infrastructure. This patch now moves the SPEAr600 SPL over to the common SPL code. Tested on the only SPEAr board that currently uses SPL in mainline U-Boot, the x600. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com>
* arm: spear: Fix booting - relocate vector table to 0 (low-vector)Stefan Roese2015-08-28-5/+0
| | | | | | | | | | | | Booting SPEAr600 eval board doesn't work with current mainline U-Boot. With this patch the low-vector bit is left to '0'. Resulting in the common relocation of the vectors to 0 (SDRAM) to work correctly. Tested on the SPEAr600 EVB. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com>
* ARM: k2l: Fix device speedsLokesh Vutla2015-08-28-3/+3
| | | | | | | | | | | ARM supported speeds and init value of core_pll for SDP1200 are programmed wrong as part for the device speed cleanups. Fixing it here. Thanks to "Vitaly Andrianov <vitalya@ti.com>" for bisecting this issue Fixes: c37ed9f11b61 ("ARM: keystone2: Fix dev and arm speed detection") Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Update READMELokesh Vutla2015-08-28-11/+15
| | | | | | | Update README to include uart boot mode support and makefile changes. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Build MLO by defaultLokesh Vutla2015-08-28-0/+4
| | | | | | | | | | | MLO(NAND/MMC boot image), is used for all the ks2 platforms. Enabling it in config.mk so that these images will be automatically built upon calling make. u-boot-spi.gph is already the build target, so not including here. Reported-by: Nishanth Menon <nm@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: Rename u-boot-nand.gph to MLOLokesh Vutla2015-08-28-7/+9
| | | | | | | | | | | | | | NAND boot mode, ROM expects an image with a gp header in the beginning and an 8bytes filled with zeros at the end. The same is true for SD boot on K2G platforms but the file name should be MLO. Renaming u-boot-nand.gph to MLO, so that same image can be used for NAND and SD boots. And also not including all the u-boot only images under CONFIG_SPL_BUILD. Reported-by: Nishanth Menon <nm@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: move the custom build rules out to keystone specific makefileNishanth Menon2015-08-28-16/+22
| | | | | | | | | | | | | | | Keystone has build rules introduced by commit ef509b9063fb7 ("k2hk: add support for k2hk SOC and EVM") and commit 0e7f2dbac6ead ("keystone: add support for NAND gpheader image"). These are not reused by other platforms for the build, hence there is no clear benefit is maintaining them in the generic makefile as a build target. move these to the keystone specific make option Original idea of using config.mk by Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: keystone2: configs: Move SP to end of u-boot sectionLokesh Vutla2015-08-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently u-boot stack is defined at the beginning of MSMC RAM. This is a problem for uart boot mode as ROM downloads directly to starting of MSMC RAM. Fixing it by moving stack to the end of u-boot section and shifting SYS_TEXT_BASE to the start of MSMC RAM. Updated division of MSMC RAM is shown below: ----------------------------------------- | | | | | U-Boot text |U-Boot | SPL text | | download | Stack | Download + | | | | SPL_BSS + | | | | SPL_STACK | ----------------------------------------- [1] [2] [3] [4] [1] SYS_TEXT_BASE (Start of MSMC RAM) [2] SPL_TEXT_BASE - GBL_DATA_SIZE [3] SPL_TEXT_BASE [4] END of SPL [1] + [2] is at least 1M on all platforms, so no chance of overlap. Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* env_mmc: Properly prefix mmc errors with '!'Hans de Goede2015-08-28-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | The set_default_env() function from env_common.c expects either a fully formatted error msg, e.g.: "## Resetting to default environment\n" or an error msg prefixed with an !, in which case it will format it. Fix the init_mmc_for_env() error messages to be prefixed with a ! this changes the bootup-log on sunxi when no mmc card is found from: MMC: SUNXI SD/MMC: 0 No MMC card foundIn: serial Out: serial To: MMC: SUNXI SD/MMC: 0 *** Warning - No MMC card found, using default environment In: serial Out: serial Which clearly is how things should look. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* malloc_simple: Correct the alignment logic in memalign_simple()Simon Glass2015-08-28-1/+1
| | | | | | | | This should use the align parameter, not bytes. Natural alignment is one use case but should not be the only one supported by this function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* kconfiglib: update to the latest versionUlf Magnusson2015-08-28-2252/+1906
| | | | | | | | | | | | | | | Corresponds to ba71a0e (Fix _parse_block() 'parent' documentation re. ifs.) from upstream, just adding the SPDX tag. Has performance improvements, code cleanup, Python 3 support, and various small fixes, including the following: - Unset user values when loading a zero-byte .config. (5e54e2c) - Ignore indented .config assignments. (f8a7510) - Do not require $srctree to be set for non-kernel projects. (d56e9c1) - Report correct locations in the presence of continuation lines. (0cebc87) Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
* ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0Nishanth Menon2015-08-28-0/+19
| | | | | | | | | | | | | | | | | | | DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet provided IODELAY values for standard RGMII phys do not work. Silicon Revision(SR) 2.0 provides an alternative bit configuration that allows us to do a "gross adjustment" to launch the data off a different internal clock edge. Manual IO Delay overrides are still necessary to fine tune the clock-to-data delays. This is a necessary workaround for the quirky ethernet Phy we have on the platform. NOTE: SMA registers are spare "kitchen sink" registers that does contain bits for other workaround as necessary as well. Hence the control for the same is introduced in a generic SoC specific, board generic location. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA74-evm: Add iodelay values for SR2.0Nishanth Menon2015-08-28-11/+83
| | | | | | | | | | | | | | | Silicon revision 2.0 has new signal routing hence has an updated set of iodelay parameters to be used. Update the configuration for the same. Padmux remains the same. Based on data from VayuES2_EVM_Base_Config-20150807. NOTE: With respect to the RGMII values, the Manual IODelay values are used for the fine adjusments needed to meet the tight RGMII specification. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Add detection of ES2.0Nishanth Menon2015-08-28-0/+11
| | | | | | | | | | | | | | | | | Add support for detection of ES2.0 version of DRA7 family of processors. ES2.0 is an incremental revision with various fixes including the following: - reset logic fixes - few assymetric aging logic fixes - MMC clock rate fixes - Ethernet speed fixes - edma fixes for mcasp [ravibabu@ti.com: posted internal for an older bootloader] Signed-off-by: Ravi Babu <ravibabu@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-12-02 21:06:49 +0000