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* tegra: Add a function mux featureSimon Glass2011-12-24-1/+100
| | | | | | | | | | | | funcmux permits selection of config options for particular peripherals, such as the pins that are used for that peripheral, if there are several options. Add UART selection to start with. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add clock_ll_start_uart() to enable UART prior to relocSimon Glass2011-12-24-0/+25
| | | | | | | | | | Most boards will want to enable a UART early. This function provides that feature in Tegra architecture code so the code does not need to be copied on every board. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move clock_early_init() to arch_cpu_init()Simon Glass2011-12-24-3/+3
| | | | | | | | | The clock init is not board specific, so move it into the cpu code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move cpu_init_cp15() to arch_cpu_init()Simon Glass2011-12-24-3/+4
| | | | | | | | | This call is more of an architecture requirement than a board one, so move it there. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Tegra: Fix Harmony and Ventana builds in u-boot-tegra/masterTom Warren2011-12-24-3/+4
| | | | | | | Seaboard changes have removed the need for common/board.o in the Makefile. Propagate this change to the other Tegra2 builds. Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Fix build error in plutux, medcomSimon Glass2011-12-24-0/+4
| | | | | | | | | | We need to define CONFIG_ENV_IS_NOWHERE to avoid this error: cmd_nvedit.c:69:3: error: #error Define one of CONFIG_ENV_IS_IN_... Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add Avionic Design Medcom support.Thierry Reding2011-12-24-0/+159
| | | | | | | | | | | | | | | | | | | The Medcom is a 16:9 15" terminal that is used for patient infotainment in hospitals. Changes in v3: * Remove unused implementation of gpio_config_uart(). * Implement MMC/SD card detection. * Drop board_mmc_getcd() which is now implemented by common Tegra2 code. * Add MAINTAINERS entry. Changes in v2: * No longer override the default CONFIG_SYS_TEXT_BASE setting. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add Avionic Design Plutux support.Thierry Reding2011-12-24-0/+162
| | | | | | | | | | | | | | | | | | | The Plutux is a set-top box device based on the Tamonten processor module. It can be connected to a display via an HDMI output. Changes in v3: * Remove unused implementation of gpio_config_uart(). * Implement MMC/SD card detection. * Drop board_mmc_getcd() which is now implemented by common Tegra2 code. * Add MAINTAINERS entry. Changes in v2: * No longer override the default CONFIG_SYS_TEXT_BASE setting. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add common Avionic Design Tamonten support.Thierry Reding2011-12-24-0/+192
| | | | | | | | | | | | | | Tamonten is an NVIDIA Tegra2-based SO-DIMM processor module that is derived from the Harmony reference design. Changes in v3: * Remove unused gpio_config_uart(). * Remove call to tegra2_start(). * Use new tegra2_mmc_init(). Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Move tegra2_mmc_init() prototype to public header.Thierry Reding2011-12-24-5/+29
| | | | | | | | | | | | | tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of the Tegra2-based boards will need to call it, this commit exports it in the new public asm/arch/mmc.h header file to prevent each board from providing its own prototype. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Change CONFIG_SYS_TEXT_BASE to 0x00108000.Thierry Reding2011-12-24-1/+1
| | | | | | | | | | | | NVIDIA's flashing tools assume that the bootloader is loaded at address 0x00108000. Instead of requiring non-standard builds of those tools which allow a load address of 0x00E08000, this commit just switches all Tegra2 boards to use the standard load address. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Always build with USE_PRIVATE_LIBGCC=yes.Thierry Reding2011-12-24-0/+2
| | | | | | | | | | The AVP on Tegra2 doesn't boot properly when U-Boot is linked against the GCC provided libgcc. To work around this, always build and link against a private libgcc for Tegra2-based boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Plumb in SPI/UART switch codeSimon Glass2011-12-24-0/+12
| | | | | | | | | | | | | | | On Seaboard the UART and SPI interfere with each other. This causes the UART to receive spurious zero bytes after SPI transactions and also means that SPI can corrupt a few output characters when it starts up if they are still in the UART buffer. This updates the board to use the SPI/UART switch to avoid the problem. For now this feature is turned off since it needs changes to the NS16550 UART to operate. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: spi: Support SPI / UART switchSimon Glass2011-12-24-0/+14
| | | | | | | | | | Add the SPI / UART switch logic into the Tegra2 SPI driver so that it can co-exist with the NS16550 UART. We need the ns16550.h header for NS16550_t for now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Implement SPI / UART GPIO switchSimon Glass2011-12-24-1/+231
| | | | | | | | | | | | | | | | The Tegra2 Seaboard has the unfortunate feature that SPI and the console UART are multiplexed on the same pins. We need to switch between one and the other during SPI and console activity. This new file implements a switch and keeps track of which peripheral owns the pins. It also flips over the controlling GPIO as needed Since we are adding a second file to board/nvidia/common, we create a proper Makefile there and remove the direct board.o include from board/nvidia/seaboard/Makefile Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Enable SPI environment on SeaboardSimon Glass2011-12-24-2/+13
| | | | | | | This uses the SPI flash on Seaboard to store an 8KB environment. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: config: Enable SPI flash on SeaboardSimon Glass2011-12-24-0/+11
| | | | | | | The Seaboard includes a Winbond 4MB flash part. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: spi: Add SPI driver for Tegra2 SOCTom Warren2011-12-24-0/+347
| | | | | | | This driver supports SPI on Tegra2, running at 48MHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* tegra2: Add UARTB supportSimon Glass2011-12-24-0/+10
| | | | | | | UARTB is used on some boards, so support it here. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Tidy UART selectionSimon Glass2011-12-24-23/+34
| | | | | | | | UART selection is done with a lot of #ifdefs. This cleans things up a little. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm, davinci: Fix build warnings for cam_enc_4xxChristian Riesch2011-12-24-2/+3
| | | | | | | | | | | | This patch fixes a build warning for the cam_enc_4xx board introduced by commit d6ec0c0dfc70447cf615ae80a952da81f73f16b4: spl.c:35:13: warning: 'gdata' defined but not used spl.c:36:13: warning: 'bdata' defined but not used Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de>
* Devkit8000: Switch over to enable_gpmc_cs_configThomas Weber2011-12-24-7/+12
| | | | | | | Use enable_gpmc_cs_config instead of local writing timing configuration for GPMC. Signed-off-by: Thomas Weber <weber@corscience.de>
* arm, davinci: Add support for generating AIS images to the MakefileChristian Riesch2011-12-24-0/+14
| | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org>
* mkimage: Fix variable length header supportChristian Riesch2011-12-24-48/+49
| | | | | | | | | | | | | | Support for variable length images like AIS image was introduced in commit f0662105b674a3874227316abf8536bebc9b5995. A parameter "-s" was also introduced to prohibit copying of the image file automatically in the main program. However, this parameter was implemented incorrectly and the image file was copied nevertheless. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* arm, da850evm: Add an SPL for SPI bootChristian Riesch2011-12-24-1/+172
| | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
* arm, davinci: Add SPL support for DA850 SoCsChristian Riesch2011-12-24-2/+35
| | | | | | | | | | This code adds an SPL for booting from SPI flash on DA850 SoCs. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
* sf: Add spi_boot() to allow booting from SPI flash in an SPLChristian Riesch2011-12-24-0/+66
| | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* spl: display_options.o is required for SPI flash support in SPLChristian Riesch2011-12-24-0/+2
| | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org>
* ARM: omap3: add support to Technexion twister boardStefano Babic2011-12-24-0/+621
| | | | | | | | | | | | | The twister board is a development board using the TAM3517 SOM. Support for NAND, 2 Ethernet (EMAC and SMC911), USB (EHCI_OMAP). Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: omap3: added common configuration for Technexion TAM3517Stefano Babic2011-12-24-0/+361
| | | | | | | | | | | The TAM3517 is a SOM module that can be used on custom boards. The patch add a common configuration file that is included by the boards using this module. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tapani Utrianen <tapani@technexion.com> CC: Tom Rini <tom.rini@gmail.com> CC: Sandeep Paulraj <s-paulraj@ti.com>
* vision2: Fix checkpatch warningFabio Estevam2011-12-24-2/+1
| | | | | | | | Fix the following checkpatch warning: WARNING: braces {} are not necessary for single statement blocks Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'next' of ../nextWolfgang Denk2011-12-23-42099/+85472
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of ../next: mkenvimage: Add version info switch (-V) mkenvimage: Fix getopt() error handling mkenvimage: Fix some typos phy: add Micrel KS8721BL phy definition net: introduce per device index mvgbe: remove setting of ethaddr within the driver x86: Add support for specifying an initrd with the zboot command x86: Refactor the zboot innards so they can be reused with a vboot image x86: Add infrastructure to extract an e820 table from the coreboot tables x86: Add support for booting Linux using the 32 bit boot protocol x86: Clean up the x86 zimage code in preparation to extend it x86: Import code from coreboot's libpayload to parse the coreboot table x86: Initial commit for running as a coreboot payload CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_1024_768_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/hh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/apc405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/voh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/voh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/hh405/fpgadata.c CHECKPATCH: ./board/esd/pci405/fpgadata.c CHECKPATCH: ./board/esd/tasreg/fpgadata.c CHECKPATCH: ./board/esd/apc405/fpgadata.c CHECKPATCH: ./board/esd/voh405/fpgadata.c CHECKPATCH: ./board/esd/ash405/fpgadata.c CHECKPATCH: ./board/esd/dasa_sim/fpgadata.c CHECKPATCH: ./board/esd/ar405/fpgadata_xl30.c CHECKPATCH: ./board/esd/ar405/fpgadata.c CHECKPATCH: ./board/esd/plu405/fpgadata.c CHECKPATCH: ./board/esd/wuh405/fpgadata.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405ab.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci4052.c CHECKPATCH: ./board/esd/canbt/fpgadata.c CHECKPATCH: ./board/esd/du405/fpgadata.c CHECKPATCH: ./board/esd/cpciiser4/fpgadata.c CHECKPATCH: ./board/dave/PPChameleonEVB/fpgadata.c avr32:mmu.c: fix printf() length modifier fat.c: fix printf() length modifier cmd_sf.c: fix printf() length modifier Make printf and vprintf safe from buffer overruns vsprintf: Move function documentation into header file Add safe vsnprintf and snprintf library functions Move vsprintf functions into their own header Conflicts: tools/mkenvimage.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * mkenvimage: Add version info switch (-V)Horst Kronstorfer2011-12-20-1/+6
| | | | | | | | Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>
| * mkenvimage: Fix getopt() error handlingHorst Kronstorfer2011-12-20-2/+10
| | | | | | | | | | | | | | | | | | Since the original implementation indicates explicit error handling we turn off getopt()'s internal error messaging to avoid duplicate error messages. Additionally we add ':' (missing option argument) error handling. Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>
| * mkenvimage: Fix some typosHorst Kronstorfer2011-12-20-4/+4
| | | | | | | | Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>
| * phy: add Micrel KS8721BL phy definitionVladimir Zapolskiy2011-12-20-0/+11
| | | | | | | | | | | | | | | | This adds support for the Micrel KS8721BL/SL PHY. The definition is taken from the correspondent datasheet. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| * net: introduce per device indexMichael Walle2011-12-20-29/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of counting the device index everytime a functions needs it, store it in the eth_device struct. eth_register() keeps track of the indices and updates the device's index number. This simplifies some functions in net/eth.c. Additionally, a network driver can now query its index, eg. to get the correct environment ethaddr name. Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Mike Frysinger <vapier@gentoo.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
| * mvgbe: remove setting of ethaddr within the driverMichael Walle2011-12-20-23/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A network driver should not touch the environment at all. This patch fixes this behaviour by removing the code for setting a default/randomized MAC address. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Eric Cooper <ecc@cmu.edu> Cc: Jason Cooper <u-boot@lakedaemon.net> Cc: Siddarth Gore <gores@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Simon Guinot <simon.guinot@sequanux.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
| * x86: Add support for specifying an initrd with the zboot commandGabe Black2011-12-19-4/+19
| | | | | | | | | | | | | | | | | | | | | | This change finishes plumbing the initrd support built into the zboot mechanism out to the command interface. It also fixes a bug in the command declaration where the kernel size could be passed as an optional second parameter but not enough arguments were allowed. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Refactor the zboot innards so they can be reused with a vboot imageGabe Black2011-12-19-90/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If vboot successfully verifies a kernel, it will leave it in place and basically ready to boot. The zeropage table which is part of the x86 boot protocol is at the end of the kernel, though, instead of the beginning, and because the image is already in place there's no need to copy it around. This change refactors the code which implements the zboot command so that the configuration of the zeropage table and loading the pieces of the kernel into memory are done separately. Also, because the command line goes before the zeropage table in vboot which is somewhat incompatible with the normal protocol, where to put the command line is a now a parameter instead of being hard coded. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Add infrastructure to extract an e820 table from the coreboot tablesGabe Black2011-12-19-1/+37
| | | | | | | | | | | | | | | | Also approximate the size of RAM using the largest RAM address available in the tables. There may be areas which are marked as reserved which are actually at the end of RAM. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Add support for booting Linux using the 32 bit boot protocolGabe Black2011-12-19-17/+62
| | | | | | | | | | | | | | | | | | This change conditionally modifies the zboot command so that it can use the 32 bit boot protocol. This is necessary because the 16 bit realmode entry point assumes that it can call BIOS services which neither coreboot nor u-boot provide. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Clean up the x86 zimage code in preparation to extend itGabe Black2011-12-19-58/+45
| | | | | | | | | | | | | | | | This change cleans up some formatting issues in the zimage handling code, and converts it from using offsets added to a base pointer to using the available structure definitions which were already being included. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Import code from coreboot's libpayload to parse the coreboot tableGabe Black2011-12-19-0/+630
| | | | | | | | | | | | | | | | | | | | | | | | | | This change also forces the lib_sysinfo structure to be in the .data section. Otherwise it ends up in the .bss section. U-boot assumes that it doesn't need to copy it over during relocation, and instead fills that whole section with zeroes. If we really were booting from ROM that would be appropriate, but we need some information from the coreboot tables (memory size) before then and have to fill that structure before relocation. We skirt u-boot's assumption by putting this in .data where it assumes there is still read only but non-zero data. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Initial commit for running as a coreboot payloadGabe Black2011-12-19-1/+610
| | | | | | | | | | | | | | | | Add a target for running u-boot as a coreboot payload in boards.cfg, a board, CPU and a config. This is a skeleton implementation which always reports the size of memory as 64 MB. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.cMarek Vasut2011-12-18-521/+1042
| | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Roese <sr@denx.de>
| * CHECKPATCH: ./board/esd/hh405/logo_1024_768_8bpp.cMarek Vasut2011-12-18-2544/+5087
| | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Roese <sr@denx.de>
| * CHECKPATCH: ./board/esd/hh405/logo_320_240_4bpp.cMarek Vasut2011-12-18-227/+454
| | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Roese <sr@denx.de>
| * CHECKPATCH: ./board/esd/hh405/logo_640_480_24bpp.cMarek Vasut2011-12-18-4209/+8417
| | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Roese <sr@denx.de>
| * CHECKPATCH: ./board/esd/apc405/logo_640_480_24bpp.cMarek Vasut2011-12-18-565/+1129
| | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Roese <sr@denx.de>
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