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* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-10-12-270/+579
|\ | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1021aqds.h include/configs/ls1021atwr.h
| * board: ls1012afrdm: overwrite CONFIG_EXTRA_ENV_SETTINGSPratiyush Srivastava2016-10-07-0/+11
| | | | | | | | | | | | | | | | | | | | LS1012AFRDM has 512MB of DDR. So update kernel load address to 0x96000000. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1012a: Updating CONFIG_EXTRA_ENV_SETTINGSPratiyush Srivastava2016-10-07-5/+0
| | | | | | | | | | | | | | | | Remove ramdisk_addr, ramdisk_size and update UART baud-rate. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080a: Add USB node in dts for ls2080aSriram Dash2016-10-07-0/+14
| | | | | | | | | | | | | | | | Add the USB node for LS2080a in dts. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> [York Sun: replace ls2080 with ls2080a in commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080: Enable CONFIG_DM_USB in defconfigsSriram Dash2016-10-07-0/+8
| | | | | | | | | | | | | | | | Enables driver model flag CONFIG_DM_USB for LS2080A platform defconfigs. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: LS2080A: Add device tree support for nand bootSriram Dash2016-10-07-0/+2
| | | | | | | | | | | | | | Add device tree support for LS2080ARDB nand boot. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * spi: fsl_qspi: Preserve endianness of QSPI MCRYork Sun2016-10-06-2/+8
| | | | | | | | | | | | | | | | | | | | | | The endianness can be changed by RCW + PBI sequence. It may have other than power on reset value. Signed-off-by: York Sun <york.sun@nxp.com> CC: Yuan Yao <yao.yuan@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Alison Wang <alison.wang@nxp.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * armv7: ls1021a: Move DDR config options to KconfigYork Sun2016-10-06-13/+57
| | | | | | | | | | | | | | | | Move DDR3, DDR4 and related config options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * armv8: fsl-layerscape: Move DDR config options to KconfigYork Sun2016-10-06-32/+73
| | | | | | | | | | | | | | | | Move DDR3, DDR4 and realted options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to KconfigYork Sun2016-10-06-26/+27
| | | | | | | | | | | | | | Move these options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: Move FSL_HAS_DP_DDR and NUM_DDR_CONTROLLERS to KconfigYork Sun2016-10-06-3/+8
| | | | | | | | | | | | | | | | Move this option to Kconfig and clean up existing uses. NUM_DDR_CONTROLLERS is also used by PowerPC SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: Move SYS_FSL_IFC_BANK_COUNT to KconfigYork Sun2016-10-06-3/+12
| | | | | | | | | | | | | | | | Move this option to Kconfig and clean up existing uses. This option is also used by PowerPC SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: Move MAX_CPUS to KconfigYork Sun2016-10-06-5/+24
| | | | | | | | | | | | | | | | Move MAX_CPUS option to Kconfig and clean up existing uses for ARM. This option is used by Freescale Layerscape SoCs. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: Move FSL_LSCH2 FSL_LSCH3 to KconfigYork Sun2016-10-06-6/+27
| | | | | | | | | | | | | | | | Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: Fix Kconfig for proper display menuYork Sun2016-10-06-6/+10
| | | | | | | | | | | | | | | | Some config options should not have prompt. They are selected by choosing target. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * armv8: fsl: Enable USB only when SYSCLK is 100 MHzSriram Dash2016-10-06-0/+20
| | | | | | | | | | | | | | | | SYSCLK is used as a reference clock for USB. When the USB controller is used, SYSCLK must meet the additional requirement of 100 MHz. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043: Add USB node in dts for ls1043Sriram Dash2016-10-06-0/+21
| | | | | | | | | | | | | | Add the USB node for LS1043 in dts. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043: Enable CONFIG_DM_USB in defconfigsSriram Dash2016-10-06-0/+11
| | | | | | | | | | | | | | | | Enables driver model flag CONFIG_DM_USB for LS1043A platform defconfigs. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/fsl-lsch2: Implement workaround for PIN MUX erratum A010539Hou Zhiqiang2016-10-06-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | Pin mux logic has 2 options in priority order, one is through RCW_SRC and then through RCW_Fields. In case of QSPI booting, RCW_SRC logic takes the priority for SPI pads and do not allow RCW_BASE and SPI_EXT to control the SPI muxing. But actually those are DSPI controller's pads instead of QSPI controller's, so this workaround allows RCW fields SPI_BASE and SPI_EXT to control relevant pads muxing. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * ARMv7: LS102xA: Move two macros from header files to KconfigHongbo Zhang2016-10-06-4/+4
| | | | | | | | | | | | | | | | | | | | Following commits 217f92b and 1544698, these two config CPU_V7_HAS_NONSEC and CPU_V7_HAS_VIRT are moved to Kconfig, for correctly select ARMV7_PSCI. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Fix "cpu status" commandYork Sun2016-10-06-4/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The core position is not continuous for some SoCs. For example, valid cores may present at position 0, 1, 4, 5, 8, 9, etc. Some registers (including boot release register) only count existing cores. Current implementation of cpu_mask() complies with the continuous numbering. However, command "cpu status" queries the spin table with actual core position. Add functions to calculate core position from core number, to correctly calculate offsets. Tested on LS2080ARDB and LS1043ARDB. Signed-off-by: York Sun <york.sun@nxp.com>
| * armv8/fsl-layerscape: print SoC revsion numberWenbin Song2016-10-06-0/+3
| | | | | | | | | | | | | | | | The exact SoC revsion number can be recognized from U-Boot log. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl_sfp : Modify macros as per changes in SFP v3.4Sumit Garg2016-10-06-2/+9
| | | | | | | | | | | | | | | | | | SFP v3.4 supports 8 keys in SRK table which leads to corresponding changes in OSPR key revocation field. So modify OSPR_KEY_REVOC_XXX macros accordingly. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv7: LS1021a: enable i-cache in start.SXiaoliang Yang2016-10-06-3/+17
| | | | | | | | | | | | | | | | | | | | Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl_sec_mon: Update driver for Security MonitorSumit Garg2016-10-06-153/+151
| | | | | | | | | | | | | | | | | | | | | | Update the API's for transition of Security Monitor states. Instead of providing both initial and final states for transition, just provide final state for transition as Security Monitor driver will take care of it internally. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> [York Sun: Reformatted commit message slightly] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-lsch2: enable snoopable sata read and writeTang Yuantian2016-10-06-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | By default the SATA IP on the ls1043a/ls1046a SoCs does not generating coherent/snoopable transactions. This patch enable it in the SCFG_SNPCNFGCR register along with sata axicc register. In addition, the dma-coherent property must be set on the SATA controller nodes. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> [York Sun: Reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-lsch2: adjust sata parameterTang Yuantian2016-10-06-4/+0
| | | | | | | | | | | | | | | | The default values for Port Phy2Cfg register and Port Phy3Cfg register are better, no need to overwrite them. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | common: Add DISPLAY_BOARDINFOLokesh Vutla2016-10-12-413/+307
| | | | | | | | | | | | | | | | Create a Kconfig entry for DISPLAY_BOARDINFO and make it be the default in certain architectures. Migrate all config files. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* | common/Kconfig: Add DISPLAY_CPUINFOLokesh Vutla2016-10-12-138/+103
| | | | | | | | | | | | | | | | Create a Kconfig entry for DISPLAY_CPUINFO and make it be the default in certain architectures. Migrate all config files. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-10-08-389/+7233
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| * | board: ge: bx50v3: Pass video bootargs for b850v3Ken Lin2016-10-07-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to clock source restrictions on i.MX6, certain pixel clock rates can not be supported. Hence default the resolution/frame rate during boot to a supported value by passing video bootargs 1024x768@60 for HDMI (Display Port1) and LVDS (Display Port2) on B850v3. Signed-off-by: Ken Lin <ken.lin@advantech.com.tw> Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
| * | ARM: vf610: use strcpy for soc environment variableStefan Agner2016-10-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To create the soc environment variable we concatenate two strings on the stack. So far, strcat has been used for the first string as well as for the second string. Since the variable on the stack is not initialized, the first strcat may not start using the first entry in the character array. This then could lead to an buffer overflow on the stack. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * | configs: enable device tree for Colibri iMX7Stefan Agner2016-10-07-1/+9
| | | | | | | | | | | | | | | | | | | | | Enable device tree configuration and specify default device tree for Toradex Colibri iMX7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | colibri_imx7: use Ricoh RN5T567 to reboot the boardStefan Agner2016-10-07-0/+42
| | | | | | | | | | | | | | | | | | Use the external PMIC Ricoh RN5T567 to reliably restart the system. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | arm: dts: imx7: add Ricoh RN5T567 PMIC nodeStefan Agner2016-10-07-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add device tree node for Ricoh RN5T567. Currently we do not need the individual DC/DC converters or LDO's (and they are also not yet supported by the driver). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | power: pmic: add Ricoh RN5T567 PMIC supportStefan Agner2016-10-07-0/+203
| | | | | | | | | | | | | | | | | | | | | | | | Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used on Colibri iMX7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | colibri_imx7: remove legancy UART platform dataStefan Agner2016-10-07-10/+0
| | | | | | | | | | | | | | | | | | | | | We now use device tree to provide SoC data to the UART driver, there is no need for the legancy UART platform data. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | colibri_imx7: remove legancy I2C supportStefan Agner2016-10-07-42/+0
| | | | | | | | | | | | | | | | | | | | | Remove legancy I2C config and code in favor of upcomming DM/DT enable I2C support. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | arm: dts: imx7: add basic i.MX 7/Colibri iMX7 device treeStefan Agner2016-10-07-0/+288
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add base device for NXP i.MX 7Solo/7Dual. The two SoC are very similar and hence can share the same device tree for boot loaders purpose. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | arm: dts: imx7: add pinctrl definesStefan Agner2016-10-07-0/+1151
| | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl defines for NXP i.MX 7Solo/7Dual SoC. The pinctrl format is compatible to the Linux kernel, hence this file is a simple copy from the Linux kernel (commit 97f5c1817b7e). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| * | pinctrl: imx: do not announce driver initializationStefan Agner2016-10-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | It is not usual that drivers announce when they have been initialized. use dev_dbg to announce device initialization. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | dm: imx: serial: support device treeStefan Agner2016-10-07-2/+38
| | | | | | | | | | | | | | | | | | | | | | | | Support instatiation through device tree. Also parse the fsl,dte-mode property to determine whether DTE mode shall be used. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | udoo: Add a README fileFabio Estevam2016-10-06-0/+21
| | | | | | | | | | | | | | | | | | | | | Add a README file to explain how to build and flash the SD card for Udoo boards. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | pcm052: add new BK4r1 target based on PCM052 SoMAlbert ARIBAUD \(3ADEV\)2016-10-06-60/+298
| | | | | | | | | | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | pcm052: allow specifying onboard DDR size in configsAlbert ARIBAUD \(3ADEV\)2016-10-06-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCM052 SoMs may be equipped with various sizes of DDR. Keep default of 256MB; new PCM052-based targets will specify their actual DDR size. Linux command line is auto-adjusted to DDR size. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | tools: mkimage: add support for Vybrid image formatAlbert ARIBAUD \(3ADEV\)2016-10-06-8/+187
| | | | | | | | | | | | | | | | | | | | | This format can be flashed directly at address 0 of the NAND FLASH, as it contains all necessary headers. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | pcm052: add 'm4go' commandAlbert ARIBAUD \(3ADEV\)2016-10-06-0/+38
| | | | | | | | | | | | | | | | | | | | | Add the 'm4go' command to pcm052-based targets. It loads scatter file images. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | pcm052: remove target-specific dtb name from envAlbert ARIBAUD \(3ADEV\)2016-10-06-1/+1
| | | | | | | | | | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | pcm052: fix MTD partitioningAlbert ARIBAUD \(3ADEV\)2016-10-06-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge 'spare' into 'bootloader' partition Use same partition for ramdisk and rootfs boot scenarios. Remove 'ramdisk' partition, use 'rootfs' for ramdisk (ramdisk and nand boot scenarios are mutually exclusive). Expand last partition to end of actual NAND size. Adjust UBIFS rootfs boot kernel arguments. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
| * | imx: imx6ul: disable POR_B internal pull upPeng Fan2016-10-04-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | >From TO1.1, SNVS adds internal pull up control for POR_B, the register filed is GPBIT[1:0], after system boot up, it can be set to 2b'01 to disable internal pull up. It can save about 30uA power in SNVS mode. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
generated by cgit v1.1 at 2024-12-28 19:05:18 +0000