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* board: gdsys: Configure bridge on DP501 to support DDC onlyDirk Eibach2014-07-07-3/+5
| | | | | | | The I2C bridge on DP501 supports EDID, MCCS and HDCP by default. Allow EDID only to avoid I2C address conflicts. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* board: gdsys: Increase iocon and dlv10g version stringDirk Eibach2014-07-07-2/+2
| | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* board: gdsys: Fix dlvision-10g I2C configurationDirk Eibach2014-07-07-2/+8
| | | | | | | PPC4xx config options were not complete. ICS8N3QV01 and SIL1178 needed some more configuration. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* i2c: IHS I2C master driverDirk Eibach2014-07-07-18/+261
| | | | | | | | IHS I2C master support was merely a hack in the osd driver. Now it is a proper u-boot I2C framework driver, supporting the v2.00 master features. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* board: iocon: Support DisplayPort hardwareDirk Eibach2014-07-07-85/+83
| | | | | | There is a new iocon hardware flavor, supporting DisplayPort finally. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* board: controlcenterd: Use new API for setting i2c busDirk Eibach2014-07-07-4/+9
| | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* board: gdsys: Adapt sdhc_boot.c to mmc_get_env_addr API changeDirk Eibach2014-07-07-1/+1
| | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* board: controlcenterd: Fix pci accessDirk Eibach2014-07-07-3/+3
| | | | | | | readl was called with values instead of pointers to these values. Why this ever did work is a mystery... Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* blackfin, powerpc: remove redundant definitions of ARRAY_SIZEMasahiro Yamada2014-07-07-5/+0
| | | | | | | | | Since ARRAY_SIZE macro is defined in include/common.h, re-defining it in arch-specific files is redundant. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Sonic Zhang <sonic.zhang@analog.com>
* blackfin: Add more dcache functionsVasili Galka2014-07-07-0/+10
| | | | | | | | | | | | Add invalidate_dcache_range() and flush_dcache_range() for the blackfin architecture. Such functions already exist on this arch with different names, so just forward the call. This fixes the build of bf609-ezkit board as it uses drivers/net/designware.c which requires the above functions. Cc: Sonic Zhang <sonic.adi@gmail.com>, Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
* blackfin: Fix warning about undefined functionVasili Galka2014-07-07-0/+1
| | | | | | | get_sclk() was not defined in bfin_wdt.c, include the corresponding header. Cc: Sonic Zhang <sonic.adi@gmail.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
* m68k: Fix incorrect memory access on M5235Vasili Galka2014-07-07-16/+23
| | | | | | | | | | | The csarX and cscrX registers in the fbcs_t struct are 16-bit for CONFIG_M5235 and 32-bit wide otherwise. The code in cpu_init.c accessed them always as 32-bit, effectively creating a wrong memory access on M5235. Fixed that by choosing out_be16/out_be32 depending on whether CONFIG_M5235 is defined or not. Cc: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
* m68k: Fix bug, "address of" operator was forgottenVasili Galka2014-07-07-1/+1
| | | | | | | | in_be16() shall be passed a pointer to register and not its value. This is clearly a typo resulting in a wrong memory access, so fix it. Cc: Alison Wang <b18965@freescale.com>, Jason Jin <Jason.jin@freescale.com> Signed-off-by: Vasili Galka <vvv444@gmail.com>
* mpc8xx: remove spc1920 board supportMasahiro Yamada2014-07-07-1367/+1
| | | | | | This board is old enough and has no maintainer. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove v37 board supportMasahiro Yamada2014-07-07-1241/+2
| | | | | | This board is old enough and has no maintainer. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove fads board supportMasahiro Yamada2014-07-07-2442/+6
| | | | | | These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove netta, netta2, netphone board supportMasahiro Yamada2014-07-07-10221/+3
| | | | | | These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove rbc823 board supportMasahiro Yamada2014-07-07-1552/+3
| | | | | | This board is old enough and has no maintainer. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove RPXlite_dw, quantum board supportMasahiro Yamada2014-07-07-2765/+3
| | | | | | These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* mpc8xx: remove qs850, qs860t board supportMasahiro Yamada2014-07-07-3876/+3
| | | | | | These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* tpm: don't use unneeded double bracketsJeroen Hofstee2014-07-07-1/+1
| | | | | | | | clang is tempted to inteprete such a condition as a assignment as well. Since it isn't don't use double brackets. cc: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* vcma9/lowlevel_init.S: trivial: terminate commentJeroen Hofstee2014-07-07-1/+1
| | | | Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* README: document CONFIG_ENV_IS_IN_SPI_FLASHWu, Josh2014-07-07-0/+37
| | | | | | | | | | | The option can be used to save the environment in spi flash. Implementation code is already exist in command/env_sf.c. But the documentation is missing. This patch add the details for this option to the README file. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* env_fat: use get_device_and_partition() during env save and loadWu, Josh2014-07-07-60/+34
| | | | | | | | | | | | | | | | | | | | | | Use get_device_and_partition() is better since: 1. It will call the device initialize function internally. So we can remove the mmc intialization code to save many lines. 2. It is used by fatls/fatload/fatwrite. So saveenv & load env should use it too. 3. It can parse the "D:P", "D", "D:", "D:auto" string to get correct device and partition information by run-time. Also we remove the FAT_ENV_DEVICE and FAT_ENV_PART. We use a string: FAT_ENV_DEVICE_AND_PART. For at91sam9m10g45ek, it is "0". That means use device 0 and if: a)device 0 has no partition table, use the whole device as a FAT file system. b)device 0 has partittion table, use the partition #1. Refer to the commit: 10a37fd7a4 for details of device & partition string. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* am43xx: Tune the system to avoid DSS underflowsCooper Jr., Franklin2014-07-07-10/+111
| | | | | * This is done by limiting the ARM's bandwidth and setting DSS priority in the EMIF controller to ensure underflows do not occur.
* am43xx: Update EMIF DDR3 Configuration for AM43x GPFranklin S. Cooper Jr2014-07-07-0/+114
| | | | | | | | | * Boot failures have been discovered due to a combination of routing issues and non optimal ddr3 timings in the EMIF * Since ddr3 timings are different after significant board layout changes different timings are required for alpha, beta and production boards. Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
* doc/README.falcon: Clarify steps slightly.Tom Rini2014-07-07-3/+4
| | | | | | | | Make it clear that we need to load a legacy-formatted (aka uImage) kernel into memory as well as the DT if used before using "spl export". Cc: Yebio Mesfin <ymesfin@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* board: ti: dra7xx: add mux data for UART3Felipe Balbi2014-07-07-0/+5
| | | | | | | | | | | | | J6 EVM can be built with UART3 as console, but currently there's nothing muxing UART3 correctly. Likely this only works because, based on commit log, author was only testing with UART3 boot and - I assume - ROM code leave UART3 correctly muxed in that case. If we want to boot from MMC and still use UART3 as console, then we need to mux those signals correctly. Signed-off-by: Felipe Balbi <balbi@ti.com>
* build: define CPU only when arch/${ARCH}/cpu/${CPU} existsMasahiro Yamada2014-07-07-60/+62
| | | | | | | | | | | | | | | | | | | The directory arch/${ARCH}/cpu/${CPU} does not exist in avr32, blackfin, microblaze, nios2, openrisc, sandbox, x86. These architectures have only one CPU type. Defining CPU should not be required for such architectures. This commit allows cpu field (= the 3rd field of boards.cfg) to be kept blank. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sonic Zhang <sonic.zhang@analog.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* README: document the CONFIG_ENV_IS_IN_FAT optionWu, Josh2014-07-07-0/+31
| | | | | | | | In README file, add document for the missing configuration option: CONFIG_ENV_IS_IN_FAT. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Makefile: drop arch/*/include/asm/proc from make mrproper patternMasahiro Yamada2014-07-07-1/+1
| | | | | | | | | | Commit 7d89982b stopped creating symbolic link arch/${arch}/include/asm/proc. We do not need to delete it by "make mrproper" any more. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Vasili Galka <vvv444@gmail.com>
* ARM: emif4: wait for CM_DLL_READYST to be setJeroen Hofstee2014-07-07-1/+1
| | | | | | | | | The code intends for the CM_DLL_READYST to be set, but actually polls till any bit is set since the logical AND is used instead of the bitwise one is used. Fix it. cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* Avoid using gawk-specific strtonum()Simon Glass2014-07-07-1/+2
| | | | | | | | We need to subtract two hex numbers. Avoid using strtonum() by doing the subtraction in bc with a suitable input base. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Vasili Galka <vvv444@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2014-07-07-17/+29
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| * i2c: tegra: dump alen in debug statementsStephen Warren2014-07-03-4/+4
| | | | | | | | | | | | | | | | | | Since tegra_i2c_{read,write}'s debug() call dumps the chip address, dump the address length (alen) too, so the address value can be correctly interpreted. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Yen Lin <yelin@nvidia.com>
| * i2c: tegra: write clean data to TX FIFOStephen Warren2014-07-03-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra I2C controller's TX FIFO contains 32-bit words. If the final FIFO entry of a transaction contains fewer than 4 bytes, the driver currently fills the unused FIFO bytes with uninitialized data. This can be confusing when reading back the FIFO content for debugging purposes. Solve this by explicitly initializing the variable containing FIFO data before filling it (partially) with data. With this change, send_recv_packets()'s loop's if (is_write) code mirrors the else (i.e. read) branch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Yen Lin <yelin@nvidia.com>
| * i2c: tegra: use repeated start for readsStephen Warren2014-07-03-8/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C read transactions are typically implemented as follows: START(write) address REPEATED_START(read) data... STOP However, Tegra's I2C driver currently implements reads as follows: START(write) address STOP START(read) data... STOP This sequence confuses at least the AS3722 PMIC on the Jetson TK1 board, leading to corrupted read data in some cases. Fix the driver to chain the transactions together using repeated starts to solve this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Yen Lin <yelin@nvidia.com>
* | socfpga: Relocate arch common functions away from boardChin Liang See2014-07-05-23/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | To move the arch common function away from board folder to arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication for other non Altera dev kit which is using socfpga device. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Detlev Zundel <dzu@denx.de>
* | integrator: switch to generic boardLinus Walleij2014-07-05-0/+1
| | | | | | | | | | | | | | | | | | Turn on generic board for the integrators, as per the request in the startup message. Everything just works, tested on the Integrator/AP and Integrator/CP. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: rpi_b: enable GENERIC_BOARDStephen Warren2014-07-05-0/+1
| | | | | | | | | | | | | | Serial port, SD card, and LCD all work. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Simon Glass <sjg@chromium.org>
* | arm, calimain: Add CONFIG_SYS_GENERIC_BOARDChristian Riesch2014-07-05-1/+2
| | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
* | arm: Fix armv8 compilation errorShaibal.Dutta2014-07-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | Fix following compilation error when CONFIG_ARM64 is defined Error: unknown or missing system register name at operand 2 -- `mrs x0,daifmsr daifset,#3' Signed-off-by: Shaibal.Dutta <shaibal.dutta@broadcom.com> Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Darwin Rambo <drambo@broadcom.com>
* | arm:board:h2200: Add CONFIG_SYS_GENERIC_BOARDŁukasz Dałek2014-07-05-0/+1
| | | | | | | | | | | | | | Enable 'generic board init' for H2200 palmtop. Signed-off-by: Lukasz Dalek <luk0104@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* | arm: spl: fix include guardJeroen Hofstee2014-07-05-2/+2
| | | | | | | | | | cc: Tom Rini <trini@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | Reformat boards.cfgAlbert ARIBAUD2014-07-05-10/+10
| | | | | | | | | | Run tools/reformat.py -i -d '-' -s 8 to reorder boards as header comments suggest
* | socfpga: Adding Scan Manager driverChin Liang See2014-07-05-1/+980
| | | | | | | | | | | | | | | | | | | | | | | | Scan Manager driver will be called to configure the IOCSR scan chain. This configuration will setup the IO buffer settings Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | socfpga: Adding DesignWare watchdog supportChin Liang See2014-07-05-0/+15
| | | | | | | | | | | | | | | | | | | | | | To enable the DesignWare watchdog support at SOCFPGA Cyclone V dev kit. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
* | watchdog/denali: Adding DesignWare watchdog driver supportChin Liang See2014-07-05-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | To add the DesignWare watchdog driver support. It required information such as register base address and clock info from configuration header file within include/configs folder. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
* | arm: ep9315: Return back Cirrus Logic EDB9315A board supportSergey Kostanbaev2014-07-04-27/+1636
| | | | | | | | | | | | | | This patch returns back support for old ep93xx processors family Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com> Cc: albert.u.boot@aribaud.net
* | gpio: spear_gpio: Fix gpio_set_value() implementationAxel Lin2014-07-04-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current gpio_set_value() implementation, it always sets the gpio control bit no matter the value argument is 0 or 1. Thus the GPIOs never set to low. This patch fixes this bug. The address bus is used as a mask on read/write operations, so that independent software drivers can set their GPIO bits without affecting any other pins in a single write operation. Thus we don't need a read-modify-write to update the register. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
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