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* arm: mx6: cm-fx6: modify device tree for old revisions of utiliteNikita Kiryanov2015-09-13-0/+20
| | | | | | | | | | | | | | Old revisions of Utilite (a miniature PC based on cm-fx6) do not have a card detect for mmc, and thus the kernel needs to be told that there's a persistent storage on usdhc3 to force it to probe the mmc card. Check the baseboard revision and modify the device tree accordingly if needed. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* compulab: eeprom: add support for obtaining product nameNikita Kiryanov2015-09-13-0/+36
| | | | | | | | | Introduce cl_eeprom_get_product_name() for obtaining product name from the eeprom. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* compulab: eeprom: propagate error value in read_mac_addr()Nikita Kiryanov2015-09-13-2/+4
| | | | | | | | | | | cl_eeprom_read_mac_addr() doesn't differentiate between success case and inability to access eeprom. Fix this by propagating the return value of cl_eeprom_setup(). Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* compulab: eeprom: select i2c bus when querying for board revNikita Kiryanov2015-09-13-6/+6
| | | | | | | | | | Add support for selecting which eeprom is queried for board revision by extending cl_eeprom_get_board_rev() to accept an i2c bus number. Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* imx: mx6ul: support mx6ul 9x9 evk boardPeng Fan2015-09-13-37/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to support mx6ul_9x9_evk board based on mx6ul_14x14_evk, the difference between mx6ul 9x9 evk and mx6ul 14x14 evk are: 1. mx6ul 9x9 evk use pfuze3000, while mx6ul 14x14 evk use DCDC. 2. mx6ul 9x9 evk supports 256MB LPDDR2, while mx6ul 14x14 evk supports 512MB DDR3 3. mx6ul_9x9_evk use 9x9 package, while mx6ul_14x14_evk use 14x14 package. This patch add the following: 1. Discard PHYS_SDRAM_SIZE from header file, use imx_ddr_size() 2. Introduce a macro is_mx6ul_9x9_evk using CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) to avoid "#ifdef xxx" in non-SPL part. To SPL part, CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) can not work, so still use "#ifdef CONFIG_TARGET_MX6UL_9X9_EVK" to differentiate with mx6ul_14x14_evk. And we have no way to dymaically checking this chip is 9x9 or 14x14. 3. mx6ul_9x9_evk use pfuze3000, so enabled POWER related configurations. POWER related configurations also effect for mx6ul_14x14_evk. But power_init_board implementation using 'if (is_mx6ul_9x9_evk())' to do initialization for mx6ul_9x9_evk, and do nothing for mx6ul_14x14_evk. 4. mx6ul_9x9_evk use lpddr2 with size 256MB, so add related SPL DRAM configurations. 5. Enable CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and setting dtb file according to board_rev and board_name. 6. Add TARGET_MX6UL_9X9_EVK Kconfig entry Boot Log: U-Boot SPL 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53) reading u-boot.img reading u-boot.img U-Boot 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53 +0800) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 41C Reset cause: POR Board: MX6UL 9x9 EVK I2C: ready DRAM: 256 MiB PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11 MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: FEC1 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: discard duplicated MXC_OCOTP and CMD_FUSEPeng Fan2015-09-13-5/+0
| | | | | | | | | | We have CONFIG_MXC_OCOTP and CONFIG_CMD_FUSE in mx6_common.h, discard duplicated macro definitions in board header files. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
* Revert "imx: mx6: ddr correct tRFC and tXS"Peng Fan2015-09-13-2/+2
| | | | | | | | | | | | This reverts commit 059323fb6a8f21637bb617919715c2427f24777c. This commit 059323fb6a8f21637bb617919715c2427f24777c use JESD79-3E which is not the newest spec. Should use JESD79-3F in which tRFC is 260ns for 4Gb chip. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
* mxs: mxsboot: fix endianess for sd boot imagesMichael Heimpold2015-09-13-9/+10
| | | | | | | | | | | | | | | | | | Running mxsboot on a big-endian system produces a sd image which cannot be started by the i.MX28 ROM. It complains on the debug uart as following: 0x8020a009 0x80502008 0x8020a009 0x80502008 ... Enforcing all fields within the BCB to little-endian make the image bootable again. Signed-off-by: Michael Heimpold <mhei@heimpold.de> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* imx: mx7dsabresd: Add support for MX7D SABRESD boardAdrian Alonso2015-09-13-0/+1014
| | | | | | | | | | | | * Add i.MX7D SABRESD target board support with enabled modules: UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX. Build target: mx7dsabresd_config Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: imx7d: add imx-common cpu support for imx7dAdrian Alonso2015-09-13-6/+39
| | | | | | | | | Add imx-common cpu support for imx7d SoC - Update reset_cause for imx7d - Enable watchdog driver built for imx7d Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* thermal: imx: add imx7d soc thermal supportAdrian Alonso2015-09-13-6/+84
| | | | | | Add imx7 SoC thermal driver support Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* arm: imx-common: init: rework wdog settings for imx6/imx7Adrian Alonso2015-09-13-14/+22
| | | | | | Rework imx_set_wdog_powerdown to be reused by imx6 and imx7 Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* arm: imx-common: init: extend init_aips to support imx7Adrian Alonso2015-09-13-24/+20
| | | | | | | Extend init_aips to support imx7 SoC, use is_soc_type and is_cpu_type to resolve at run time aips3 settings Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: imx7d: Add SoC system supportAdrian Alonso2015-09-13-0/+292
| | | | | | | | | Add imx7d basic SoC system support Misc arch dependent functions for system bring up Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* imx: imx7d: clock control module supportAdrian Alonso2015-09-13-0/+2348
| | | | | | | | | | | | | | | | | * Add Clock control module (CCM) support * iMX7D SoC introduces 3 main clock sysmtem abstraction for clock root frequency generation denominated clock slices. Core clock slice: hihg speed clock for ARM core Bus clock slice: for bus clocks IP clock slice: Peripheral clocks * At system boot ROM enables PLL_ARM, PLL_DDR, PLL_SYS, PLL_ENET In u-boot, we have to: - Configure PFD3- PFD7 for freq we needed in u-boot - Set clock root for peripherals (ip channel) Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* imx: imx7d: initial arch level supportAdrian Alonso2015-09-13-0/+4127
| | | | | | | | | | | * Add system arch level header files - imx-regs.h: iMX7D SoC system architecture registers - crm_regs.h: Clock control module registers - sys_proto.h: helper callback function for SoC setup Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* imx: system counter driver for imx7d and mx6ulAdrian Alonso2015-09-13-0/+155
| | | | | | | | | | Add system counter driver for imx7d and mx6ul imx7 and imx6ul supports system counter timer as well as GPT timer (arch/arm/imx-common/timer.c); The default for imx7 is systemcounter timer. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* arm: imx: imx-common: init: move arch init common setupAdrian Alonso2015-09-13-88/+108
| | | | | | | | Move common imx6 arch init setup, init.c can be extended and reused to support imx7 SoC keeping init arch common code. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* arm: imx: common rework cache settings for imx6Adrian Alonso2015-09-13-95/+104
| | | | | | | Rework cache settings for imx6, move cache configuration to imx-common/cache.c so it can be reused for newer SoC Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* thermal: imx_thermal: rework driver to be reusedAdrian Alonso2015-09-13-25/+27
| | | | | | | | Rework imx_thermal driver to be used across i.MX processor that support thermal sensor Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* imx: arch-mx6: add is_soc_type helper macroAdrian Alonso2015-09-13-0/+5
| | | | | | Add helper macro is_soc_type to identify iMX SoC family Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* Merge git://git.denx.de/u-boot-usbTom Rini2015-09-12-10/+34
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| * usb: ci_udc: fix emissions of ZLPsStephen Warren2015-09-12-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6a132416359e "ci_udc: Update the ci_udc driver to support bulk transfers" caused the value of "len" to change without updating subsquent users of that variable in ci_ep_submit_next_request(). This caused the code that detects when to emit ZLPs (Zero Length Packets) never to trigger, which in turn caused host timeouts when a ZLP was required, which in turn broke tests/dfu/, even despite the assertion in that commit's description that "These changes are tested for both the DFU and lthor." Fix this by modifying the added dtd iteration code not to modify "len", but rather to keep state in a separate variable. Rename the variables while we're at it so they describe their purpose better. Fixes: 6a132416359e ("ci_udc: Update the ci_udc driver to support bulk transfers") Cc: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * usb: gadget: ci_udc: implement usb_ep_ops dequeue callbackPeng Fan2015-09-12-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement endpoint dequeue callback function. Without this function, uboot will hang when executing fastboot comamnd. See following flow: "fastboot_tx_write_str->fastboot_tx_write->usb_ep_dequeue->ep->ops->dequeue" without implement ci_udc dequeue function, ep->ops->dequeue is NULL, then uboot will hang. Tested on mx6qsabresd board with fastboot enabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Cc: "Łukasz Majewski" <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | arm: socfpga: mcvevk: Update DRAM clock to 400MHzMarek Vasut2015-09-12-85/+85
|/ | | | | | | The MCV SoM has DDR3-1600 DRAMs on it, update the DRAM speed to 400MHz to make use of these DRAMs completely. Signed-off-by: Marek Vasut <marex@denx.de>
* gpio: lpc32xx: fix issues with port3 gpioSylvain Lemieux2015-09-11-8/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | The current simplify lpc32xx gpio driver implementation assume a maximum of 32 GPIO per port; there are a total of 22 GPI, 24 GPO and 6 GPIO to managed on port 3. Update the driver to fix the following: 1) When requesting GPI_xx and GPO_xx on port 3 (xx is the same number) the second call to "gpio_request" will return -EBUSY. 2) The status of GPO_xx pin report the status of the corresponding GPI_xx pin when using the "gpio status" command. 3) The gpio driver may setup the direction register for the wrong gpio when calling "gpio_direction_input" (GPI_xx) or "gpio_direction_output" (GPO_xx) on port 3; the call to the direction is require to use the "gpio status" command. The following change were done in the driver: 1) port3 GPI are cache in a separate 32 bits in the array. 2) port3 direction register written only for GPIO pins. 3) port3 GPO & GPIO (as output) are read using "p3_outp_state". 4) LPC32XX_GPI_P3_GRP updated to match the change. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
* omap3: cm-t3517: define CONFIG_MACH_TYPEDmitry Lifshitz2015-09-11-0/+2
| | | | | | | Define CONFIG_MACH_TYPE to allow non DT Linux boot. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* omap3: cm-t3517: change environment sizeDmitry Lifshitz2015-09-11-1/+1
| | | | | | | | | | Mainline CM-T3517 U-Boot environment size differs from that one shipped with CM-T3517 boards. Update environment size, to avoid backward compatibility issues. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* omap3: cm-t3517: fix MMC1 pinmuxDmitry Lifshitz2015-09-11-6/+6
| | | | | | | Fix MMC1 pinmux setup, thus enable SD/MMC card support with CM-T3517. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* omap3: cm-t3517: enable 'netretry' and setup timeoutDmitry Lifshitz2015-09-11-0/+3
| | | | | | | | | | | | SBC-T3517 evaluation board has two Eth interfaces. Enable network retry of another interface if the default if failed or disconnected. Add 'netretry=yes' in the default env. Setup relevant timeout values in the board config file. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* bitops: introduce BIT() definitionHeiko Schocher2015-09-11-27/+2
| | | | | | | | | | | introduce BIT() definition, used in at91_udc gadget driver. Signed-off-by: Heiko Schocher <hs@denx.de> [remove all other occurrences of BIT(x) definition] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
* fs: ext4: fix symlink read functionGary Bisson2015-09-11-1/+1
| | | | | | | Since last API changes for files >2GB, the read of symlink is broken as ext4fs_read_file now returns 0 instead of the length of the actual read. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
* igep00x0: Switch to use the generic distro configuration and environment.Enric Balletbò i Serra2015-09-11-69/+30
| | | | | | | | | | This patch changes a little bit the environment, current environment was broken for a long time, and board don't as expected sometimes, on production systems this is fixed adding boot script. I think it's time to change this to make a system conformant environment and use generic distro configurations and environment instead. We can use a boot script for the old way boot mode. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
* igep00xx: MAINTAINERS: update eballetbo's email address.Enric Balletbò i Serra2015-09-11-2/+2
| | | | Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
* board: Add Toby-Churchill SL50 board support.Enric Balletbò i Serra2015-09-11-0/+768
| | | | | | | | | Add support for Lightwriter SL50 series board, a small, robust and portable Voice Output Communication Aids (VOCA) designed to meet the particular and changing needs of people with speech loss resulting from a wide range of acquired, progressive and congenital conditions. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
* ARM: tegra: enable DFU for RAMStephen Warren2015-09-11-0/+1
| | | | | | | | | This allows transferring data directly to/from RAM. For example, one could create a boot script that starts DFU on a RAM region, then once DFU exits (which is under the control of the attached USB host, via a USB bus reset), uses the code/data that was received over DFU. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: enable filesystem writingStephen Warren2015-09-11-0/+2
| | | | | | | | Writing to files is a useful feature in general, so enable it everywhere. The primary purpose is to make DFU useful on filesystems in addition to raw devices. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: tweak DFU buffer sizesStephen Warren2015-09-11-3/+5
| | | | | | | | | | | | | | | | | CONFIG_SYS_DFU_DATA_BUF_SIZE defines the size of chunks transferred across USB. This doesn't need to be particularly large, since it doesn't limit the overall transfer size. CONFIG_SYS_DFU_MAX_FILE_SIZE is used to buffer an entire file before writing it to a filesystem. This define limits the maximum file size that may be transferred. Bump this up to 32MiB in order to support large uncompressed kernel images. Both of these buffers are dynamically allocated, and so the size of both needs to be taken into account when calculating the required malloc region size. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: fix malloc region sizingStephen Warren2015-09-11-14/+14
| | | | | | | | | | | | | | | | Commit 52a7c98a1772 "tegra-common: increase malloc pool len by dfu mmc file buffer size" updated the definition of CONFIG_SYS_MALLOC_LEN for Tegra to take account of the DFU buffer size. However, this change had no effect, since typical Tegra board config headers don't set the DFU- related defines until after tegra-common.h is included. Fix this by moving the affected conditional code to tegra-common-post.h, which is included last. Also move the definition of SYS_NONCACHED_MEMORY since it's a related and adjacent definition. Fix the condition to test for the DFU feature, rather than specifically MMC DFU support, so it applies in all cases. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* dfu: mmc: buffer file reads tooStephen Warren2015-09-11-12/+26
| | | | | | | | | | | | | | | | | | | | When writing to files in a filesystem on MMC, dfu_mmc.c buffers up the entire file content until the end of the transaction, at which point the file is written in one go. This allows writing files larger than the USB transfer size (CONFIG_SYS_DFU_DATA_BUF_SIZE); the maximum written file size is CONFIG_SYS_DFU_MAX_FILE_SIZE (the size of the temporary buffer). The current file reading code does not do any buffering, and so limits the maximum read file size to the USB transfer size. Enhance the code to do the same kind of buffering as the write path, so the same file size limits apply. Remove the size checking code from dfu_read() since all read paths now support larger files than the USB transfer buffer. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* dfu: don't keep freeing/reallocatingStephen Warren2015-09-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DFU currently allocates buffer memory at the start of each data transfer operation and frees it at the end. Especially since memalign() is used to allocate the buffer, and various other allocations happen during the transfer, this can expose the code to heap fragmentation, which prevents the allocation from succeeding on subsequent transfers. Fix the code to allocate the buffer once when DFU mode is initialized, and free the buffer once when DFU mode is exited, to reduce the exposure to heap fragmentation. The failure mode is: // Internally to memalign(), this allocates a lot more than s to guarantee // that alignment can occur, then returns chunks of memory at the start/ // end of the allocated buffer to the heap. p = memalign(a, s); // Various other malloc()s occur here, some of which allocate the RAM // immediately before/after "p". // // DFU transfer is complete, so buffer is released. free(p); // By chance, no other malloc()/free() here, in DFU at least. // // A new DFU transfer starts, so the buffer is allocated again. // In theory this should succeed since we just free()d a buffer of the // same size. However, this fails because memalign() internally attempts // to allocate much more than "s", yet free(p) above only free()d a // little more than "s". p = memalign(a, s); Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* ext4: fix leak in check_filename()Stephen Warren2015-09-11-2/+3
| | | | | | | | | root_first_block_buffer should be free()d in all cases, not just when an error occurs. Fix the success exit path of the function to do this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* ext4: free allocations by parse_path()Stephen Warren2015-09-11-2/+6
| | | | | | | | | | | | | | parse_path() malloc()s the entries in the array it's passed. Those allocations must be free()d by the caller, ext4fs_get_parent_inode_num(). Add code to do this. For this to work, all the array entries must be dynamically allocated, rather than a mix of dynamic and static allocations. Fix parse_path() not to over-write arr[0] with a pointer to statically allocated data. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* ext4: avoid calling ext4fs_mount() twice, which leaksStephen Warren2015-09-11-9/+0
| | | | | | | | | | | | | ext4_write_file() is only called from the "fs" layer, which calls both ext4fs_mount() and ext4fs_close() before/after calling ext4_write_file(). Fix ext4_write_file() not to call ext4fs_mount() again, since the mount operation malloc()s some RAM which is leaked when a second mount call over-writes the pointer to that data, if no intervening close call is made. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: gadget: don't leak configs when unbindingStephen Warren2015-09-11-2/+1
| | | | | | | | | | | | | | | | By the time g_dnl_unbind() is run, cdev->config has been set to NULL, so the free() there does nothing, and the config struct is leaked. Equally, struct usb_gadget contains a linked list of config structs, so the code should iterate over them all and free each one, rather than freeing one particular config struct. composite_unbind() already iterates over the list of config structs, and unlinks each from the linked list. Fix this loop to free() each struct as it's unlinked and otherwise forgotten. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* FIX: fat: Provide correct return code from disk_{read|write} to upper layersŁukasz Majewski2015-09-11-4/+18
| | | | | | | | | | | | | | | | | | | | | | It is very common that FAT code is using following pattern: if (disk_{read|write}() < 0) return -1; Up till now the above code was dead, since disk_{read|write) could only return value >= 0. As a result some errors from medium layer (i.e. eMMC/SD) were not caught. The above behavior was caused by block_{read|write|erase} declared at struct block_dev_desc (@part.h). It returns unsigned long, where 0 indicates error and > 0 indicates that medium operation was correct. This patch as error regards 0 returned from block_{read|write|erase} when nr_blocks is grater than zero. Read/Write operation with nr_blocks=0 should return 0 and hence is not considered as an error. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Test HW: Odroid XU3 - Exynos 5433
* include: configs: Enable DWC3 and DFU in OMAP5 uEVMKishon Vijay Abraham I2015-09-11-0/+62
| | | | | | | | Enable dwc3, dwc3-omap and PHY to get DWC3 functional in OMAP5 uEVM. Also enable support for DFU. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Move ALLOC_CACHE_ALIGN_BUFFER() to the new memalign.h headerSimon Glass2015-09-11-88/+130
| | | | | | | Now that we have a new header file for cache-aligned allocation, we should move the stack-based allocation macro there also. Signed-off-by: Simon Glass <sjg@chromium.org>
* Move malloc_cache_aligned() to its own headerSimon Glass2015-09-11-11/+36
| | | | | | | | | | | | | | | | | | | At present malloc.h is included everywhere since it recently was added to common.h in this commit: 4519668 mtd/nand/ubi: assortment of alignment fixes This seems wasteful and unnecessary. We have been trying to trim down common.h and put separate functions into separate header files and that change goes in the opposite direction. Move malloc_cache_aligned() to a new header so that this can be avoided. The header would perhaps be better named as alignmem.h but it needs to be included after common.h and people might be confused by this. With the name memalign.h it fits nicely after malloc() in most cases. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* arm: spear: Enable THUMB mode on x600 boardStefan Roese2015-09-11-0/+1
| | | | | | | | | To reduce the size of the U-Boot image on the x600 board, lets enable the THUMB mode. This reduces the overall size to less than 0x6000 bytes. Fitting it again in the onboard NOR flash. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Viresh Kumar <viresh.kumar@linaro.org>
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