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* x86: qemu: re-structure qemu_fwcfg_list_firmware()Miao Yan2016-01-28-17/+55
| | | | | | | | | Re-write the logic in qemu_fwcfg_list_firmware(), add a function qemu_fwcfg_read_firmware_list() to handle reading firmware list. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: baytrail: Add option to disable the internal UART to setup_early_uart()Stefan Roese2016-01-28-6/+10
| | | | | | | | | | | This patch adds a parameter to the function setup_early_uart() to either enable or disable the internal BayTrail legacy UART. Since the name setup_early_uart() does not match its functionality any more, lets rename it to setup_internal_uart() as well in this patch. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* misc: Add simple driver to enable the legacy UART on Winbond Super IO chipsStefan Roese2016-01-28-0/+85
| | | | | | | | | | | On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) are provided by a superio chip connected to the LPC bus. We must program the superio chip so that serial ports are available for us. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: x86-common.h: Add generic FS commandsStefan Roese2016-01-28-0/+1
| | | | | | | | | | This patch adds the generic FS commands (ls, load) to all x86 boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Miao Yan <yanmiaobest@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* x86: baytrail: Add documentation for FSP memory-down valuesStefan Roese2016-01-28-1/+30
| | | | | | | | | | | | | | | | | This patch adds the documentation for the memory-down parameters of the Intel FSP. To configure a board without SPD DDR DIMM but with onboard DDR chips. The values are taken from the coreboot header: src/soc/intel/fsp_baytrail/chip.h (git ID da1a70ea from 2016-01-16 as reference). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Andrew Bradford <andrew.bradford@kodakalaris.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* arm: mvebu: Add support for the Armada XP theadorable boardStefan Roese2016-01-27-1/+572
| | | | | | | | | | | | | | | | | | | This patch adds support for the Armada XP (MV78260) based theadorable board. Its equipped with onboard DDR3, UART, ethernet, I2C, SPI NOR, LCD and SATA (SSD) interfaces / devices. Two defconfigs are added: theadorable_defconfig: The production U-Boot version with a stripped down drivers and feature list. This removes networking, USB and PCI support. theadorable_debug_defconfig: The debugging / testing U-Boot version with full support for all drivers. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-01-26-122/+395
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| * mvtwsi: Fix breakage introduced by "Fix mvtwsi not working on sun6i and ↵Hans de Goede2016-01-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | newer sunxi SoCs" "Fix mvtwsi not working on sun6i and newer sunxi SoCs" includes the following: @@ -189,7 +200,8 @@ static int twsi_start(struct i2c_adapter *adap, int expected_status) /* globally set TWSIEN in case it was not */ twsi_control_flags |= MVTWSI_CONTROL_TWSIEN; /* assert START */ - writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control); + twsi_control_flags |= MVTWSI_CONTROL_START | MVTWSI_CONTROL_CLEAR_IFLG; + writel(twsi_control_flags, &twsi->control); /* wait for controller to process START */ return twsi_wait(adap, expected_status); } The modification of twsi_control_flags done here was introduced while merging to fix a line > 80 chars, but twsi_control_flags is a global variable and should not be modified like this here, this commit fixes this, restoring mvtwsi functionality. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Bananapro: Set LDO4 to 2.5VHans de Goede2016-01-26-0/+1
| | | | | | | | | | | | | | | | | | | | According to the Bananapro schematic VDD25-SATA either comes from a dedicated WL2003E25-5 LTO, or it is connected to LDO4 via a 0 Ohm resistor. In practice it seems that LDO4 is used, so enable it and set it to 2.5V. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: power: axp818: Enable support for ALDOsChen-Yu Tsai2016-01-26-8/+50
| | | | | | | | | | | | | | | | | | | | | | | | Previously, AXP818 ALDO support was partially added to Kconfig, but never enabled in the board file, nor properly set or configured in Kconfig. The boards continue to work because the AXP818 is designed to pair with the A83T/H8, and the default voltages match the reference design's requirements. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: h8_homlet_v2: Drop LDO settings from defconfigChen-Yu Tsai2016-01-26-3/+0
| | | | | | | | | | | | | | | | | | The LDO settings in this defconfig are either wrong (ALDOs must not be 0) or the same as Kconfig defaults. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp818: Add support for DLDO and ELDO regulatorsChen-Yu Tsai2016-01-26-6/+50
| | | | | | | | | | | | | | | | | | AXP818 provides an array of LDOs to provide power to various peripherals. None of these regulators are critical. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp: merge separate DLDO functions into 1Chen-Yu Tsai2016-01-26-76/+25
| | | | | | | | | | | | | | | | | | | | | | Instead of one function for each DLDO regulator, make 1 function that takes an extra "index". Since the control bits for the DLDO regulators are contiguous, this makes the function very simple. This removes a lot of duplicate code. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp818: Remove duplicate register definition macrosChen-Yu Tsai2016-01-26-8/+0
| | | | | | | | | | | | | | | | Some of the register definitions are duplicated. Drop them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Add suport for A83T based Banana-pi M3 BoardVishnu Patekar2016-01-26-1/+97
| | | | | | | | | | | | | | | | | | | | | | | | Add dts and defconfig for Banana-pi M3 board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> [hdegoede@redhat.com: rename to Sinovoip_BPI_M3_defconfig/sun8i-a83t-sinovoip-bpi-m3.dts] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Add support for LPDDR3 for A83TVishnu Patekar2016-01-26-5/+54
| | | | | | | | | | | | | | | | | | Banana-pi M3 has LPDDR3 DRAM. this adds support for LPDDR3 for A83T. Mostly the timing parameters are different from DDR3. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Groundwork to support new dram type for A83TVishnu Patekar2016-01-26-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Different A83T boards have different DRAM types. Banapi M3 has LPDDR3, Allwinner Homlet v1.2 has DDR3. This adds groundwork to support for new DRAM type for A83T. Introduce CONFIG_DRAM_TYPE, It'll be 3 for DDR3 and 7 for LPDDR3, must be set in respective board defconfig. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Redundant code cleanup from a83t dram initVishnu Patekar2016-01-26-5/+0
| | | | | | | | | | | | | | | | This removes the redundant lines of code from mctl_sys_init. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Enable booting non-secure and virtualization for H3Chen-Yu Tsai2016-01-26-0/+3
| | | | | | | | | | | | | | | | | | Now that we support PSCI and various security switches, we can let U-boot boot Linux into non-secure and HYP mode. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Support PSCI ops on Allwinner H3Chen-Yu Tsai2016-01-26-2/+2
| | | | | | | | | | | | | | | | | | H3 has the same power sequencing procedure as the A31/A31s, which includes the power clamps. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Support H3 CCU security switchesChen-Yu Tsai2016-01-26-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | H3's CCU includes some switches which disable non-secure access to some of the more critical clock controls, such as MBUS, PLLs, and main platform busses. Configure them to enable non-secure access. For now the only SoC that has this feature is the H3. For other platforms just use a default (weak) empty function so things do not break. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Support Secure Memory Touch Arbiter (SMTA) in sun8i H3Chen-Yu Tsai2016-01-26-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secure Memory Touch Arbiter is the same thing as the TrustZone Protection Controller found on A31/A31s. Access to many peripherals on the H3 can be controlled by the SMTA, and the settings default to secure access only. This patch supports the new settings, and sets them to allow non-secure access. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Implement poweroff support for axp221 pmicHans de Goede2016-01-26-0/+15
| | | | | | | | | | | | | | Adds poweroff support for axp221 pmic. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Implement poweroff support for axp209 pmicMichael van Slingerland2016-01-26-0/+13
| | | | | | | | | | | | | | | | Adds poweroff support for axp209 pmic. Signed-off-by: Michael van Slingerland <michael@deviousops.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Implement poweroff support for axp152 pmicHans de Goede2016-01-26-0/+13
| | | | | | | | | | | | | | Adds poweroff support for axp152 pmic. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2016-01-26-9/+594
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| * | video: add CONFIG_I2C_EDID and disable CONFIG_DISPLAY by defaultAnatolij Gustschin2016-01-26-6/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling CONFIG_DISPLAY breaks building for some architectures (microblaze-generic), so we disable CONFIG_DISPLAY in Kconfig by default and enable this option in defconfigs. CONFIG_DISPLAY depends on CONFIG_I2C_EDID, so add and enable it in defconfigs, too. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reported-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | lcd: fix the color testpattern in 16bit modeAndreas Neubacher2016-01-24-3/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The testpattern of the lcd was only working in 8bit mode(2x3 tiles in different colors). With this patch now 8bit and 16bit is supported. In 16bit mode there are 2x4 tiles in different colors. The number of LCD-colors is defined in the include/configs/<boardfile>.h Signed-off-by: Andreas Neubacher <neubacher.andreas@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | video: Add support for Armada XP LCD controllerStefan Roese2016-01-23-0/+554
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the LCD controller of the Marvell Armada XP SoC. An AXP based custom board port will be added later, to use this driver to display a splash screen via the bmp command later. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> [agust: rebased] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | mips: asm/io.h: Add in <linux/bug.h>Tom Rini2016-01-25-0/+1
| | | | | | | | | | | | | | | | | | As part of the bug.h / BUILD_BUG_* clean up, this file was missed. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-01-25-102/+3303
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| * | | usb: kbd: Prevent out of bound accessMarek Vasut2016-01-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Scan code 0x39 is CapsLock, which is not a printable character and thus is not covered by either usb_kbd_numkey_shifted[] or usb_kbd_numkey[]. Fix the scan code check to avoid looking it up in either of the arrays. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | usb: add clock support for generic EHCIMasahiro Yamada2016-01-25-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is designed in a generic manner, so clocks should be handled genericly as well. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | usb: eth: add Realtek RTL8152B/RTL8153 DRIVERTed Chen2016-01-23-0/+3081
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds driver support for the Realtek RTL8152B/RTL8153 USB network adapters. Signed-off-by: Ted Chen <tedchen at realtek.com> [swarren, fixed a few compiler warnings] [swarren, with permission, converted license header to SPDX] [swarren, removed printf() spew during probe()] Signed-off-by: Stephen Warren <swarren at nvidia.com>
| * | | ARM: rpi: enable USB keyboardStephen Warren2016-01-23-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the DWC2 driver supports split transactions, we can reasonably enable support for USB keyboards. This wasn't terribly useful before since keyboards are usually LS/FS devices, and thus require split transaction support when attached to a USB hub such as the hub built into the RPi model Bs. Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
| * | | usb: dwc2: Do not mix data toggle for IN and OUT endpoints, check boundsStefan Brüns2016-01-23-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB protocol allows for 16 IN and 16 OUT endpoints (USB 2.0 Spec, 8.3.2.2 Endpoint Field). A function may have an EP 1 for both IN and OUT, so these two should be kept separate. As EPs are either BULK or INTERRUPT (or ISO), it is fine to have one array per direction for all transfer types (also see e236519b7365ef75c5da6a5623f0b03d9c00cfae). USB device address is 7 bits, so a bus may have more than 16 devices. Check the device number, as the DWC2 driver only supports BULK/ISO for the first 16 devices. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
| * | | usb: dwc2: Add SPLIT INTERRUPT transaction supportStefan Brüns2016-01-23-5/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CSPLITs for INTERRUPT transactions have to be scheduled in each microframe following the SSPLIT. INTERRUPT transfers are executed in the next even/ odd microframe depending on the HCCHAR_ODDFRM flag. As there are no handshakes for INTERRUPT SSPLITs the SSPLIT may have failed (transport error) without the error being detected by the host driver. If the last CSPLIT is not received within 4 microframes after the SSPLIT there was a transaction error and the complete transaction has to be restarted. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
| * | | usb: dwc2: Implement SPLIT transaction supportStefan Brüns2016-01-23-15/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In contrast to non-SPLIT transfers each transaction has to be submitted as an individual chunk. The transaction state machine proceeds from SSPLIT to CSPLIT if the ACK flag is set. CSPLIT has to be repeated while NYET is set. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
| * | | usb: dwc2: add helper function for setting SPLIT HC registersStefan Brüns2016-01-23-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The split register setting is used for both SSPLIT and CSPLIT transactions, the bit for CSPLIT has to be set seperately. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
| * | | usb: dwc2: split transfer core from outer loopStefan Brüns2016-01-23-48/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the movement of data between CPU and Host Controller from the status handling and tracking of transfer progress. This will also simplify adding of SPLIT transaction support. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
| * | | usb: dwc2: Simplify wait_for_chhltd(), remove ignore_ackStefan Brüns2016-01-23-23/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A transfer is completed if the XFERCOMP flag is set, irrespective of the ACK flag. BULK OUT transfers to some HS devices complete without having the ACK flag set, which signal the devices has responded with an NYET to the transfer (PING protocol). The new behaviour matches the Linux kernel minus any PING protocol. Also see 5966defabdcc (usb: dwc2: fix bulk transfers) Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
| * | | usb: dwc2: Fix out-of-bounds access, fix chunk sizeStefan Brüns2016-01-23-15/+15
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix two errors in transfer len calculation, move loop invariant code out of loop. If xfer_len is equal to CONFIG_DWC2_MAX_TRANSFER_SIZE (or slightly smaller), the xfer_len will be to large, e.g.: xfer_len = MAX_TRANSFER_SIZE = 65535 max packet size = 512 => num_packets = 128 => IN xfer_len = 65536 For OUT transactions larger than (65536 - mps) bytes, the xfer_len determination is quite awkward, it is only correct due to: - max_packet_size for control/bulk/interrupt is required to be power-of-two. - (CONFIG_DWC2_MAX_TRANSFER_SIZE + 1) % max-packet-size is zero for all allowed (2^3 ... 2^9) packet sizes As the max xfer len is loop invariant, it can be moved out of the loop. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-01-25-70/+53
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| * | powerpc/board/t4240rdb: Enable VID supportYing Zhang2016-01-25-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | board/freescale/common: Check IR chip mode for VID supportYing Zhang2016-01-25-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | IR chip on all the boards are required to be used in Intel mode to support VID. VDD will not be adjusted if IR chip is used in other modes. Signed-off-by: Ying Zhang <b40530@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | arch/powperpc: Fix start_align due to use of __ffs64() instead ffs64()Ashish kumar2016-01-25-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Incorrect DDR law was created in case of B4860qds after commit 2d2f490d. Return value of ffs64() differs from __ffs64(), eg. ffs64(0x80000000) = 0x20 __ffs64(0x80000000) = 0x1f As a result of this change, callers need to adjust the expected return value by removing -1. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc: mpc85xx: Move set_liodns, setup_portals to common boot seqPrabhakar Kushwaha2016-01-25-65/+11
| |/ | | | | | | | | | | | | | | | | | | | | | | Users migrating Freescale's PowerPC SoC U-Boot code to their custom board, often overlook the need to execute set_liodns() and setup_portals() being called by platform files. So Move set_liodns() and setup_portals() to common u-boot boot sequence Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | checkpatch: ignore request to use ether_addr_copy()Stephen Warren2016-01-25-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux kernel, from which checkpatch originates, contains function ether_addr_copy() to copy Ethernet MAC addresses, and checkpatch warns that it should be used in preference to memcpy() where appropriate. U-Boot doesn't contain ether_addr_copy(), so tell checkpatch not to issue this warning. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Anand Moon <linux.amoon@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini2016-01-25-25/+265
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| * | imx: spl: enable CONFIG_SPL_WATCHDOG_SUPPORTPeng Fan2016-01-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit 4bdcbe60a142b08eefccb0e326a37ba81d3389e8 removes reset_cpu which breaks SPL build when DEBUG macro defined. " arch/arm/lib/built-in.o: In function `do_reset': ~/uboot/arch/arm/lib/reset.c:45: undefined reference to `reset_cpu' scripts/Makefile.spl:244: recipe for target 'spl/u-boot-spl' failed " Enable CONFIG_SPL_WATCHDOG_SUPPORT to fix this issue. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: Eric Nelson <eric@nelint.com>
generated by cgit v1.1 at 2024-12-26 09:35:46 +0000