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* env: throw an error when an empty key is usedLucian Cojocar2013-05-09-0/+6
| | | | | | | | If the environment contains an entry like "=value" "\0" we should throw an error when parsing the environment. Otherwise, U-Boot will enter in an infinite loop. Signed-off-by: Lucian Cojocar <cojocar@gmail.com>
* build: Pull -DBUILD_TAG into separate ifdefMarek Vasut2013-05-09-4/+3
| | | | | | | | | | | | Currently the base setting for CFLAGS is split in two possibilities, one with -DBUILD_TAG appended at the end and one without, the rest of CFLAGS is the same in both cases. Change this so CFLAGS are always set and the -DBUILD_TAG is appended in separate ifdef. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Tom Rini <trini@ti.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
* gpio: Add support for microblaze xilinx GPIOMichal Simek2013-05-09-39/+386
| | | | | | | | | | | | | | | | | | | | | | | | Microblaze uses gpio which is connected to the system reset. Currently gpio subsystem wasn't used for it. Add gpio driver and change Microblaze reset logic to be done via gpio subsystem. There are various configurations which Microblaze can have that's why gpio_alloc/gpio_alloc_dual(for dual channel) function has been introduced and gpio can be allocated dynamically. Adding several gpios IP is also possible and supported. For listing gpio configuration please use "gpio status" command This patch also remove one compilation warning: microblaze-generic.c: In function 'do_reset': microblaze-generic.c:38:47: warning: operation on '*1073741824u' may be undefined [-Wsequence-point] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: bootm: Add support for loading initrdMichal Simek2013-05-09-0/+8
| | | | | | | fdt_initrd add additional information to DTB about initrd addresses which are later used by kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: bootm: Fix coding style issuesMichal Simek2013-05-09-9/+11
| | | | | | Prepare place for new patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nds32: Use sections header to obtain link symbolsKuan-Yu Kuo2013-05-08-6/+2
| | | | | | | | Include this header to get access to link symbols, which are otherwise removed. Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini2013-05-07-39/+187
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| * mmc: fsl_esdhc: Use calloc()Fabio Estevam2013-05-06-2/+1
| | | | | | | | | | | | | | A malloc() followed by memset() can be simply replaced by calloc(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: sdhci: return error when failed add_sdhci().Jaehoon Chung2013-05-06-4/+2
| | | | | | | | | | | | | | | | | | If failed the add_host(), it is reasonable that return value of add_sdhci(). Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * sdhci: Add sdhci support for spear devicesVipin Kumar2013-05-06-0/+45
| | | | | | | | | | | | | | Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * davinci, mmc: Added a delay reading ext CSD registerDavide Bonfanti2013-05-06-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this additional delay, some eMMC don't negotiate properly bus width Tested on: - Toshiba THGBM2G8D8FBAIB - Toshiba THGBM4G4D1HBAR - Micron MTFC4GMVEA (the one giving the problem) - Hynix H26M64002BNR - SanDisk SDIN5E1-32G Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it> Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: Split device init to decouple OCR-polling delayChe-Liang Chiou2013-05-06-32/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of time that MMC driver spends on initializing a device is polling OCR (operation conditions register). To decouple this polling loop, device init is split into two parts: The first part fires the OCR query command, and the second part polls the result. So the caller is now no longer bound to the OCR-polling delay; he may fire the query, go somewhere and then come back later for the result. To use this, call mmc_set_preinit() on any device which needs this. This can save significant amounts of time on boot (e.g. 200ms) by hiding the MMC init time behind other init. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | usb: common: Use a global definition for 'min3'Vivek Gautam2013-05-06-14/+21
| | | | | | | | | | | | | | | | | | We can use a common global method for calculating minimum of 3 numbers. Put the same in 'common header' and let 'ehci' use it. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Tom Rini <trini@ti.com>
* | usb: fix: Fixing Port status and feature number constantsVivek Gautam2013-05-06-28/+51
| | | | | | | | | | | | | | Fix the Port status bit constants and Port feature number constants as a part of USB 2.0 and USB 3.0 Hub class. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | usb: hub: Parallelize power-cycling of root-hub portsVivek Gautam2013-05-06-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | Untill now we power-cycle (aka: disable power on a port and re-enabling again) one port at a time. Delay of 20ms for Port-power to change multiplies with number of ports in this case. So better we parallelize this process: disable power on all ports, wait for port-power to stabilize and then re-enable the power subsequently. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | USB: ohci-at91: make OHCI work on at91sam9g10 SoCBo Shen2013-05-05-2/+2
| | | | | | | | | | | | The at91sam9g10 need to configure HCK0 to make OHCI work Signed-off-by: Bo Shen <voice.shen@atmel.com>
* | USB: SS: Add support for Super Speed USB interfaceVivek Gautam2013-05-05-9/+58
| | | | | | | | | | | | | | | | This adds usb framework support for super-speed usb, which will further facilitate to add stack support for xHCI. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | usb: hub: Fix enumration timeoutVivek Gautam2013-05-05-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch b6d7852c increases timeout for enumeration, taking worst case to be 10 sec. get_timer() api returns timestamp in milliseconds, which is what we are checking in the do-while() loop in usb_hub_configure() (get_timer(start) < CONFIG_SYS_HZ * 10). This should give us a required check for 10 seconds, and thereby we don't need to add additional mdelay of 100 microseconds in each cycle. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
* | usb: Update device class in usb device's descriptorVivek Gautam2013-05-05-0/+5
| | | | | | | | | | | | | | | | Fetch the device class into usb device's dwcriptors, so that the host controller's driver can use this info to differentiate between HUB and DEVICE. Signed-off-by: Amar <amarendra.xt@samsung.com>
* | usb: hub: Power-cycle on root-hub portsVivek Gautam2013-05-05-0/+34
| | | | | | | | | | | | | | | | | | XHCI ports are powered on after a H/W reset, however EHCI ports are not. So disabling and re-enabling power on all ports invariably. Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | USB: Some cleanup prior to USB 3.0 interface additionVivek Gautam2013-05-05-23/+30
| | | | | | | | | | | | | | Some cleanup in usb framework, nothing much on feature side. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | usb: common: Weed out USB_**_PRINTFs from usb frameworkVivek Gautam2013-05-05-283/+241
| | | | | | | | | | | | | | | | USB_PRINTF, USB_HUB_PRINTF, USB_STOR_PRINTF, USB_KBD_PRINTF are nothing but conditional debug prints, depending on DEBUG. So better remove them and use debug() simply. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
* | usb: Add new command to set USB 2.0 port test modesJulius Werner2013-05-05-34/+125
| | | | | | | | | | | | | | | | | | This patch adds a new 'usb test' command, that will set a port to a USB 2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes on both downstream hub ports and ordinary device's upstream ports. In addition, it supports EHCI root hub ports. Signed-off-by: Julius Werner <jwerner@chromium.org>
* | USB: EHCI: Add weak functions to support new chipJim Lin2013-05-05-12/+28
|/ | | | | | | Add ehci_get_port_speed() and ehci_set_usbmode() weak functions for platform driver to support new chip. Signed-off-by: Jim Lin <jilin@nvidia.com>
* P1022DS: Set CONFIG_SPL_MAX_SIZE directlyTom Rini2013-05-03-1/+1
| | | | | | | | | With the u-boot-with-spl.bin rule calling $(OBJCOPY) with CONFIG_SPL_PAD_TO, and CONFIG_SPL_PAD_TO defaulting to CONFIG_SPL_MAX_SIZE we cannot use math here, so set it to 4096 rather than 4 * 1024. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-05-02-72/+833
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| * powerpc/85xx: set USB2 default mode to 'device' for (super)hydra boardsShaohui Xie2013-05-02-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Hydra and Superhydra (P3041DS, P5020DS, and P5040DS) boards have a second USB port that can be configured in either host, peripheral (aka device), or OTG (on-the-go) mode. When configured in host mode, if the port is connected to another USB host, damage to the board can occur. To avoid this, we change the default setting to peripheral mode. Ideally, we'd set it to OTG mode, but currently there is no OTG support for these boards. Setting the hwconfig variable will also update the device tree, and so Linux will configure the port for peripheral mode as well. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Timur Tabi <timur@tabi.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PCXu Jiucheng2013-05-02-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When P1021RDB-PC reboot system, the board will hung at uboot DDR configuration. For P1021RDB-PC DDR reset pin is multiplex with QE, so uboot will reserve this pin for QE and skip DDR reset. Other platforms without QE will do this reset. This patch adds a slight code to reset DDR chip by QE CE_PB8 pin for NAND and NOR FLASH boot. For booting from SPI FALSH and SD card, it seems possible to use the rom on chip to write to the GPIO pins before configuring the DDR. Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: Changed LIODN offset valuesCristian Sovaiala2013-05-02-30/+30
| | | | | | | | | | | | | | | | | | | | | | Extending LIODN offset range from 1-5 to 1-10 While using a qman portal with a higher index the LIODN offset is incorrectly set, thus extending the range of offsets covers all 10 qman portals Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Acked-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: Extend workaround for erratum DDR_A003 to other SoCsYork Sun2013-05-02-0/+3
| | | | | | | | | | | | | | Erratum DDR_A003 applies to P5020, P3041, P4080, P3060, P2041, P5040. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/p1010rdb: add readme document for p1010rdbShengzhou Liu2013-05-02-0/+199
| | | | | | | | | | Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/p1010rdb: Change flexcan compatible stringShengzhou Liu2013-05-02-1/+1
| | | | | | | | | | | | | | | | Change flexcan compatible string from "fsl,flexcan-v1.0" to "fsl,p1010-flexcan" to match the device tree. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/85xx: add SerDes bank 4 lanesTimur Tabi2013-05-02-0/+4
| | | | | | | | | | | | | | | | Only some chips have four SerDes banks, so don't define lanes for a bank that doesn't exist. Signed-off-by: Timur Tabi <timur@tabi.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * qoriq/p1_p2_rdb_pc: USB device-tree fixups for P1020Zhicheng Fan2013-05-02-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | Resolve P1020 second USB controller multiplexing with eLBC - mandatory to mention USB2 in hwconfig string to select it over eLBC, otherwise USB2 node is removed - works only for SPI and SD boot Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Zhicheng Fan <B32736@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * doc/ramboot.mpc85xx: Documented the RAMBOOT for MPC85xxPoonam Aggrwal2013-05-02-0/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There could be scenarios where the user would like to manually(via JTAG) configure the DDR/L2SRAM and load the bootloader binary onto DDR/L2SRAM. This document explains thse usecases and the detailed explanation of what needs to be done to use it. Most of the code from CONFIG_SYS_RAMBOOT will be used except for small changes of CCSRBAR etc. The changes are not very large, but it is good to document them so that user can get it working at once. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx:IFC Errata A003399 is not valid for BSC913xPrabhakar Kushwaha2013-05-02-2/+0
| | | | | | | | | | | | | | | | As per Errata list of BSC9131 and BSC9132, IFC Errata A003399 is no more valid. So donot compile its workaround. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mpc85xx: Fix a compiler warning when CONFIG_WATCHDOG is turned onHorst Kronstorfer2013-05-02-8/+10
| | | | | | | | | | | | | | | | | | cpu.c:288:2: warning: implicit declaration of function 'reset_85xx_watchdog' [-Wimplicit-function-declaration] Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/85xx: Add workaround for errata USB-14 (enable on P204x/P3041/P50x0)Xulei2013-05-02-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On P204x/P304x/P50x0 Rev1.0, USB transmit will result in false internal multi-bit ECC errors, which has impact on performance, so software should disable all ECC reporting from USB1 and USB2. In formal release document, the errata number should be USB14 instead of USB138. Signed-off-by: xulei <Lei.Xu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: xulei <B33228@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/b4860qds: Add the tlb entries for SRIO interfacesLiu Gang2013-05-02-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the tlb entries based on the configuration of the SRIO interfaces. Every SRIO interface has 256M space: #define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 #define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull #define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 #define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * fman/mEMAC: set SETSP bit in IF_MODE regisgter for RGMII speedZang Roy-R619112013-05-02-0/+21
| | | | | | | | | | | | | | | | | | | | Some legacy RGMII phys don't have in band signaling for the speed information. so set the RGMII MAC mode according to the speed got from PHY. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Reported-by: John Traill <john.traill@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: set clock-frequency for T4/B4 clockgen nodeTang Yuantian2013-05-02-0/+2
| | | | | | | | | | | | | | | | For T4/B4, the clockgen node compatible string is updated to version 2. Add clock-frequency setting for this new version. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/b4860: Adding workaround errata A-005871Shengzhou Liu2013-05-02-0/+2
| | | | | | | | | | | | | | | | Per the latest errata updated, B4860/B4420 Rev 1.0 has also errata A-005871, so adding define A-005871 for B4 SoCs. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/b4: Fix the wrong register offset of B4 PCIE moduleLiu Gang2013-05-02-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | B4420/B4860 PCIE can not work because of the wrong definition of the PCIE register offset in the file: arch/powerpc/include/asm/immap_85xx.h Add the judgement of B4420/B4860 to make the register offset to: #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x200000 Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/p1022ds: Add support for NAND and NAND boot using SPLMatthew McClintock2013-05-02-20/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add defines needed to access NAND, remove second flash bank that is actually connected to NAND. Add nand booting support for P1022DS with hardcoded DDR config using SPL framework from 2011 Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: add setting of clock-frequency for mpic nodeDongsheng.wang@freescale.com2013-05-02-0/+5
| | | | | | | | | | | | | | | | Set the device tree property associated with the mpic source frequency. The frequency is used for mpic timer. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: Add revision properties in portal device tree node 'pme'Jeffrey Ladouceur2013-05-02-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | The 'fsl,pme-rev1' and 'fsl-pme-rev2' properties have been added to the pme portal node. This is required for software to determine which version of PME hardware is present and take appropriate actions. These properties are a direct reflection of the corresponding ccsr pme register value. Also removed unnecessary static global variables. Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * board/freescale/common/cds_pci_ft.c: Fix rotate wrong cells in interrupt-map ↵Jiang Bin2013-05-02-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | property For linux 3.x, the size of each item in interrupt-map property is 9 not 7. Don't use the static value and calculate the size with following cells: PCI #address-cells, PCI #interrupt-cells, PIC address, PIC #address-cells, PIC #interrupt-cells. Signed-off-by: Bin Jiang <bin.jiang@windriver.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini2013-05-02-43/+84
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| * mpc5200: a3m071/a4m2k: Miscellaneous updates and fixesStefan Roese2013-05-02-31/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The changes to a3m071/a4m2k in summary are: - Enable CAN1 on I2C in GPS Port Configuration - Enable SPI on PSC2 - Activate network console - New flash partitioning - Fix some typos - Pass host name to Linux - Change rootfs to squashfs,jffs2 - Enable UBI/UBIFS support - Enable FIT support Signed-off-by: Stefan Roese <sr@denx.de>
| * mpc5200: a3m071/a4m2k: Fix problem with increased global_data structStefan Roese2013-05-02-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The v2013.04 release has this patch set included: 5cb48582 "Add architecture-specific global data" With this, the global_data struct is now common and new variables have been added. Resulting in a bigger struct. Unfortunately the currently allocated 128 bytes are just a bit too small for this new struct. This patch now uses the automatically generated struct size instead to not run into this problem again. Please note that this problem might hit some other platforms which currently reserve a tight space of 128 bytes for the global_data struct! Signed-off-by: Stefan Roese <sr@denx.de>
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