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* Fix Quad UART mapping on MCC200 board due to new HW revisionWolfgang Denk2006-04-13-1/+3
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* Merge with /home/m8/git/u-bootWolfgang Denk2006-04-12-126/+176
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| * Fix JFFS2 support for legacy NAND driver.Marian Balakowicz2006-04-08-117/+78
| | | | | | | | Some more NAND cleanup and small fixes.
| * Remove dependencies between DoC code and old legacy NAND driver.Marian Balakowicz2006-04-05-4/+91
| | | | | | | | | | | | Necessary defines and data structures were copied to DoC specific files so that legacy NAND code could be entirely removed from u-boot tree in the near future.
| * Correct PM828_PCI_config Makefile target.Marian Balakowicz2006-04-05-1/+1
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* | MCC200 Board: fix flash unprotection code for flash > 32 MB.Wolfgang Denk2006-04-06-0/+10
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* | Update CHANGELOGWolfgang Denk2006-04-06-0/+4
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* | Fix Lite500B support: Merge with /home/raj/git/u-boot.l5200b_pciWolfgang Denk2006-04-06-8/+32
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| * | Set SDelay register in the DDR controller for the MPC5200B chip.Rafal Jaworowski2006-03-29-8/+32
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* | | Merge with /home/sr/git/u-boot/cfi-flashWolfgang Denk2006-04-06-14/+93
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| * | | * Changes/fixes for drivers/cfi_flash.c:Stefan Roese2006-04-01-13/+95
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add Intel legacy lock/unlock support to common CFI driver On some Intel flash's (e.g. Intel J3) legacy unlocking is supported, meaning that unlocking of one sector will unlock all sectors of this bank. Using this feature, unlocking of all sectors upon startup (via env var "unlock=yes") will get much faster. - Fixed problem with multiple reads of envronment variable "unlock" as pointed out by Reinhard Arlt & Anders Larsen. - Removed unwanted linefeeds from "protect" command when CFG_FLASH_PROTECTION is enabled. - Changed p3p400 board to use CFG_FLASH_PROTECTION Patch by Stefan Roese, 01 Apr 2006 * Changes/fixes for drivers/cfi_flash.c: - Correctly handle the cases where CFG_HZ != 1000 (several XScale-based boards) - Fix the timeout calculation of buffered writes (off by a factor of 1000) Patch by Anders Larsen, 31 Mar 2006
* | | Merge with /home/sr/git/u-boot/4xx-sdramWolfgang Denk2006-04-05-38/+378
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| * | | Reorder CHANGELOGStefan Roese2006-03-31-18/+18
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| * | | Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)Stefan Roese2006-03-31-38/+378
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 405 SDRAM: - The SDRAM parameters can now be defined in the board config file and the 405 SDRAM controller values will be calculated upon bootup (see PPChameleonEVB). When those settings are not defined in the board config file, the register setup will be as it is now, so this implementation should not break any current design using this code. Thanks to Andrea Marson from DAVE for this patch. 440 DDR: - Added function sdram_tr1_set to auto calculate the TR1 value for the DDR. - Added ECC support (see p3p440). Patch by Stefan Roese, 17 Mar 2006
* | | Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.SWolfgang Denk2006-04-03-1/+5
| | | | | | | | | | | | Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473]
* | | * Add support for ymodem protocol downloadWolfgang Denk2006-04-01-38/+1198
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch by Stefano Babic, 29 Mar 2006 * Memory Map Update for Delta board: U-Boot is at 0x80000000-0x84000000 Merge with /home/mk/8-benq/u-boot
| * | | delta board: one more DA9030 fix.Markus Klotzbuecher2006-03-30-11/+19
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| * | | Add support for ymodem protocol (loady command).Markus Klotzbuecher2006-03-30-14/+1151
| | | | | | | | | | | | | | | | Patch by Stefano Babic, 29 Mar 2006
| * | | Change delta board memory map to start at 0x80000000.Markus Klotzbuecher2006-03-29-8/+8
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| * | | delta board: minor update to DA9030 code.Markus Klotzbuecher2006-03-29-3/+5
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| * | | delta board: fix DA9030 reset procedure.Markus Klotzbuecher2006-03-27-6/+12
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* | | | GCC-4.x fixes: clean up global data pointer initialization for all boards.Wolfgang Denk2006-03-31-1653/+1177
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* | | | Update CHANGELOGWolfgang Denk2006-03-25-0/+10
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* | | Merge with http://www.denx.de/git/u-boot.gitMarkus Klotzbuecher2006-03-24-1028/+18829
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| * | Enable Quad UART om MCC200 board.Wolfgang Denk2006-03-23-0/+7
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| * | Cleanup MCC200 board configuration; omit non-existent stuff.Wolfgang Denk2006-03-21-22/+5
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| * | Update CHANGELOGWolfgang Denk2006-03-19-0/+2
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| * Add support for MPC859/866 Rev. A.0Wolfgang Denk2006-03-18-3/+8
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| * Merge with port of MPC8349EMDS boardWolfgang Denk2006-03-17-40/+2371
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| | * Support for DDR with 32-data path. Addotional notes on injectingRafal Jaworowski2006-03-16-53/+126
| | | | | | | | | | | | multiple-bit errors.
| | * Add command for handling DDR ECC registers on MPC8349EE MDS board.Marian Balakowicz2006-03-16-0/+465
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| | * Fix DDR ECC bit definitions for MPC83xx.Marian Balakowicz2006-03-16-2/+4
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| | * Add initial support for MPC8349E MDS board.Marian Balakowicz2006-03-14-1/+1178
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| | * Add support for ECC DDR initialization on MPC83xx.Marian Balakowicz2006-03-14-22/+110
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| | * Add DMA support for MPC83xx.Marian Balakowicz2006-03-14-1/+173
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| | * Add sync in do_reset() routine for MPC83xx after RPR registerMarian Balakowicz2006-03-14-0/+6
| | | | | | | | | | | | | | | was written to. It is need on some targets when BAT translation is enabled.
| | * Add bit definitions for MPC83xx DDR controller registers.Marian Balakowicz2006-03-14-0/+54
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| | * Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx.Marian Balakowicz2006-03-14-1/+38
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| | * Correct shift offsets in icache_status and dcache_status for MPC83xx.Marian Balakowicz2006-03-14-2/+4
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| | * Add support for DS1374 RTC chip.Marian Balakowicz2006-03-14-1/+256
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| * | Add support for Lite5200B board.Wolfgang Denk2006-03-17-83/+192
| |/ | | | | | | Patch by Patch by Jose Maria (Txema) Lopez, 16 Jan 2006
| * Apply SoC concept to arm926ejs CPUs, i.e. move the SoC specific timer andWolfgang Denk2006-03-13-171/+540
| | | | | | | | | | cpu_reset code from cpu/$(CPU) into the new cpu/$(CPU)/$(SOC) directories Patch by Andreas Engel, 13 Mar 2006
| * Fix CHANGELOG entry (patch date)Wolfgang Denk2006-03-13-1/+1
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| * Change max size of uncompressed uImage's to 8MByte and addStefan Roese2006-03-13-3/+23
| | | | | | | | | | | | | | | | | | | | | | CFG_BOOTM_LEN to adjust this setting. As mentioned by Robin Getz on 2005-05-24 the size of uncompressed uImages was restricted to 4MBytes. This default size is now increased to 8Mbytes and can be overrided by setting CFG_BOOTM_LEN in the board config file. Patch by Stefan Roese, 13 Mar 2006
| * Fix problem with updated PCI code in cpu/ppc4xx/405gp_pci.cStefan Roese2006-03-13-1/+4
| | | | | | | | Patch by Stefan Roese, 13 Mar 2006
| * cpu/ppc4xx/start.S : exceptions are enabled after relocationStefan Roese2006-03-13-23/+21
| | | | | | | | Patch by Cedric Vincent, 6 June 2005
| * au1x00_eth.c: check malloc return value and abort if it failedWolfgang Denk2006-03-13-2/+9
| | | | | | | | Patch by Andrew Dyer, 26 Jul 2005
| * Change the sequence of events in soft_i2c.c:send_ack() to keep fromWolfgang Denk2006-03-13-4/+5
| | | | | | | | | | incorrectly generating start/stop conditions on the bus. Patch by Andrew Dyer, 26 Jul 2005
| * Fix bug in [id]cache_status commands for MPC85xx processors;Wolfgang Denk2006-03-13-2/+7
| | | | | | | | | | | | should look at LSB of L1CSRn registers to determine if L1 cache is enabled, not the MSB. Patch by Murray Jensen, 19 Jul 2005
| * Fix array overflow with fw_setenv on uninitialised environmentWolfgang Denk2006-03-12-4/+5
| | | | | | | | Patch by Murray Jensen, 15 Jul 2005
generated by cgit v1.1 at 2024-11-27 22:37:36 +0000