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* mx51evk: Fix CONFIG_SYS_FSL_ESDHC_ADDRFabio Estevam2014-09-22-1/+1
| | | | | | We should pass the SDHC1 base address into CONFIG_SYS_FSL_ESDHC_ADDR. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* cm_fx6: Remove CONFIG_NETMASKFabio Estevam2014-09-22-1/+0
| | | | | | | | We should not hardcode CONFIG_NETMASK in the config file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
* imx: Fix warning by building vf610twr_nandStefano Babic2014-09-17-0/+1
| | | | | | | | | | | | | | | | commit d6d07a9b... arm: vf610: add NAND support for vf610twr generates the following warnings: WARNING: no status info for 'vf610twr_nand' WARNING: no maintainers for 'vf610twr_nand'WARNING: no status info for 'vf610twr_nand' This is due to the fact that vf610twr_nand_defconfig has no Maintainer. This patch proposed Alison as Maintainer and fix it. Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Alison Wang <b18965@freescale.com> CC: Stefan Agner <stefan@agner.ch>
* Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-09-16-17/+107
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| * arm: Fix _start for CONFIG_SYS_DV_NOR_BOOT_CFGBenoît Thébaudeau2014-09-11-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The boards using CONFIG_SYS_DV_NOR_BOOT_CFG (i.e. calimain, da850evm_direct_nor and enbw_cmc) had the _start symbol defined after the CONFIG_SYS_DV_NOR_BOOT_CFG word rather than before it in arch/arm/lib/vectors.S. Because of that, if by lack of luck 'gd->mon_len = (ulong)&__bss_end - (ulong)_start' (see setup_mon_len()) was a multiple of 4 kiB (see reserve_uboot()), then the last BSS word overlapped the first word of the following reserved RAM area (or went beyond the top of RAM without such an area) after relocation because __image_copy_start did not match _start (see relocate_code()). This was broken by commit 41623c9 'arm: move exception handling out of start.S files', which defined _start twice (before and after the CONFIG_SYS_DV_NOR_BOOT_CFG word), then by commit 0a26e1d 'arm: fix a double-definition error of _start symbol', which kept the definition of the _start symbol after the CONFIG_SYS_DV_NOR_BOOT_CFG word. This new commit fixes this issue by restoring the original behavior, i.e. by defining the _start symbol before the CONFIG_SYS_DV_NOR_BOOT_CFG word. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Manfred Rudigier <manfred.rudigier@omicron.at> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Heiko Schocher <hs@denx.de>
| * arm: Make reset position-independentBenoît Thébaudeau2014-09-11-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards, like mx31pdk and tx25, require the beginning of the SPL code to be position-independent. For these two boards, this is because they use the i.MX external NAND boot, which starts by executing the first NAND Flash page from the NFC page buffer. The SPL then needs to copy itself to its actual link address in order to free the NFC page buffer and use it to load the non-SPL image from Flash before running it. This means that the SPL runtime address differs from its link address between the reset and the initial copy performed by board_init_f(), so this part of the SPL binary must be position-independent. This requirement was broken by commit 41623c9 'arm: move exception handling out of start.S files', which used an absolute address to branch to the reset routine. This new commit restores the original behavior, which just performed a relative branch. This fixes the boot of mx31pdk and tx25. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Reported-by: Helmut Raiger <helmut.raiger@hale.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Magnus Lilja <lilja.magnus@gmail.com> Cc: John Rigby <jcrigby@gmail.com> Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
| * README.clang: build command with clangJeroen Hofstee2014-09-11-0/+56
| | | | | | | | | | Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * Makefile: default to cc for host compilerJeroen Hofstee2014-09-11-2/+2
| | | | | | | | | | | | | | | | | | Since the host compiler might not be gcc but e.g. clang default to cc/c++ to invoke it. cc: Masahiro Yamada <yamada.m@jp.panasonic.com> cc: Tom Rini <trini@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * clang: workaround for generated constantsJeroen Hofstee2014-09-09-4/+5
| | | | | | | | | | | | | | | | | | | | KBuild abuses the asm statement to write to a file and clang chokes about these invalid asm statements. Hack it even more by fooling this is actual valid asm code. cc: Masahiro Yamada <yamada.m@jp.panasonic.com> cc: Tom Rini <trini@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * eabi_compat: add __aeabi_memcpy __aeabi_memsetJeroen Hofstee2014-09-09-2/+13
| | | | | | | | | | cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * ARM: make gd a function for clangJeroen Hofstee2014-09-09-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "clang does not support global register variables; this is unlikely to be implemented soon because it requires additional LLVM backend support" [1] Workaround it by obtaining the value of gd/r9 by an inline asm routine. Note there is no set routine added for ARM at the moment, since most if not all updates of gd from c are actually not needed for ARM. [1] http://clang.llvm.org/docs/UsersManual.html cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * cc-option: also detect unsupported warnings optionsJeroen Hofstee2014-09-09-2/+2
| | | | | | | | | | | | | | | | | | | | | | By default clang will echo a warning if a warning option is unknown. Turning warnings into errors when polling for options also catches such cases and prevents passing arguments to the compiler which cause warnings. cc: Masahiro Yamada <yamada.m@jp.panasonic.com> cc: Tom Rini <trini@ti.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * ARM: SPL: do not set gd againJeroen Hofstee2014-09-09-3/+0
| | | | | | | | | | | | | | | | | | Just before calling board_init_f, crt0.S has already reserved space for the initial gd on the stack. There should be no need to allocate it again. cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * board_r: ARM[64] do not set gd againJeroen Hofstee2014-09-09-1/+1
| | | | | | | | | | | | | | | | | | For ARM / ARM64 the relocation routines already updated gd to the new value. Don't set it again. This allows compilation with clang as it cannot update gd directly. cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | mx6qsabreauto: Staticize when possibleFabio Estevam2014-09-16-8/+8
| | | | | | | | | | | | Turn all local symbols into static in order to make sparse happy. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mx6sxsabresd: Staticize i2c_pad_info1Fabio Estevam2014-09-16-1/+1
| | | | | | | | | | | | | | | | | | | | i2c_pad_info1 is only used locally, so it can be made static. Fix the following sparse warning: board/freescale/mx6sxsabresd/mx6sxsabresd.c:160:22: warning: symbol 'i2c_pad_info1' was not declared. Should it be static? Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | imx:mx6slevk: change CONFIG_SYS_FSL_ESDHC_ADDRPeng Fan2014-09-16-1/+1
| | | | | | | | | | | | | | Define CONFIG_SYS_FSL_ESDHC_ADDR using USDHC2_BASE_ADDR which is used in board_mmc_init. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* | imx:mx6qarm2: change CONFIG_SYS_FSL_ESDHC_ADDRPeng Fan2014-09-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | Define CONFIG_SYS_FSL_ESDHC_ADDR using USDHC4_BASE_ADDR. USDHC3 and USDHC4 are both initialized in board_mmc_init. There is no restriction on USDHC3 addr or USDHC4 addr should be assigned to CONFIG_SYS_FSL_ESDHC_ADDR. So, just choose USDHC4_BASE_ADDR to avoid errors when fsl_esdhc_mmc_init is invoked. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* | imx:mx6sxsabresd: change CONFIG_SYS_FSL_ESDHC_ADDRPeng Fan2014-09-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | Define CONFIG_SYS_FSL_ESDHC_ADDR using USDHC4_BASE_ADDR which is used in board_mmc_init. If board_mmc_init failed, cpu_mmc_init->fsl_esdhc_mmc_init will use CONFIG_SYS_FSL_ESDHC_ADDR to initialize sdhc. So set this macro to correct value. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* | arm: vf610: add NAND support for vf610twrStefan Agner2014-09-16-5/+93
| | | | | | | | | | | | | | | | | | | | | | This adds NAND support for the Vybrid tower system (TWR-VF65GS10) provided by the vf610_nfc driver. Full 16-Bit bus width is supported. Also an aditional config vf610twr_nand is introduced which gets the environment from NAND. However, booting U-Boot from NAND is not yet possible due to missing boot configuration block (BCB). Signed-off-by: Stefan Agner <stefan@agner.ch>
* | mtd: nand: add Freescale vf610_nfc driverStefan Agner2014-09-16-0/+725
| | | | | | | | | | | | | | | | | | | | This adds initial support for Freescale NFC (NAND Flash Controller) found in ARM Vybrid SoC's, Power Architecture MPC5125 and others. The driver is called vf610_nfc since this is the first supported and tested hardware platform supported by the driver. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
* | arm: mx35: use common timer functionsAndrew Ruder2014-09-16-83/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves mx35 to the common timer functions added in commit 8dfafdd - Introduce common timer functions <Rob Herring> The (removed) mx35 timer code (specifically __udelay()) could deadlock at the 32-bit boundary of get_ticks(). get_ticks() returned a 32-bit value cast up to a 64-bit value. If get_ticks() + tmo in __udelay() crossed the 32-bit boundary, the while condition became unconditionally true and locks the processor. Rather than patch the specific mx35 issues, simply move everything over to the common code. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | arm: mx31: use common timer functionsAndrew Ruder2014-09-16-102/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves mx31 to the common timer functions added in commit 8dfafdd - Introduce common timer functions <Rob Herring> The (removed) mx31 timer code (specifically __udelay()) could deadlock at the 32-bit boundary of get_ticks(). get_ticks() returned a 32-bit value cast up to a 64-bit value. If get_ticks() + tmo in __udelay() crossed the 32-bit boundary, the while condition became unconditionally true and locks the processor. Rather than patch the specific mx31 issues, simply move everything over to the common code. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Marek Vasut <marex@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Helmut Raiger <helmut.raiger@hale.at>
* | imx: mx6slevk: Change to use generic boardYe.Li2014-09-11-0/+2
| | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for imx6slevk to use generic board. Signed-off-by: Ye.Li <B37916@freescale.com>
* | imx: mx6q/dlarm2: Change to use generic boardYe.Li2014-09-11-0/+2
| | | | | | | | | | | | | | Enable the CONFIG_SYS_GENERIC_BOARD for imx6q/dl arm2 board to use generic board. Signed-off-by: Ye.Li <B37916@freescale.com>
* | README.imximage: Fix the maximum DCD sizeFabio Estevam2014-09-11-1/+1
| | | | | | | | | | | | | | | | | | | | In commit 021e79c85371 ("tools: imximage: Fix the maximum DCD size for mx53/mx6") we have fixed the maximum DCD size for mx53/mx53. Do the same on the README document for consistency. Reported-by: Jonas Karlsson <jonas.d.karlsson@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | imx: Fix build of mx6sxsabresdStefano Babic2014-09-11-1/+1
| | | | | | | | | | | | | | | | | | | | Commit 224beb833e544b802f08765271cec07667d39669 add clock enabling function for FEC, but the masks are not available for SX processor and the mx6sxsabresd cannot be built clean. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Nikita Kiryanov <nikita@compulab.co.il>
* | mx6sxsabresd: Add PCI supportFabio Estevam2014-09-09-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested with an Intel Wireless PCI 7260HMW card: U-Boot 2014.10-rc1-16576-g4a8a8a8-dirty (Aug 23 2014 - 16:05:11) CPU: Freescale i.MX6SX rev1.0 at 792 MHz Reset cause: WDOG Board: MX6SX SABRE SDB I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 8086:08b1 - Network controller Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | pcie_imx: Add mx6solox supportFabio Estevam2014-09-09-8/+58
| | | | | | | | | | | | | | Let PCI on mx6solox also be supported. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* | mx6: imx-regs: Provide a structure for GPC registersFabio Estevam2014-09-09-0/+13
| | | | | | | | | | | | | | Introduce a structure for accessing the General Power Controller block (GPC) registers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mx6qsabreauto: Remove imx6q-sabreauto.dtsFabio Estevam2014-09-09-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit fa9c021632473 ("mx6: add example DTB for mx6qsabreauto") introduced 'imx6q-sabreauto.dts' but it adds no real value as the dts file only contains the 'model' and 'compatible' strings. After this commit the final binary is also changed from 'u-boot.imx' to 'u-boot-dtb.imx', which may confuse users. So revert it until a more complete and useful device tree could be provided. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* | imx: nitrogen6x: Replace 'fatload' by 'load' command in env settings to be ↵Guillaume GARDET2014-09-09-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | filesystem independent nitrogen6x.h file defines CONFIG_CMD_FS_GENERIC, so we are able to use generic 'load' command instead of 'fatload'. It allows to use ext filesystem and keep compatibilty with fat filesystem. Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Stefano Babic <sbabic@denx.de> Acked-By: Eric Nelson <eric.nelson@boundarydevices.com>
* | mx6dlsabresd: Use its own DCD tableFabio Estevam2014-09-09-1/+132
| | | | | | | | | | | | | | | | | | Currently mx6dlsabresd shares the same DCD settings with the nitrogen board. Provide a DCD configuration file specific to mx6dlsabresd with the settings recommended by the Freescale hardware team. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | arm: vf610: lpuart: disable FIFO on initializatonStefan Agner2014-09-09-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | UART does not use the UART FIFO, but we should also not rely that the UART FIFO is diabled by default. For instance, when loading U-Boot using the boot ROMs serial downloader protocol over UART, FIFO is enabled at U-Boot start time. This patch disables the RX and TX FIFO, sets back their thresholds and flushes them. Signed-off-by: Stefan Agner <stefan@agner.ch>
* | arm: vf610: lpuart: fix status register handlingStefan Agner2014-09-09-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The status register 1 (S1) is not writeable, hence we should not write it. In order to clear the RDRF flag we only need to read the data register. Also, when stressing U-Boot a lot with serial input, an overflow can occur which asserts the S1_OR flag (while not asserting the S1_RDRF flag). To clear this flag we again just need to read the data register, hence add this flag to the abort conditions for the while loop. Insert a compiler barrier to make sure reading the data register gets executed after reading the status register. Signed-off-by: Stefan Agner <stefan@agner.ch>
* | mx6: Fix ECSPI typo in soc_boot_modesNikolay Dimitrov2014-09-09-4/+4
| | | | | | | | | | | | Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
* | imximage: Fix imximage IVT bug for EIM-NOR bootYe.Li2014-09-09-0/+7
| | | | | | | | | | | | | | | | | | | | | | The load region size of EIM-NOR are defined to 0. For this case, the parameter "imximage_init_loadsize" must be calculated. The imximage tool implements the calculation in the "imximage_generate" function, but the following function "imximage_set_header" resets the value and not calculate. This bug cause some fields of IVT head are not correct, for example the boot_data and DCD overlay the application area. Signed-off-by: Ye.Li <B37916@freescale.com>
* | iMX6: Disable the L2 before chaning the PL310 latencyYe.Li2014-09-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | The Latency parameters of PL310 Tag RAM latency control register and Data RAM Latency control register are set in L2 cache enable. And setting these registers must have PL310 NOT enabled. But when using Plugin mode boot, the PL310 is enabled by bootrom. The patch disables the PL310 before applying this setting. Signed-off-by: Ye.Li <Ye.Li@freescale.com>
* | imx: ventana: Avoid undefined behaviourThierry Reding2014-09-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The leds array within struct ventana has space for 3 elements, but the setup_board_gpio() function tries to set up 4 GPIOs for LEDs. Recent versions of GCC complain about that: board/gateworks/gw_ventana/gw_ventana.c: In function 'setup_board_gpio': board/gateworks/gw_ventana/gw_ventana.c:987:27: warning: iteration 3u invokes undefined behavior [-Waggressive-loop-optimizations] if (gpio_cfg[board].leds[i]) ^ board/gateworks/gw_ventana/gw_ventana.c:986:2: note: containing loop for (i = 0; i < 4; i++) { ^ Fix this by making the upper bound of the loop match the array size. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Tim Harvey <tharvey@gateworks.com>
* | tools: imximage: Fix the maximum DCD size for mx53/mx6Fabio Estevam2014-09-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to mx53 and mx6 reference manuals: "The maximum size of the DCD limited to 1768 bytes." As each DCD entry consists of 8 bytes, we have a total of 1768 / 8 = 221, and excluding the first entry, which is the header leads to 220 as the maximum number for DCD size. Reported-by: Jonas Karlsson <jonas.d.karlsson@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Nitin Garg <nitin.garg@freescale.com>
* | imx: ventana: add pci fixup for PLX PEX860x switch GPIOTim Harvey2014-09-09-0/+31
| | | | | | | | | | | | | | | | Most Gateworks Ventana boards use a PLX PEX860x PCIe switch for PCIe expansion. These boards use GPIO on the PLX device as PERST# for the downstream ports thus we assert this when the PLX is enumerated. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | pci: add support for board_pci_fixup_dev functionTim Harvey2014-09-09-0/+11
| | | | | | | | | | | | | | Some board-level drivers may wish to have per-device fixup functions for PCI devices. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | arm: mx6: cm_fx6: add sata supportNikita Kiryanov2014-09-09-0/+134
| | | | | | | | | | | | | | | | | | Add support for SATA. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | arm: mx6: cm_fx6: use eepromNikita Kiryanov2014-09-09-0/+32
| | | | | | | | | | | | | | | | | | | | Use Compulab eeprom module to obtain revision number, serial number, and mac address from the EEPROM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | arm: mx6: cm_fx6: add i2c supportNikita Kiryanov2014-09-09-0/+53
| | | | | | | | | | | | | | | | | | | | Add support for all 3 I2C busses on Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | arm: mx6: cm_fx6: add usb supportNikita Kiryanov2014-09-09-0/+89
| | | | | | | | | | | | | | | | | | Add USB and USB OTG host support for Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | arm: mx6: cm_fx6: add ethernet supportNikita Kiryanov2014-09-09-2/+115
| | | | | | | | | | | | | | | | | | | | Add ethernet support for Compulab CM-FX6 CoM Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | arm: mx6: cm_fx6: add nand supportNikita Kiryanov2014-09-09-1/+78
| | | | | | | | | | | | | | | | | | | | Add NAND support for Compulab CM-FX6 CoM. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | arm: mx6: add support for Compulab cm-fx6 CoMNikita Kiryanov2014-09-09-0/+819
| | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for Compulab CM-FX6 CoM. Support includes MMC, SPI flash, and SPL with dynamic DRAM detection. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | arm: mx6: add get_cpu_type()Nikita Kiryanov2014-09-09-2/+3
| | | | | | | | | | | | | | | | Define get_cpu_type(). Reuse it in is_cpu_type(). Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
generated by cgit v1.1 at 2024-12-27 08:27:45 +0000