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* arm, at91: add Siemens board taurus and axmHeiko Schocher2013-12-09-0/+340
| | | | | | | | | | | enable support for the siemens AT91SAM9G20 based boards taurus and axm. Signed-off-by: Roger Meier <r.meier@siemens.com> Reviewed-by: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91: switch coloured LED to gpio APIAndreas Bießmann2013-12-09-28/+26
| | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91: nand: switch atmel_nand to generic GPIO APIAndreas Bießmann2013-12-09-37/+43
| | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de> Acked-by: Scott Wood <scottwood@freescale.com>
* at91: redefine legacy GPIO PIN_BASEAndreas Bießmann2013-12-09-1/+1
| | | | | | | In order to get the very same value for legacy pin definitions and new gpio definitions set the legacy PIN_BASE to 0. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91: add new gpio pin definitionsAndreas Bießmann2013-12-09-4/+24
| | | | | | | | This patch define new names for GPIO pins on at91 devices. Follow up patches will convert the whole infrastructure to use these new definitions. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Bo Shen <voice.shen@atmel.com>
* arm: keep all sections in ELF fileAlbert ARIBAUD2013-12-07-83/+113
| | | | | | | | | | Current LDS files /DISCARD/ a lot of sections when linking ELF files, causing diagnostic tools such as readelf or objdump to produce partial output. Keep all section at link stage, filter only at objcopy time so that .bin remains minimal. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* ARM: align MVBAR on 32 byte boundaryMasahiro Yamada2013-12-06-1/+1
| | | | | | | | | | | | | The lower 5 bit of MVBAR is UNK/SBZP. So, Monitor Vector Base Address must be 32-byte aligned. On the other hand, the secure monitor handler does not need 32-byte alignment. This commit moves ".algin 5" directive to the correct place. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Andre Przywara <andre.przywara@linaro.org> Acked-by: Andre Przywara <andre.przywara@linaro.org>
* Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-06-69/+304
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| * arm: arndale: disable spi bootMinkyu Kang2013-12-06-4/+0
| | | | | | | | | | | | | | | | arndale board is booted from mmc Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Inderpal Singh <inderpal.singh@linaro.org>
| * arm: exynos: adds ifdef for spi bootMinkyu Kang2013-12-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix following errors and warnings spl_boot.c: In function 'exynos_spi_copy': spl_boot.c:111:49: error: 'CONFIG_ENV_SPI_BASE' undeclared (first use in this function) spl_boot.c:111:49: note: each undeclared identifier is reported only once for each function it appears in spl_boot.c:142:2: error: 'SPI_FLASH_UBOOT_POS' undeclared (first use in this function) spl_boot.c: In function 'copy_uboot_to_ram': spl_boot.c:189:28: warning: unused variable 'param' [-Wunused-variable] spl_boot.c: At top level: spl_boot.c:107:13: warning: 'exynos_spi_copy' defined but not used [-Wunused-function] Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * arm: exynos: remove the unused define.Jaehoon Chung2013-12-05-4/+0
| | | | | | | | | | | | | | | | These defines didn't use anywhere. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * arm: exynos/goni: fix the return type for s5p_mmc_initJaehoon Chung2013-12-05-2/+2
| | | | | | | | | | | | | | The "int" type is right. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * board: trats2: update Tizen partition definitionsPiotr Wilczek2013-12-03-10/+8
| | | | | | | | | | | | | | | | This patch updates Tizen partions layout. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * board: trats2: fix access to samsung registersPiotr Wilczek2013-12-03-8/+8
| | | | | | | | | | | | | | | | This patch use 'samsung_get_base' common functions to access registers. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * board: trats2: fix environmental variablesPiotr Wilczek2013-12-03-3/+3
| | | | | | | | | | | | | | | | In this patch variable names are used instead of hardcoded names Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * board: trats2: remove unused defines from config filePiotr Wilczek2013-12-03-4/+0
| | | | | | | | | | | | Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: spl: Add a custom spi copy functionRajeshwari Shinde2013-12-03-4/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a custom spi_copy funtion to copy u-boot from SF to RAM. This is faster then iROM spi_copy funtion as this runs spi at 50Mhz and also in WORD mode of operation. Changed a printf in pinmux.c to debug just to avoid the compilation error in SPL. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * arm: exynos: fix the align for exynos4_power structureMinkyu Kang2013-12-03-1/+1
| | | | | | | | | | | | | | res3 should be 4bytes Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Dominik Klein <dominik.klein@gmx.com>
| * arm: exynos: fix set_mmc_clk for exynos4x12Jaehoon Chung2013-12-03-1/+2
| | | | | | | | | | | | | | | | Fix the set_mmc_clk() for exnos4x12. If board is exynos4x12, mmc clock should be set to wrong value. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * trats: usb: Add usb_cable_connected() functionPrzemyslaw Marczak2013-12-03-0/+12
| | | | | | | | | | Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * trats2: enable dfu and thor protocol for Tizen downloadPiotr Wilczek2013-12-02-4/+18
| | | | | | | | | | | | | | | | | | Trats2 config is updated to support DFU mode. Malloc pool must be increased for DFU buffer allocation. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * trats2: enable ums support on Trats2Piotr Wilczek2013-12-02-0/+110
| | | | | | | | | | | | | | | | | | This patch adds support for USB and enables 'ums' command on Trats2 board. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * driver:usb:s3c_udc: add support for Exynos4x12Piotr Wilczek2013-12-02-2/+12
| | | | | | | | | | | | | | | | This patch add new defines for usb phy for Exynos4x12. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * config: arm: exynos5250: remove duplicate definesLuka Perkov2013-11-29-22/+1
| | | | | | | | | | | | | | | | | | The SPI section is already defined in this file (lines 268-288) so we can remove the duplicate definitions. While at it, also fix one tiny whitespace typo. Signed-off-by: Luka Perkov <luka@openwrt.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-06-261/+1745
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| * | AM3517 EVM: Enable ethernetTom Rini2013-12-06-2/+12
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | omap4_panda: Don't use ulpi_resetRoger Quadros2013-12-06-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes this error message when USB is started. "ULPI: ulpi_reset: failed writing reset bit" It is pointless to manually reset the ULPI as the USB Host Reset and PHY RESET line should take care of that. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | omap3_beagle: Don't use ulpi_resetRoger Quadros2013-12-06-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes this error message when USB is started. "ULPI: ulpi_reset: failed writing reset bit" It is pointless to manually reset the ULPI as the USB Host Reset and PHY RESET line should take care of that. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | usb: ehci-omap: Reset the USB Host OMAP moduleRoger Quadros2013-12-06-15/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit bb1f327 we removed the UHH reset to fix NFS root (over usb ethernet) problems with Beagleboard (3530 ES1.0). However, this seems to cause USB detection problems for Pandaboard, about (3/8). On further investigation, it seems that doing the UHH reset is not the cause of the original Beagleboard problem, but in the way the reset was done. This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based on the UHH_REVISION register. This should fix the Beagleboard NFS problem as well as the Pandaboard USB detection problem. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> CC: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | arm: omap3: Enable clocks for peripherals only if they are usedMichael Trimarchi2013-12-06-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch change the per_clocks_enable() function used in OMAP3 code to enable peripherals clocks. Only required clock should be activated. So if the board use the uart(x) as a console we need to activate it. The Board's config should include define to enable every subsystem that the board use. For a complete list of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER should be checked. Right now the bootloader can enable and disable clocks for: uart(x) using CONFIG_SYS_NS16550 gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 } i2c bus using CONFIG_DRIVER_OMAP34XX_I2C. Not required gptimer(x) and mcbsp(x) for booting are disabled by default and are not supported by any define. Their activation need to included in the per_clocks_enable if the peripheral is included. Not booting board should enable the peripheral clock connected to their driver Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * | am335x: cpsw: optimize cpsw_recv to increase network performanceVladimir Koutny2013-12-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In 48ec5291, only TX path was optimized; this does the same also for RX path. This results in huge increase of TFTP throughput on custom am3352 board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer timeouts. Signed-off-by: Vladimir Koutny <vladimir.koutny@streamunlimited.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
| * | pandaboard: 1/1] ARM:OMAP4+: panda-es: Support Rev B3 Elpida DDR2 RAMHardik Patel2013-12-04-2/+66
| | | | | | | | | | | | Signed-off-by: Hardik Patel <hardik.patel@volansystech.com>
| * | davinci: fix Master Priority Registers locationViktar Palstsiuk2013-12-04-1/+2
| | | | | | | | | | | | | | | | | | | | | MSTPRI0 (Master Priority 0 Register) sits at 0x01C14110 not at 0x01C14114 Signed-off-by: Viktar Palstsiuk <viktar.palstsiuk@promwad.com>
| * | arm: am335x: Add DT (FDT) support to Siemens boardsStefan Roese2013-12-04-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable FDT support for all Siemens AM335x boards. To support newer Linux kernels with DT booting. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Roger Meier <r.meier@siemens.com> Cc: Lukas Stockmann <lukas.stockmann@siemens.com> Cc: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | am335x_evm: Update nandboot to use partitions and DTTom Rini2013-12-04-5/+4
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | arm: omap3: Add uart4 omap3 adddressMichael Trimarchi2013-12-04-0/+1
| | | | | | | | | | | | | | | | | | This patch add the OMAP34XX_UART4 memory address Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
| * | ARM: OMAP5+: Remove unnecessary EFUSE settingsLokesh Vutla2013-12-04-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Certain EFUSE settings were recommended for the first four lots of OMAP5 ES1.0 silicon. These are not applicable for OMAP5 ES2.0 and DRA7 silicon. So removing these EFUSE settings. Reported-by: Griffis, Brad <bgriffis@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | ARM: dra7_evm: Add SATA supportRoger Quadros2013-12-04-0/+18
| | | | | | | | | | | | | | | | | | | | | The evm has a SATA port. Enable SATA configuration and inititialize the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | ARM: DRA7xx: Add PRCM and Control information for SATARoger Quadros2013-12-04-0/+3
| | | | | | | | | | | | | | | | | | | | | Adds the necessary PRCM and Control register information for SATA on DRA7xx. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | ARM: omap5_uevm: Add SATA supportRoger Quadros2013-12-04-0/+17
| | | | | | | | | | | | | | | | | | The uevm has a SATA port. Inititialize the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | ARM: OMAP5: Add SATA platform glueRoger Quadros2013-12-04-0/+124
| | | | | | | | | | | | | | | | | | Add platform glue logic for the SATA controller. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | ARM: OMAP5: Add PRCM and Control information for SATARoger Quadros2013-12-04-0/+12
| | | | | | | | | | | | | | | | | | | | | Adds the necessary PRCM and Control register information for SATA on OMAP5. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | ARM: OMAP5: Add Pipe3 PHY driverRoger Quadros2013-12-04-0/+271
| | | | | | | | | | | | | | | | | | | | | Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is a driver for the Pipe3 PHY. Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | ahci: Fix cache align error messagesRoger Quadros2013-12-04-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align the ATA ID buffer to the cache-line boundary. This gets rid of the below error mesages on ARM v7 platforms. scanning bus for devices... ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618 ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818 CC: Aneesh V <aneesh@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | ahci: Error out with message on malloc() failureRoger Quadros2013-12-04-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | If malloc() fails, we don't want to continue in ahci_init() and ahci_init_one(). Also print a more informative error message on malloc() failures. CC: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
| * | ARM: DRA7/OMAP5: EMIF: Add workaround for bug 0039SRICHARAN R2013-12-04-1/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When core power domain hits oswr, then DDR3 memories does not come back while resuming. This is because when EMIF registers are lost, then the controller takes care of copying the values from the shadow registers. If the shadow registers are not updated with the right values, then this results in incorrect settings while resuming. So updating the shadow registers with the corresponding status registers here during the boot. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * | ARM: DRA: EMIF: Change DDR3 settings to use hw levelingSRICHARAN R2013-12-04-98/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using software leveling. This was done since hardware leveling was not working. Now that the right sequence to do hw leveling is identified, use it. This is required for EMIF clockdomain to idle and come back during lowpower usecases. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * | ARM: DRA7: Add is_dra7xx cpu check definitionSRICHARAN R2013-12-04-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | A generic is_dra7xx cpu check is useful for grouping all the revisions under that. This is used in the subsequent patches. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * | am33xx: Stop modifying certain EMIF4D registersTom Rini2013-12-04-101/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the definitive guide to EMIF configuration[1] certain registers that we have been modifying (and are documented registers) should be left in their reset values rather than modified. This has been tested on AM335x GP EVM and Beaglebone White. [1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Javier Martinez Canillas <javier@dowhile0.org> Cc: Heiko Schocher <hs@denx.de> Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Matt Porter <matt.porter@linaro.org>
| * | ARMV7: OMAP4: Add twl6032 supportOleg Kosheliev2013-12-04-6/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added chip type detection and twl6032 support in the battery control and charge functions. Based on Balaji T K <balajitk@ti.com> patches for TI u-boot. Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
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