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* usb: create common header virtual root hub descriptorsStephen Warren2014-03-10-995/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many USB host controller drivers contain almost identical copies of the same virtual root hub descriptors. Put these into a common file to avoid duplication. Note that there were some very minor differences between the descriptors in the various files, such as: - USB 1.0 vs. USB 1.1 - Manufacturer/Device ID - Max packet size - String content I assume these aren't relevant. Cc: Thomas Lange <thomas@corelatus.se> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Eric Millbrandt <emillbrandt@coldhaus.com> Cc: Pierre Aubert <p.aubert@staubli.com> Cc: Stefan Roese <sr@denx.de> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Denis Peter <d.peter@mpl.ch> Cc: Rodolfo Giometti <giometti@linux.it> Cc: Zhang Wei <wei.zhang@freescale.com> Cc: Mateusz Zalega <m.zalega@samsung.com> Cc: Remy Bohmer <linux@bohmer.net> Cc: Markus Klotzbuecher <mk@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: C Nauman <cnauman@diagraph.com> Cc: David Müller <d.mueller@elsoft.ch> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Thomas Abraham <t-abraham@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Andrew Murray <amurray@embedded-bits.co.uk> Cc: Matej Frančeškin <matej.franceskin@comtrade.com> Cc: Cliff Cai <cliff.cai@analog.com> Cc: Bryan Wu <cooloney@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: ehci: fully align interrupt QHs/QTDsStephen Warren2014-03-10-2/+4
| | | | | | | | | These data structures are passed to cache-flushing routines, and hence must be conform to both the USB the cache-flusing alignment requirements. That means aligning to USB_DMA_MINALIGN. This is important on systems where cache lines are >32 bytes. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ush: ehci: initialize altnext pointers in QHStephen Warren2014-03-10-0/+2
| | | | | | | | | | | | | | | | | | | | | Section 4.10.2 "Advance Queue" of ehci-specification-for-usb.pdf specifies how an EHCI controller loads a new QTD for processing if the QH is not already marked as active. It states: ===== If the field Bytes to Transfer is not zero and the T-bit in the Alternate Next qTD Pointer is set to zero, then the host controller uses the Alternate Next qTD Pointer. Otherwise, the host controller uses the Next qTD Pointer. If Next qTD Pointer’s T-bit is set to a one, then the host controller exits this state and uses the horizontal pointer to the next schedule data structure. ===== Hence, we must ensure that the alternate next QTD pointer's T-bit (TERMINATE) is set, so the EHCI controller knows to use the next QTD pointer. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-03-07-52/+2687
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| * powerpc/t104xrdb: Update DDR initialization related settingsPriyanka Jain2014-03-07-30/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update following DDR related settings for T1040RDB, T1042RDB_PI -Correct number of chip selects to two as t1040 supports two Chip selects. -Update board_specific_parameters udimm structure with settings derived via calibration. -Update ddr_raw_timing sructure corresponding to DIMM. -Set ODT to off. Typically on FSL board, ODT is set to 75 ohm, but on T104xRDB, on setting this , DDR instability is observed. Board-level debugging is in progress. Verified the updated settings to be working fine with dual-ranked Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * powerpc/t1040qds: Add Video - HDMI supportPriyanka Jain2014-03-07-1/+255
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040 has internal display interface unit (DIU) for driving video. T1040QDS supports video mode via -LCD using TI enconder -HDMI type interface via HDMI encoder Chrontel, CH7301C encoder which is I2C programmable is used as HDMI connector on T1040QDS. This patch add support to -enable Video interface for T1040QDS -route qixis multiplexing to enable DIU-HDMI interface on board -program DIU pixel clock gerenartor for T1040 -program HDMI encoder via I2C on board Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040Priyanka Jain2014-03-07-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040 SoC has SCFG (Supplement Configuration) Block which provides chip specific configuration and status support. The base address of SCFG block in T1040 is 0xfc000. SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register) at offset 0x28. Add definition of -SCFG block -SCFG_PIXCLKCR register -Bits definition of SCFG_PIXCLK register Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t2080rdb: Add T2080PCIe-RDB board supportShengzhou Liu2014-03-07-0/+1777
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC. It works in two mode: standalone mode and PCIe endpoint mode. T2080PCIe-RDB Feature Overview ------------------------------ Processor: - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz DDR Memory: - Single memory controller capable of supporting DDR3 and DDR3-LP devices - 72bit 4GB DDR3-LP SODIMM in slot Ethernet interfaces: - Two 10M/100M/1G RGMII ports on-board - Two 10Gbps SFP+ ports on-board - Two 10Gbps Base-T ports on-board Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC SerDes 16 lanes configuration: - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10) - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2) - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3) - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2) - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2) - SerDes-2 Lane G-H: to SATA1 & SATA2 IFC/Local Bus: - NOR: 128MB 16-bit NOR flash - NAND: 512MB 8-bit NAND flash - CPLD: for system controlling with programable header on-board eSPI: - 64MB N25Q512 SPI flash USB: - Two USB2.0 ports with internal PHY (both Type-A) PCIe: - One PCIe x4 gold-finger - One PCIe x4 connector - One PCIe x2 end-point device (C293 Crypto co-processor) SATA: - Two SATA 2.0 ports on-board SDHC: - support a TF-card on-board I2C: - Four I2C controllers. UART: - Dual 4-pins UART serial ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t208xqds: fixup for t208xqdsShengzhou Liu2014-03-07-2/+3
| | | | | | | | | | | | | | | | Change QIXIS timing parameter CONFIG_SYS_CS3_FTIM2 to 8 from 0. Fix EMI2 for t2080qds, which was caused by adding t2081qds. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * bootstage: powerpc: support fdt stash and reportingMela Custodio2014-03-07-0/+7
| | | | | | | | | | | | | | | | | | This implements stashing of bootstage timing data to FDT and automatic timing reporting. To enable define CONFIG_BOOTSTAGE_FDT and CONFIG_BOOTSTAGE_REPORT respectively. Signed-off-by: Rommel G Custodio <sessyargc+u-boot@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/usb: Workaround for erratum-A006261Suresh Gupta2014-03-07-2/+128
| | | | | | | | | | | | | | | | | | | | | | USB spec says that the minimum disconnect threshold should be over 525 mV. However, internal USB PHY threshold value is below this specified value. Due to this some devices disconnect at run-time. Hence, phy settings are tweaked to increased disconnect threshold to be above 525mV by using this workaround. Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/b4860: Add workaround for errata A006384 and A006475Shaveta Leekha2014-03-07-2/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | SerDes PLLs may not lock reliably at 5 G VCO configuration(A006384) and at cold temperatures(A006475), workaround recalibrate the PLLs with some SerDes configuration Both these errata are only applicable for b4 rev1. So, make workaround for these errata conditional, depending upon soc version. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * B4860qds: Set SerDes2 refclk2 at to 156.25MHz for XFI to workShaveta Leekha2014-03-07-4/+3
| | | | | | | | | | | | | | | | | | | | Change setting of SerDes2 refclk2 to have the default value as it is coming on board that is 156.25MHz, for XFI to work. Also change PLL_NUM variable to the one defined in config_mpc85xx.h for B4860 and B4420. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * B4860/B4420: Add PLL_NUM define for B4420/B4860 to use SerDes2 Refclks ↵Shaveta Leekha2014-03-07-0/+2
| | | | | | | | | | | | | | | | | | | | re-configuration B4860 has two PLL per SerDes whereas B4420 has one PLL per SerDes, add their defines in arch/powerpc/include/asm/config_mpc85xx.h Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * 85xx/b4860: Alternate serdes protocols for B4860/B4420poonam aggrwal2014-03-07-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On B4860 and B4420, some serdes protocols can be used with LC VCO as well as Ring VCO options. Addded Alternate options with LC VCO for such protocols. For example protocol 0x2a on srds 1 becomes 0x29 if it is LC VCO. The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/b4860qds: Add support to make PCIe SATA work on B4860QDSShaveta Leekha2014-03-07-9/+113
| | | | | | | | | | | | | | | | | | | | | | | | 1) SerDes2 Refclks have been set properly to make PCIe SATA to work as it work on SerDes refclk of 100MHz 2) Mask the SerDes's device reset request before changing the Refclks for SerDes1 and SerDes2 for PLL locks to happen properly, device reset request bit unmasked after SerDes refclks configuration Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/b4860qds: Add support to make Aurora work on B4860QDSShaveta Leekha2014-03-07-4/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | 1) Add new SerDes1 protocols having Aurora in them 2) Add VSC cross point connections for Aurora to work with CPRI and SGMIIs 3) Configure VSC crossbar switch to connect SerDes1 lanes to aurora on board, by checking SerDes1 protocols 4) SerDes1 Refclks have been set properly to make Aurora, CPRI and SGMIIs to work together properly Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | kbuild: move "checkgcc4" to PowerPC archprepareMasahiro Yamada2014-03-07-10/+10
| | | | | | | | | | | | | | | | | | | | "checkgcc4" is used only for PowerPC. Move it to arch/powerpc/config.mk. To make sure gcc is new enough before beginning build, run "checkgcc4" during "archprepare". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: move "checkthumb" to ARM archprepareMasahiro Yamada2014-03-07-9/+11
| | | | | | | | | | | | | | | | | | | | "checkthumb" makes sense only for ARM architecture. Move it to arch/arm/config.mk. To make sure gcc supports THUMB mode before beginning build, run "checkthumb" during "archprepare". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: mpc8260: consolidate CONFIG_MPC8260 and CONFIG_8260Masahiro Yamada2014-03-07-82/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, CONFIG_MPC8260 and CONFIG_8260 were used mixed-up. All boards with mpc8260 cpu defined both of them: - CONFIG_MPC8260 was defined in board config headers and include/common.h - CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mk We do not need to have both of them. This commit keeps only CONFIG_MPC8260. This commit does: - Delete CONFIG_8260 and CONFIG_MPC8260 definition in config headers and include/common.h - Rename CONFIG_8260 to CONFIG_MPC8260 in arch/powerpc/cpu/mpc8260/config.mk. - Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260 Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de>
* | mips: move CONFIG_MIPS{32, 64} definition to config.mkMasahiro Yamada2014-03-07-14/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All mips32 boards define CONFIG_MIPS32 in config headers except malta boards which define it in boards.cfg. We can consolidate them by defining it in arch/mips/cpu/mips32/config.mk. CONFIG_MIPS64 definition can be moved to arch/mips/cpu/mips64/config.mk as well. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | kbuild: improve Kbuild speedMasahiro Yamada2014-03-07-31/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kbuild brought about many advantages for us but a significant performance regression was reported by Simon Glass. After some discussions and analysis, it turned out its main cause is in $(call cc-option,...). Historically, U-Boot parses all config.mk (arch/*/config.mk and board/*/config.mk) every time descending into subdirectories. That means cc-options are evaluated over and over again. $(call cc-option,...) is useful but costly. So we want to evaluate them only in ./Makefile and spl/Makefile and export compiler flags. This commit changes the build system as follows: - Modify scripts/Makefile.build to not include config.mk Instead, add $(PLATFORM_CPPFLAGS) to asflags-y, ccflags-y, cppflags-y. - Export many variables Going forward, Kbuild will not parse config.mk files when it descends into subdirectories. If we want to set variables in config.mk and use them in subdirectories, they must be exported. This is the list of variables to get exported: PLATFORM_CPPFLAGS CPUDIR BOARDDIR OBJCOPYFLAGS LDFLAGS LDFLAGS_FINAL (used in nand_spl/board/*/*/Makefile) CONFIG_STANDALONE_LOAD_ADDR (used in examples/standalone/Makefile) SYM_PREFIX (used in examples/standalone/Makefile) RELFLAGS (used in examples/standalone/Makefile) - Delete CPPFLAGS This variable has been replaced with PLATFORM_CPPFLAGS - Copy gcclibdir from example/standalone/Makefile to arch/sparc/config.mk The reference in CONFIG_STANDALONE_LOAD_ADDR must be resolved before it is exported. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reported-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> [on Sandbox] Tested-by: Stephen Warren <swarren@nvidia.com> [on Tegra]
* | config.mk: specify the exact path to standalone linker scriptMasahiro Yamada2014-03-07-5/+9
| | | | | | | | | | | | | | | | | | | | | | We want to change the build system to include config.mk only from ./Makefile and spl/Makefile. We must prepare for that in this commit. $(src) is a moving target and not handy for our purpose. We must replace it with a fixed path. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCCMasahiro Yamada2014-03-07-94/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, USE_PRIVATE_LIBGCC was defined in arch-specific config.mk and referenced in arch/$(ARCH)/lib/Makefile. We are not happy about parsing config.mk again and again. We have to keep the same behavior with a different way. By adding "CONFIG_" prefix, this macro appears in include/autoconf.mk, include/spl-autoconf.mk. (And treating USE_PRIVATE_LIBGCC as CONFIG macro is reasonable enough.) Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes" in arch/arm/cpu/arm720t/tegra*/config.mk, whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk. It means Tegra enables PRIVATE_LIBGCC only for SPL. We can describe the same behavior by adding #ifdef CONFIG_SPL_BUILD # define CONFIG_USE_PRIVATE_LIBGCC #endif to include/configs/tegra-common.h. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
* | kbuild, blackfin: Add CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEEDMasahiro Yamada2014-03-07-212/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many (but not all) of Blackfin boards give -O2 option to compile under lib/ directory. That means lib/ should be speed-optimized, whereas other parts should be size-optimized. We want to keep the same behavior, but do not want to parse board/*/config.mk again and again. We've got no choice but to invent a new method. CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED, if it is enabled, gives -O2 flag only for building under lib/ directory. Dirty codes which I had marked as "FIX ME" in board/${BOARD}/config.mk have been deleted. Instead, CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED has been defined in include/configs/${BOARD}.h. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Sonic Zhang <sonic.zhang@analog.com>
* | cmd_nvedit: Make 'env import -c' require size parameterTom Rini2014-03-07-0/+3
| | | | | | | | | | | | | | | | | | When importing a checksummed area we need to be told how big the area in question is so that we know that will match the size of the area which the checksum is generated against. Reported-by: Pierre AUBERT <p.aubert@staubli.com> Signed-off-by: Tom Rini <trini@ti.com>
* | Cosmetic: Typo fixesVasili Galka2014-03-07-3/+3
| | | | | | | | Signed-off-by: Vasili Galka <vasili@visionmap.com>
* | ppc4xx: Remove 4xx NAND booting supportStefan Roese2014-03-07-1882/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As ppc4xx currently only supports the deprecated nand_spl infrastructure and nobody seems to have time / resources to port this over to the newer SPL infrastructure, lets remove NAND booting completely. This should not affect the "normal", non NAND-booting ppc4xx platforms that are currently supported. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Tirumala Marri <tmarri@apm.com> Cc: Matthias Fuchs <matthias.fuchs@esd.eu> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* | net/phy: Correct AR8021 phy_maskHaijun.Zhang2014-03-07-1/+1
| | | | | | | | | | | | | | | | There was wrong phy_mask for AR8021 device, so the AR8021 can't be probed correctly. Changed it from 0x4fffff to 0x4ffff0. Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
* | xilinx: delete meaningless .gitignore filesMasahiro Yamada2014-03-07-6/+0
| | | | | | | | | | | | | | | | config.tmp is never generated Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
* | unit-test: make "test -e" test independent of $CWDStephen Warren2014-03-07-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The unit-test for hush's "test -e" currently relies upon being run in the U-Boot build directory, because it tests for the existence of a file that exists in that directory. Fix this by explicitly creating the file we use for the existence test, and deleting it afterwards so that multiple successive unit-test invocations succeed. This required adding an os.c function to erase files. Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | hush: fix some quoted variable expansion issuesStephen Warren2014-03-07-6/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following shell command fails: if test -z "$x"; then echo "zero"; else echo "non-zero"; fi (assuming $x does not exist, it prints "non-zero" rather than "zero"). ... since "$x" expands to nothing, and the argument is completely dropped, causing too few to be passed to -z, causing cmd_test() to error out early. This is because when variable expansions are processed by make_string(), the expanded results are concatenated back into a new string. However, no quoting is applied when doing so, so any empty variables simply don't generate any parameter when the combined string is parsed again. Fix this by explicitly replacing quoting any argument that was originally quoted when re-generating a string from the already-parsed argument list. This also fixes loss of whitespace in commands such as: setenv space " " setenv var " 1${space}${space} 2 " echo ">>${var}<<" Reported-by: Russell King <linux@arm.linux.org.uk> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | unit-test: clean up evironment after Hush testsStephen Warren2014-03-07-1/+2
| | | | | | | | | | | | | | | | | | Delete the temporary variables that are used to save unit-test results from the environment after running the test. This prevents polluting the environment, or growing it too much. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Simon Glass <sjg@chromium.org>
* | net: asix: don't pad odd-length TX packetsStephen Warren2014-03-07-2/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | For Ethernet/USB RX packets, the ASIX HW pads odd-sized packets so that they have an even size. Currently, asix_recv() does remove this padding, and asic_send() adds equivalent padding in the TX path. However, the HW does not appear to need this packing for TX packets in practical testing with "ASIX Elec. Corp. AX88x72A 000001" Vendor: 0x0b95 Product 0x7720 Version 0.1. The Linux kernel does no such padding for the TX path. Remove the padding from the TX path: * For consistency with the Linux kernel. * NVIDIA has a Tegra simulator which validates that the length of USB packets sent to an ASIX device matches the packet length value inside the packet data. Having U-Boot and the kernel do the same thing when creating the TX packets simplifies the simulator's validation. Cc: Lucas Stach <dev@lynxeye.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de> Tested-by: Gerhard Sittig <gsi@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2014-03-04-802/+321
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| * mtd: nand: omap: move omap_elm.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-2/+2
| | | | | | | | | | | | | | | | | | omap_elm.h is a generic header used by OMAP ELM driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta2014-03-04-8/+6
| | | | | | | | | | | | | | | | | | omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms. Hence this file should be present in generic folder instead of architecture specific include folder. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: merge duplicate GPMC data from different arch-xx headers ↵pekon gupta2014-03-04-196/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into common omap_gpmc.h Each SoC platform (AM33xx, OMAP3, OMAP4, OMAP5) has its own copy of GPMC related defines and declarations scattered in SoC platform specific header files like include/asm/arch-xx/cpu.h However, GPMC hardware remains same across all platforms thus this patch merges GPMC data scattered across different arch-xx specific header files into single header file include/asm/arch/omap_gpmc.h Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: remove unused #defines from common omap_gpmc.hpekon gupta2014-03-04-73/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI params or nand_id[] table. And based on that it defines ECC layout. This patch 1) removes following board configs used for defining NAND ECC layout - GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND) - GPMC_NAND_ECC_LP_x8_LAYOUT (for large page x8 NAND) - GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND) - GPMC_NAND_ECC_SP_x8_LAYOUT (for small page x8 NAND) 2) removes unused #defines in common omap_gpmc.h depending on above configs Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: remove redundant platform specific header: arch-xx/omap_gpmc.hpekon gupta2014-03-04-86/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are two sets of omap_gpmc.h header files (a) arch/arm/include/asm/omap_gpmc.h common header file for all platforms, containing defines and declarations used by GPMC NAND driver. (b) arch/arm/include/asm/arch-xx/omap_gpmc.h SoC platform specific header file containing defines like ECC layout. This patch removes platform specific arch-xx/omap_gpmc.c because: - GPMC hardware engine is common for all SoC platforms hence only (a) is enough - ECC layout is now defined in omap_nand.c driver itself based on ecc-scheme selected. Hence all ECC layout declarations in (b) are redundant. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
| * board/ti/am335x/README: update for NAND bootpekon gupta2014-03-03-17/+36
| | | | | | | | | | | | | | | | | | NAND boot mode on AM335x EVM has been verified, and steps to use it has been documented and update in this README Signed-off-by: Pekon Gupta <pekon@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Tom Rini <trini@ti.com>
| * mtd: nand: omap: optimized chip->ecc.correct() for H/W ECC schemespekon gupta2014-03-03-90/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chip->ecc.correct() is used for detecting and correcting bit-flips during read operations. In omap-nand driver it implemented as: (a) omap_correct_data(): for h/w based ECC_HAM1 scheme (b) omap_correct_data_bch() + CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW for ECC_BCH8 scheme using GPMC and software lib/bch.c (c) omap_correct_data_bch() + CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW for ECC_BCH8 scheme using GPMC and ELM This patch updates (c) - checks for calc_ecc[]==0x00 so that error_correction is not required for known good pages. - adds scalability for other ECC_BCHx scheme by merging following omap_rotate_ecc_bch() + omap_fix_errors_bch() => omap_correct_data_bch() - fixing logic for bit-flip correction based on error_loc[count] Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: optimize chip->ecc.calculate() for H/W ECC schemespekon gupta2014-03-03-163/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chip->ecc.calculate() is used for calculating and fetching of ECC syndrome by processing the data passed during Read/Write accesses. All H/W based ECC schemes use GPMC controller to calculate ECC syndrome. But each BCHx_ECC scheme has its own implemetation of post-processing and fetching ECC syndrome from GPMC controller. This patch updates OMAP_ECC_BCH8_CODE_HW ECC scheme in following way: - merges multiple chip->calculate API for different ECC schemes omap_calculate_ecc() + omap_calculate_ecc_bch() + omap_calculate_ecc_bch_sw() ==> omap_calculate_ecc() - removes omap_ecc_disable() and instead uses it as inline. Signed-off-by: Pekon Gupta <pekon@ti.com>
| * mtd: nand: omap: optimize chip->ecc.hwctl() for H/W ECC schemespekon gupta2014-03-03-149/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chip->ecc.hwctl() is used for preparing the H/W controller before read/write NAND accesses (like assigning data-buf, enabling ECC scheme configs, etc.) Though all ECC schemes in OMAP NAND driver use GPMC controller for generating ECC syndrome (for both Read/Write accesses). But but in current code HAM1_ECC and BCHx_ECC schemes implement individual function to achieve this. This patch (1) removes omap_hwecc_init() and omap_hwecc_init_bch() as chip->ecc.hwctl will re-initializeGPMC before every read/write call. omap_hwecc_init_bch() -> omap_enable_ecc_bch() (2) merges the GPMC configuration code for all ECC schemes into single omap_enable_hwecc(), thus adding scalability for future ECC schemes. omap_enable_hwecc() + omap_enable_ecc_bch() -> omap_enable_hwecc() Signed-off-by: Pekon Gupta <pekon@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2014-03-04-21/+4
|\ \
| * | malta: correct tcl script path in README.maltaJames Hogan2014-03-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | README.malta referred to board/malta, but malta has now been moved within board/imgtec/, so correct the path. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Paul Burton <paul.burton@imgtec.com>
| * | MIPS: fix types u64 and __u64 to unsigned long longDaniel Schwierzeck2014-03-04-20/+3
| |/ | | | | | | | | | | | | | | Linux MIPS uses asm-generic/int-ll64.h in asm/types.h. Thus u64 and __u64 are defined as unsigned long long. Port this over to U-Boot. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | arc: arcangel4: set board entry <none> to fix a build errorMasahiro Yamada2014-03-04-13/+2
| | | | | | | | | | | | | | | | There are no source files in board/synopsys/arcangel4/ directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
* | kbuild: allow empty board directoriesMasahiro Yamada2014-03-04-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has compelled all boards to have board/${BOARD}/ or board/${VENDOR}/${BOARD}/ directory. Sometimes it does not seem suitable for some boards, for example Sandbox. (Is it a board?) And arcangel4 board has nothing to compile under the board directory. This commit makes the build system more flexible: If '<none>' is given to the 6th column (=Board name) of boards.cfg, Kbuild will not descend into the board directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | kbuild: tools: fix a bug that always builds Denx logoMasahiro Yamada2014-03-04-2/+2
| | | | | | | | | | | | | | | | | | LOGO_BMP was never overwritten by board-specific or vendor-specific logos. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reported-by: Bo Shen <voice.shen@atmel.com> Tested-by: Bo Shen <voice.shen@atmel.com>
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