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* net: sh-eth: Change cache API of SHNobuhiro Iwamatsu2013-11-22-1/+2
| | | | | | | The cache API of SH was changed from dcache_wback_range to flush_dcache_range. sh-eth uses dcache_wback_range. This patch changes to flush_dcache_range. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* NET: mvgbe: avoid unused variable warning when used without phylib supportSascha Silbe2013-11-22-2/+3
| | | | | | | | Avoid a recently introduced unused variable warning for boards that use mvgbe but not phylib. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> Patch: 266334
* net: trivial: Fix typos in mii field descriptionsStephan Bauroth2013-11-22-2/+2
| | | | | Signed-off-by: Stephan Bauroth <stephan.bauroth@iav.de> Patch: 265707
* phylib: update atheros ar803x phyShengzhou Liu2013-11-22-2/+2
| | | | | | | | As AR8031 and AR8033 have same PHY ID 0x4dd074, they use the common driver. Currently AR8031_driver didn't work for AR8033, hence updated it to have it work on AR8031/AR8033. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
* net: tftp: Make sure timeout will not effect wrap offsetrockly2013-11-22-1/+1
| | | | | | | | | | When the block 0 store to the memory of client and timeout at this moment. Because of no ACK packet, the server will send block 0 again, if this client reconnect to the server at this time, TftpBlockWrapOffset will become larger than it should be. Signed-off-by: Rockly <rocklygnome@gmail.com> Patch: 264417
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-11-17-3/+3
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| * malta: use unmapped flash base addressGabor Juhos2013-11-15-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The physical base address of the NOR flash is 0x1e000000 on the Malta boards. The hardware also maps the first 4MiB of the flash into the 0x1fc00000-0x1fffffff range. Currently, U-Boot uses the mapped address to access the flash, which does not work in recent qemu versions. Since commit a427338b222b43197c2776cbc996936df0302f51 (mips_malta: correct reading MIPS revision at 0x1fc00010) writing to the mapped address space causes a CPU exception. Due to the exception, U-Boot hangs during boot when it tries to detect the CFI flash chip. Use the correct physical address for the MALTA_FLASH_BASE constant to fix the problem. In order to avoid relocation problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE constants. The change makes it possible to start U-Boot on a Malta board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also works on older versions (tested with 1.1.1, 1.2.2, 1.4.2, 1.5.3). Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com>
* | fs: descend into sub directories when it is necessaryMasahiro Yamada2013-11-17-25/+23
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Makefile: move fs/fat/ entry to drivers/MakefileMasahiro Yamada2013-11-17-3/+7
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | arm: rmobile: Do not create a symbolic link to sh timerMasahiro Yamada2013-11-17-7/+1
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | powerpc: mpc824x: Do not create a symbolic link to bedbug_603e.cMasahiro Yamada2013-11-17-7/+1
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: mpc83xx: Do not create a symbolic link to ddr-gen2.cMasahiro Yamada2013-11-17-6/+1
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: mpc83xx: delete unused rulesMasahiro Yamada2013-11-17-6/+0
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Makefile: delete unused linesMasahiro Yamada2013-11-17-6/+0
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | tools: Makefile: delete redundant linesMasahiro Yamada2013-11-17-2/+0
| | | | | | | | | | | | HOSTOS is defined and exported at the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | config.mk: delete unnecessary linesMasahiro Yamada2013-11-17-6/+0
| | | | | | | | | | | | | | SPL_BIN is already defined in spl/Makefile and it is used only in spl/Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Makefile: refactor a littleMasahiro Yamada2013-11-17-5/+2
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Makefile: rename all libraries to built-in.oMasahiro Yamada2013-11-17-181/+182
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | drivers/net/npe: descend only when CONFIG_IXP4XX_NPE=yMasahiro Yamada2013-11-17-4/+2
| | | | | | | | | | | | | | CONFIG_IXP4XX_NPE is defined only for CPU ixp. It is not necessary to filter by CPU ixp. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | drivers/net/fm: descend only when CONFIG_FMAN_ENET=yMasahiro Yamada2013-11-17-5/+1
| | | | | | | | | | | | | | CONFIG_FMAN_ENET is defined only for CPU mpc85xx. We do not need to filter by CPU mpc85xx. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | drivers/qe: move the entry to drivers/MakefileMasahiro Yamada2013-11-17-6/+3
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: move mpc8xxx entry under arch/powerpc/cpu/Masahiro Yamada2013-11-17-20/+11
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Makefile: merge $(LIBBOARD) into $(LIBS)Masahiro Yamada2013-11-17-9/+4
| | | | | | | | | | | | We do not need to handle $(LIBBOARD) and $(LIBS) separately. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Makefile: make directories by Makefile.buildMasahiro Yamada2013-11-17-247/+7
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | drivers: tpm: clean up unused codeMasahiro Yamada2013-11-17-187/+0
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | lib: descend into sub directories only when it is necessaryMasahiro Yamada2013-11-17-10/+8
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | drivers: descend into sub directories only when it is necessaryMasahiro Yamada2013-11-17-5/+3
| | | | | | | | | | | | | | - Descend into drivers/fpga/ only when CONFIG_FPGA=y - Descend into drivers/bios_emulator only when CONFIG_BIOSEMU=y Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Makefile: specifiy an explicite object name rather than $(BOARD).oMasahiro Yamada2013-11-17-3/+3
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Makefile: abolish COBJS, SOBJS, etc.Masahiro Yamada2013-11-17-8/+4
| | | | | | | | | | | | | | | | The support for COBJS, COBJS-y, SOBJS, SOBJS-y, GLCOBJS, GLSOBJS from scripts/Makefile.build. Going forward we need to use Kbuild style consistently. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | board: Do not add -DCONFIG_SYS_TEXT_BASE in board config.mkMasahiro Yamada2013-11-17-55/+5
| | | | | | | | | | | | | | Board config.mk do not need to add -DCONFIG_SYS_TEXT_BASE to CPPFLAGS because the top level config.mk does instead. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | examples: remove the remainders of dead boardMasahiro Yamada2013-11-15-217/+1
| | | | | | | | | | | | | | | | | | Commit 309a292e deleted OXC board, but missed to remove the standalone example specific to OXC board. eepro100_eeprom.c has been an orphan file for a long term. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | cosmetic: README.scrapyard: Add eNET boardMasahiro Yamada2013-11-15-0/+1
| | | | | | | | | | | | | | | | | | | | | | Commit 7e8c53d7 removed eNET board but missed to add eNET to README.scrapyard. This commit adds it for the record. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Graeme Russ <graeme.russ@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | nios2: remove unnecessary header include pathMasahiro Yamada2013-11-15-6/+0
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Thomas Chou <thomas@wytron.com.tw>
* | board: cogent: include header files in a more natural wayMasahiro Yamada2013-11-15-21/+9
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | configs: clean up unused macro CONFIG_L2_OFFMasahiro Yamada2013-11-15-11/+0
| | | | | | | | | | | | | | | | Since commit c2dd0d455 and 45bf05854 introduced the new cache maintainance framework to ARM, CONFIG_L2_OFF has not been used at all. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | TI:omap: Update u-boot-spl.lds for i2c multibus/multiadapter updateTom Rini2013-11-15-1/+2
| | | | | | | | | | | | | | | | | | | | | | In 6789e84 we update u-boot-spl.lds for OMAP to ensure we include adapter information, as we use i2c during SPL. However, the regex used also means we included commands that may have been built. On omap5_uevm this leads to a failure as we include the command from the do_tca642x command, and fail to link. The fix is to restrict our regex to only the i2c list parts. Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-11-14-213/+2353
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| * | powerpc/85xx: fix broken cpu "clock-frequency" propertyLaurentiu TUDOR2013-11-13-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When indexing freqProcessor[] we use the first value in the cpu's "reg" property, which on new e6500 cores IDs the threads. But freqProcessor[] should be indexed with a core index so, when fixing "the clock-frequency" cpu node property, access the freqProcessor[] with the core index derived from the "reg' property. If we don't do this, last half of the "cpu" nodes will have broken "clock-frequency" values. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: York Sun <yorksun@freescale.com>
| * | powerpc/t4240: fix per pci endpoint liodn offsetsLaurentiu TUDOR2013-11-13-5/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code that builds the pci endpoint liodn offset list so that it doesn't overlap with other liodns and doesn't generate negative offsets like: fsl,liodn-offset-list = <0 0xffffffcd 0xffffffcf 0xffffffd1 0xffffffd3 0xffffffd5 0xffffffd7 0xffffffd9 0xffffffdb>; The update consists in adding a parameter to the function that builds the list to specify the base liodn. On PCI v2.4 use the old base = 256 and, on PCI 3.0 where some of the PCIE liodns are larger than 256, use a base = 1024. The version check is based on the PCI controller's version register. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: York Sun <yorksun@freescale.com>
| * | powerpc/t4240: set pcie liodn in the correct registerLaurentiu TUDOR2013-11-13-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The liodn for the T4240's PCIE controller is no longer set through a register in the guts register block but with one in the PCIE register block itself. Use the already existing SET_PCI_LIODN_BASE macro that puts the liodn in the correct register. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: York Sun <yorksun@freescale.com>
| * | powerpc/83xx: Define USB1 and USB2 base addr for MPC834xramneek mehresh2013-11-13-0/+5
| | | | | | | | | | | | | | | | | | | | | Define base addresse for both MPH(USB1) and DR(USB2) controllers for MPC834x socs Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
| * | powerpc/t104xrdb: Add T1042RDB_PI board supportPriyanka Jain2013-11-13-0/+733
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1042RDB_PI is Freescale Reference Design Board supporting the T1042 QorIQ Power Architecture™ processor. T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit. The board is designed with low power features targeted for Printing Image Market. T1042RDB_PI is similar to T1040RDB board with few differences like it has video interface, supports T1042 personality T1042RDB_PI board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Two on-board RGMII 10/100/1G ethernet ports. - SERDES Connections, 8 lanes supporting: — PCI — SATA 2.0 - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Video - DIU supports video at up to 1280x1024x32bpp - HDMI connector - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Device connected: EEPROM, thermal monitor, VID controller, RTC - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
| * | powerpc/t104xrdb: Add T1040RDB board supportPriyanka Jain2013-11-13-0/+1341
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040RDB is Freescale Reference Design Board supporting the T1040 QorIQ Power Architecture™ processor. T1040RDB board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch - Four 1 Gbps Ethernet controllers - SERDES Connections, 8 lanes supporting: - PCI - SGMII - QSGMII - SATA 2.0 - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 1GB 8-bit NAND flash - NOR: 128MB 16-bit NOR Flash - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - CPLD - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - USB - Supports two USB 2.0 ports with integrated PHYs - Two type A ports with 5V@1.5A per port. - SDHC - SDHC/SDXC connector - SPI - On-board 64MB SPI flash - I2C - Devices connected: EEPROM, thermal monitor, VID controller - Other IO - Two Serial ports - ProfiBus port Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> [York Sun: fixed Makefile] Acked-by: York Sun <yorksun@freescale.com>
| * | powerpc/t1040: Update defines to support T1040SoC personalitiesPriyanka Jain2013-11-13-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040 Soc has four personalities: -T1040 (4 cores with L2 switch) -T1042:Reduced personality of T1040 without L2 switch -T1020:Reduced personality of T1040 with less cores(2 cores) -T1022:Reduced personality of T1040 with 2 cores and without L2 switch Update defines in arch/powerpc header files, Makefiles and in driver/net/fm/Makefile to support all T1040 personalities Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> [York Sun: fixed Makefiles] Acked-by: York Sun <yorksun@freescale.com>
| * | powerpc/p1010rdb: update readme for p1010rdb-pa and p1010rdb-pbShengzhou Liu2013-11-13-200/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Remove duplicate doc/README.p1010rdb - Rename README to README.P1010RDB-PA - Add new README.P1010RDB-PB P1010RDB-PB is a variation of previous P1010RDB-PA board. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * | powerpc/t1040: enable PBL tool for T1040Prabhakar Kushwaha2013-11-13-0/+36
| |/ | | | | | | | | | | | | | | Use a default RCW of protocol 0x66. A PBI configure file which uses CPC as 256KB SRAM. It can be used by PBL tool on T1040 to build a pbl boot image. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* | designware_i2c: remove 10msec delay in i2c_xfer_finishAlexey Brodkin2013-11-13-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This delay applies to any data transfer on I2C bus. For example 1kB data read with per-byte access (which happens if environment is stored in I2C EEPROM) takes more than 10 seconds. Moreover data bus driver has to care about bus state and data transfer, but not about internal states of attached devices. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* | designware_i2c: disable i2c controller during target address setupAlexey Brodkin2013-11-13-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4) register succeed only when IC_ENABLE[0] is set to 0. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* | cmd_eeprom: fix i2c_{read|write} usage if env is in I2C EEPROMAlexey Brodkin2013-11-13-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Data "offset" is not used directly in case of I2C EEPROM. Istead it is split into "block number" and "offset within mentioned block". Which are "addr[0]" and "addr[1]" respectively. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> cc: Peter Tyser <ptyser@xes-inc.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Mischa Jonker <mjonker@synopsys.com>
* | i2c, omap1510: remove i2c driverHeiko Schocher2013-11-13-278/+0
| | | | | | | | | | | | | | | | remove omap1510 i2c driver, as there is no board which uses it Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Jian Zhang <jzhang@ti.com>
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