| Commit message (Collapse) | Author | Age | Lines |
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From TO1.1, SNVS adds internal pull up control for POR_B,
the register filed is GPBIT[1:0], after system boot up,
it can be set to 2b'01 to disable internal pull up.
It can save about 30uA power in SNVS mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Q901 is PMOS, LCD_nPWREN should be at low voltage then output is 3V3.
If LCD_nPWREN is high, output is 2.4V which is not correct.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Fix 74LV OE gpio index. pinmux is correct, but gpio index
is wrong, so gpio output will not have effect, since we
use wrong GPIO5_IO18, but not correct GPIO5_IO8.
And at the end of the initialization of 74lv init, should
keep OE voltage level at LOW, but not high.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Need the CONFIG_MX6 for using the mx6_ecspi_fused funtion, otherwise will
break build for other platforms like MX7.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Some type style problems found by review-commits for previous patch
MLK-12483, fix them in this patch and re-check.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Since the MX6UL/SL/SX only has one DDR channel, in CCM_CCDR register the bit[17]
for mmdc_ch0 is reserved and its proper state should be 1. When clear this bit,
the periph_clk_sel cannot be set and that CDHIPR[periph_clk_sel_busy] handshake
never clears.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for
module fuse check. And modify board level codes for SD, FEC and EIM.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.
Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Implement a functionality to read the soc fuses and check if any module
is fused. For fused module, we have to disable it in u-boot dynamically,
and change the its node in FDT to "disabled" status before starting the kernel.
In this patch, we implement the ft_system_setup for FDT fixup. This function will
be called during boot process or by "fdt systemsetup" command.
To enable the module fuse checking, two configurations must be defined:
CONFIG_MODULE_FUSE
CONFIG_OF_SYSTEM_SETUP
Signed-off-by: Ye Li <ye.li@nxp.com>
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When using ft_system_setup, the return value fdt_ret is not assigned,
so the fdt_strerror(fdt_ret) uses a uninitialized value.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The fdt command "fdt systemsetup" can't work because the do_fdt check the
start char 's' for command "fdt set". So the fdt systemsetup will also go into
the "fdt set" in fault. Fix this problem by checking the whole word "set" for
"fdt set" command.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Setup MMDC in two channel fixed mode
Initialize dram banks for two channel fixed mode
DRAM bank = 0x00000000
-> start = 0x10000000
-> size = 0x20000000
DRAM bank = 0x00000001
-> start = 0x80000000
-> size = 0x20000000
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
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TO1.1 already fixed this PMIC_STBY_REQ open drain issue.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Since DDR enter retention mode after kernel enter DSM mode, we have to exit DDR
retention mode before uboot boot, so add this in DCD and plugin code.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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enter retention
Since DDR enter retention mode after kernel enter DSM mode, we have to exit DDR
retention mode before uboot boot, so add this in DCD and plugin code. Meanwhile
correct the HW_ANADIG_SNVS_MISC_CTRL setting to avoid touching other bits.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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Adjust optimal valid clock cycles for 400Mhz operation
Adjust valid clock cycles before self-refresh exit tCKSRX
Adjust valid clock cycles after self-refresh entry tCKSRE
Set MMDC1_MPZQHWCCTRL upper 16 bits to default reset value
DDR calibration script
http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/040ee38ba9ad238fcb6053b663746d51321abb69
Test result: Stress test passed.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
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To simplify kernel clock management, we switch to use DRAM_PLL for
DRAM controller and DDR PHY, but not use DRAM_ALT_CLK_ROOT.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Since only DDR script changed, create build target for SD boot as example
to use TO1.0.
All default build target for 7D platforms are for TO1.1.
Signed-off-by: Ye Li <ye.li@nxp.com>
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On i.MX7D TO1.1, design team adds a mux cell at the CKE path to fix the suspend
mode reset issue, but seems it add extra delay on CKE path, so CKE-CK timing violated.
When DDR enters self-refresh or retention for long time(> 15seconds per testing on some boards),
DDR data corruption occured, not able to decrease CKE delay, so we have to add extra
delay on all other signals to balance it.
DDR script needs to be fine-tuned according to this hardware change.
For DDR3, since the timing margin is not good, we have to decrease the DDR frequency from
533Mhz to 400Mhz.
Compass link:
http://compass.freescale.net/livelink/livelink?func=ll&objid=235010235&objAction=browse&sort=name
Test:
Overnight tests passed on all changed boards.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Since the QSPI needs to rework on this board, at default the QSPI is disabled.
So bind the M4 QSPI boot with QSPI enabled u-boot image, set default
M4 boot to TCM. Need to use TCM m4 image at default.
Additional, on SDB there is only one QSPI flash. Considering the A7 QSPI boot
case, we have to move M4 image to 1M offset to give enough space for u-boot
and env.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The BOOTCFG value used by bmode for SABRESD eMMC boot are actually for SD card.
Fixed the value to correct one.
The issue was fixed in 2014.04 u-boot, but that patch seems missed during porting
to 2015.04.
Signed-off-by: Ye Li <ye.li@nxp.com>
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We have some vendor specific codes in board/freescale/common
which the picoimx configs also need them when Android or
Brillo configs is enabled.
So added the folder in Makefile to pass the compile.
Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
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Modify the picosom to be suit for Brillo configurations.
Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
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Imported the picosom boot codes and board
configs from technexion.
Signed-off-by: Tapani Utriainen <tapani@technexion.com>
Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
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Define CONFIG_SYS_VSNPRINTF to use snprintf, but not sprintf.
Coverity ID: 17926.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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We support max 16 endpoints, but endpoint starts from 0.
So we need to use >= 16 but not > 16 to check whether we
already reach max endpoints or not.
Coverity ID 17955:
Out-of-bounds read (OVERRUN)
37. overrun-local: Overrunning array dev->config.if_desc[ifno].ep_desc of 16
9-byte elements at element index 16 (byte offset 144) using index epno
(which evaluates to 16).
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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We should use ARRAY_SIZE, but not directly sizeof, otherwise
we may access memory that is not belong the array env_flags_varaccess_mask.
Coverity ID: 17949
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Report Coverity log:
Destination buffer too small (STRING_OVERFLOW)
string_overflow: You might overrun the 1024 byte destination string
lastcommand by writing 1025 bytes from console_buffer
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Reported by coverity ID: 17900 17902
Using uninitialized value e. Field e.flags is uninitialized when calling hsearch_r
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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The list_first_entry always assumes the list is not empty, it won't return NULL pointer when
the list is empty. So the "if (pdesc == NULL)" becomes a dead code. Fix the issue by calling
the list_empty before the list_first_entry.
(Coverity CID 29934)
Signed-off-by: Ye.Li <ye.li@nxp.com>
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Fix a read from pointer after free issue in nand error handling path,
which was found by coverity.
Signed-off-by: Han Xu <han.xu@nxp.com>
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unsigned long long data might have strange data if first bit of u8 data
was 1. this patch cast it to (unsigned long long)
ex)
u8 data8;
u64 data64;
data8 = 0x80;
data64 = (data8 << 24); // 0xffffffff80000000
data64 = (((unsigned long long)data8) << 24); // 0x80000000;
(reported by Coverity)
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
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Before calling hsearch_r, initialize callback entry to NULL.
Coverity log:
"
Uninitialized scalar variable (UNINIT)
uninit_use_in_call: Using uninitialized value e.
Field e.callback is uninitialized when calling hsearch_r.
"
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
(cherry picked from commit 5a6894397a657edec5d0cf4e20968cc66a368c51)
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Use snprintf to replace sprintf.
Coverity log:
"
Unbounded source buffer (STRING_SIZE)
string_size: Passing string init_val of unknown size to sprintf.
"
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
(cherry picked from commit 5d49b4cdf9417b88476567c8ec78ff185d84b10f)
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Whether CONFIG_SYS_HUSH_PARSER is defined or not, should always
check to free 'buff' to avoid memory leak.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
(cherry picked from commit 09a788624dbe32aeeb0d74c97c0965303eb96d8c)
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The latest iomux head file generated by tool has added some new pinmux settings. Update the
mx6ul_pins.h to this version.
Signed-off-by: Ye.Li <ye.li@nxp.com>
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Need to free memory avoid memory leak, when error.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
(cherry picked from commit c6bb23c819b5dcbc5c3491673f5e408c0b9c38b3)
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The following code will alloc memory for new_dev and ldev:
"
new_dev = mdio_alloc();
ldev = malloc(sizeof(*ldev));
"
Either new_dev or ldev is NULL, directly return, but this may leak memory.
So before return, using free(ldev) and mdio_free(new_dev) to avoid
leaking memory, also free can handle NULL pointer.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
(cherry picked from commit 746da1bd42aa5ecc47898399514c9c76d0329706)
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"enable" is unsigned char type and its value will not be
negative, so discard "enable < 0".
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 678e9316d48f78d162f705846b6f6eeab4aa5dd0)
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The entry name of mii_dev is an array not pointer, so
no need to check.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
(cherry picked from commit d39449b110c8da47bf5b8dc372bd5cd1c33a1a67)
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If condition of "(load == image_start || load == image_data)" is true,
should use "fdt_addr = load;", but not "fdt_blob = (char *)image_data;",
or fdt_blob will be overridden by "fdt_blob = map_sysmem(fdt_addr, 0);"
at the end of the switch case.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Suriyan Ramasami <suriyan.r@gmail.com>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 2ea47be02f356ff275fa5c50392ea510ddb4a96c)
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Condition "(value == NULL && ++value == NULL)" actully will
always return false.
Instead, use condition "(value == NULL || *(value + 1) == 0)" to detect
such expression "c=". To "c=", *(value + 1) is 0, so directly return -1,
but not continue.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit aa722529635c16c52d9d609122fecc96ec8d03e4)
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Before continue, check return value of strict_strtoul.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit bc3c89b1308281edceb67051a44026545dc7b505)
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Currently there is no API to uninitialize mdio. Add two APIs for this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
(cherry picked from commit cb6baca77bca0ef999203a7ed73bd123e7da062e)
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Introudce wp_enable. If want to check WPSPL, then in board code,
need to set wp_enable to 1.
Take i.MX6UL for example, to some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.
Suggested-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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There is a bad dhcp server which always gives board ipaddr 0.0.0.0,
and board can not get ipaddr from correct dhcp server, since the bad
dhcp server always reply the board's dhcp packet with bad address.
We can ignore the bad dhcp server by checking the assigned ipaddr,
checking whether it is 0 or not.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support
for decode_pll.
Reported-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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The management data input/output (MDIO) requires open-drain,
i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports
this feature. So to TO1.1, need to enable open drain by setting
bits GPR0[8:7] for TO1.1.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add mx6qarm2 new board revision support using mx6q pop SoC
Enable DRAM support for imx6q PoP SoC with populated LPDDR2
MT42L128M64D2
DDR calibration script
http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/e5c6184940486bcbc28978d60ad3cd996c205a08
Test result: Stress test passed.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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Since i.MX7D SDB revB board has some HW changes, we have modify the BSP file to support new pinmux.
1. OTG2 PWR pin is changed to GPIO1_IO07.
2. A enet2_en pin is added for isolating enet2 signals with EPDC, we also add support for enet2.
3. pin6 of 74LV output is changed for CSI PWDN. Set output to high to power down it.
This patch also tries to get the board id and apply changes according with it. Since current
RevB board does not burn GP1 fuse for board id, we have to check the TO rev instead even it is not very
exact. Will update this if any new way implemented.
Signed-off-by: Ye.Li <B37916@freescale.com>
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