summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* da850: add new config file for AM18xxNagabhushana Netagunte2011-11-10-0/+246
| | | | | | | | | | add new configuration file da850_am18xxevm.h for AM18xx boards which are based on da850 SOC. AM18xx has WINBOND spi flash which is indicated in the config file. And make appropriate changes in board.cfg for building. Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* BeagleBoard: config: Switch to ttyO2Alexander Holler2011-11-10-1/+1
| | | | | | | | | | | This is needed to support the latest kernel versions. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP3: Change omap3_evm maintainerTom Rini2011-11-10-4/+4
| | | | | | | Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* devkit8000: Fix NAND SPL on boards with 256MB NANDTom Rini2011-11-10-0/+1
| | | | | | | | | | | | | The devkit8000 ships with either a 128MB or 256MB NAND chip. In order for SPL to work with 256MB NAND CONFIG_SYS_NAND_5_ADDR_CYCLE needs to be set. After talking with Scott Wood this should be safe to set even for smaller NAND chips. Cc: Scott Wood <scottwood@freescale.com> Cc: Frederik Kriewitz <frederik@kriewitz.eu> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* integrator: enable Vpp and disable flash protectionLinus Walleij2011-11-10-0/+20
| | | | | | | | | | This enables Vpp and disables the flash protection on the Integrator when starting U-Boot. The integrator/AP has double protection mechanisms: this one and the EBI protection bit (patch earlier), the Integrator/CP has only one line of protection in these registers. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* integrator: add system controller headerLinus Walleij2011-11-10-0/+91
| | | | | | | | Break out the AP system controller and CP "CP controller" registers into a header file, it gives better overview than hardcoding its values and other disturbing practices. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* integrator: make flash writeable on bootLinus Walleij2011-11-10-0/+77
| | | | | | | | | | | | | This reconfigures the EBI (External Bus Interface) on the integrator so that chip select 1, handling the flash memory, is set to writeable. Without this it is not possible for U-Boot to access flash memory and it crashes on startup since CFI won't work properly. Since this is the first time we use the EBI, we create a header file for its registers. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* integrator: use io-accessors for board initLinus Walleij2011-11-10-4/+5
| | | | | | | Casting around to *(volatile ulong *) doesn't look good, so include the <asm/io.h> macros and use good old readl() instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* integrator: move text offset to configLinus Walleij2011-11-10-5/+2
| | | | | | | Do away with the config.mk file and move the text offset to the config files to make things easier. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* integrator: pass configs for core modulesLinus Walleij2011-11-10-8/+8
| | | | | | | | | | Alter the board.cfg to pass core module configuration flags so we can make compile-time switches for different core modules. These are already in use for some low-level code, they just got lost in the conversion to the new build system. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: remove superfluous setting of arch_number in board specific code.David Müller (ELSOFT AG)2011-11-08-3/+0
| | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch>
* SPL: Allow ARM926EJS to avoid compiling in the CPU support codeMarek Vasut2011-11-08-0/+6
| | | | | | | | | | This allows the SPL to avoid compiling in the CPU support code. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Scott Wood <scottwood@freescale.com>
* integrator: do not test first part of the memoryLinus Walleij2011-11-08-4/+15
| | | | | | | | | | | When booting from Flash, the Integrator remaps its flash memory from 0x24000000 to 0x00000000, and starts executing it at 0x00000000. This ROM thus hides the RAM underneath and first 0x40000 bytes of the memory cannot be tested by get_ram_size(). So let's test from 0x40000 to the end of detected memory instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* arm: a320: fix broken timerPo-Yu Chuang2011-11-08-84/+50
| | | | | | | | | | | | | | | | | timer.c used static data and are called before relocation. Move all static variables into global_data structure. Also cleanup timer.c from unused stubs and make it truly use 64 bit tick values. Remove reset_timer_masked() get_timer_masked() reference: arch/arm/cpu/arm926ejs/at91/timer.c Based on Reinhard Meyer <u-boot@emk-elektronik.de>'s patches 5dca710a3d7703e41da0e9894f2d71f9e25bea6b cfff263f41e32c7ba2ee9162a8cc6423eb5a8390 Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Tested-by: Macpaul Lin <macpaul@gmail.com>
* ARM: define CONFIG_MACH_TYPE for all ronetix boardsAsen Dimov2011-11-08-8/+9
| | | | | Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* dm646x: pass board revision info to kernelManjunath Hadli2011-11-08-0/+23
| | | | | | | | | add a function in board file to pass board revision info to kernel. Revision number 0 and 1 are passed in case of DM6467 and DM6467T respectively. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* dm646x: add new configuration for dm6467TManjunath Hadli2011-11-08-0/+162
| | | | | | | | | | add new configuration file for dm6467T and appropraite changes in boards.cfg. dm6467T is the new varaiant of dm6467 SOC which supports 33 MHz reference clock where as dm6467 supports 27 MHz reference clock. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Fix setting of the SDRAM configuration registerChristian Riesch2011-11-08-6/+19
| | | | | | | | | | | | | | | da850_ddr_setup() expects the BOOTUNLOCK bit to be set in If BOOTUNLOCK is not set in this define, several configuration bits will not be writeable and the code will not work. Since the BOOTUNLOCK and TIMUNLOCK bits are not configuration options but access control bits, this patch changes the code to work irrespective of the value of these bits in CONFIG_SYS_DA850_DDR2_SDBCR. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Remove the duplication of LPSC functionsChristian Riesch2011-11-08-92/+4
| | | | | | | | | | | | | | The LPSC functions defined in arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c are replaced by those already defined in arch/arm/cpu/arm926ejs/davinci/psc.c. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Rename AM1808 lowlevel functions to DA850Christian Riesch2011-11-08-82/+82
| | | | | | | | | | | | | | | Rename arch/arm/cpu/arm926ejs/davinci/am1808_lowlevel.c and arch/arm/include/asm/arch-davinci/am1808_lowlevel.h to da850_lowlevel.c and da850_lowlevel.h since they apply not only to the AM1808 SoC but to all DA850 chips. The function names and #defines are changed likewise. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* da8xxevm: fix build errorPrabhakar Lad2011-11-08-0/+1
| | | | | | | | | | | | | | | | | | This patch fixes following compile error for da8xx evm da830evm.c: In function 'board_init': da830evm.c:222: error: 'DAVINCI_SYSCFG_SUSPSRC_UART2' undeclared (first use in this function) da830evm.c:222: error: (Each undeclared identifier is reported only once da830evm.c:222: error: for each function it appears in.) make[2]: *** [da830evm.o] Error 1 similarly for da850evm. introduced through commit: f9fc237f1f07d4e5ff7c9c2da39cabc8d3d7b339 Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: re-add MACH_TYPE_XXXXXX for VCMA9 board and add CONFIG_MACH_TYPEDavid Müller (ELSOFT AG)2011-11-08-0/+4
| | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-11-08-2214/+3437
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code mpc83xx: Cleanup usage of LBC constants mpc83xx: Cleanup usage of DDR constants mpc83xx: Cleanup usage of BAT constants mpc83xx: cosmetic: vme8349.h checkpatch compliance mpc83xx: cosmetic: ve8313.h checkpatch compliance mpc83xx: cosmetic: sbc8349.h checkpatch compliance mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance mpc83xx: cosmetic: kmeter1.h checkpatch compliance mpc83xx: cosmetic: TQM834x.h checkpatch compliance mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance mpc83xx: cosmetic: MVBLM7.h checkpatch compliance mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance mpc83xx: Fix ipic structure definition powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions cosmetic, powerpc, mpc83xx: checkpatch cleanup powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c mpc83xx: fix global timer structure definition
| * powerpc/mpc83xx: Add 33.33MHz support for mpc8360emdsJerry Huang2011-11-07-10/+50
| | | | | | | | | | | | | | | | The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to support QE 500MHz since 2008. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * powerpc/mpc83xx: Add 512MB DDR support for mpc8360emdsJerry Huang2011-11-03-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new MPC8360EMDS board supports 512MB DDR since 2008. For 512MB DDR: BAT0 is used for the first 256MB memory, BAT4 is used for the second 256MB memory and the address space of SDRAM follows the DDR, so if the size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of DDR is 512MB, the BAT4 will be used for the second 256MB memory and there is no BAT for SDRAM. Therefore, if the size of DDR is 512MB, this patch will use BAT6 for SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the codes relocates to the DDR. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds codeJoe Hershberger2011-11-03-68/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring Cleanup the setting of the csnbds to respect the setting of CONFIG_SYS_DDR_SDRAM_BASE Use __ilog2 instead of writing the code to compute it Disable unused CS configs Ensure ddrlaw.bar is configured Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Cleanup usage of LBC constantsJoe Hershberger2011-11-03-406/+548
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Cleanup usage of DDR constantsJoe Hershberger2011-11-03-50/+150
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Cleanup usage of BAT constantsJoe Hershberger2011-11-03-164/+162
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: vme8349.h checkpatch complianceJoe Hershberger2011-11-03-17/+18
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: ve8313.h checkpatch complianceJoe Hershberger2011-11-03-95/+109
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: sbc8349.h checkpatch complianceJoe Hershberger2011-11-03-93/+143
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: mpc8308_p1m.h checkpatch complianceJoe Hershberger2011-11-03-15/+14
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: kmeter1.h checkpatch complianceJoe Hershberger2011-11-03-2/+2
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: TQM834x.h checkpatch complianceJoe Hershberger2011-11-03-108/+169
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: SIMPC8313.h checkpatch complianceJoe Hershberger2011-11-03-124/+164
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MVBLM7.h checkpatch complianceJoe Hershberger2011-11-03-40/+76
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC837XERDB.h checkpatch complianceJoe Hershberger2011-11-03-100/+149
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC837XEMDS.h checkpatch complianceJoe Hershberger2011-11-03-117/+166
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8360ERDK.h checkpatch complianceJoe Hershberger2011-11-03-113/+169
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8360EMDS.h checkpatch complianceJoe Hershberger2011-11-03-82/+141
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8349ITX.h checkpatch complianceJoe Hershberger2011-11-03-123/+203
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8349EMDS.h checkpatch complianceJoe Hershberger2011-11-03-117/+178
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC832XEMDS.h checkpatch complianceJoe Hershberger2011-11-03-88/+141
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8323ERDB.h checkpatch complianceJoe Hershberger2011-11-03-103/+150
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8315ERDB.h checkpatch complianceJoe Hershberger2011-11-03-108/+145
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8313ERDB.h checkpatch complianceJoe Hershberger2011-11-03-106/+142
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8308RDB.h checkpatch complianceJoe Hershberger2011-11-03-8/+8
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MERGERBOX.h checkpatch complianceJoe Hershberger2011-11-03-6/+6
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Fix ipic structure definitionJoe Hershberger2011-11-03-4/+5
| | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Added siprr_{b,c} and sepcr for completeness. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
generated by cgit v1.1 at 2024-12-18 20:32:48 +0000