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* dm: Split the simple malloc() implementation into its own fileSimon Glass2014-11-21-38/+87
| | | | | | | | | | | | | | | | | | | | The simple malloc() implementation is used when memory is tight. It provides a simple buffer with an incrementing pointer. At present the implementation is inside dlmalloc. Move it into its own file so that it is easier to find. Rather than using relocation as a signal that the full malloc() is available, add a special GD_FLG_FULL_MALLOC_INIT flag. This signals that the simple malloc() should no longer be used. In some cases, such as SPL, even the code space used by the full malloc() is wasteful. Add a CONFIG_SYS_MALLOC_SIMPLE option to provide only the simple malloc. In this case the full malloc is not available at all. It saves about 1KB of code space and about 0.5KB of data on Thumb 2. Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: tegra: Avoid using arch-specific memcpy() in SPLSimon Glass2014-11-21-0/+2
| | | | | | | The faster functions are not actually available in SPL and the code size likely isn't worth it. Use the normal memcpy() in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: serial: Support changing the baud rateSimon Glass2014-11-21-0/+67
| | | | | | | Implement this feature in the uclass so that the baudrate can be changed with 'setenv baudrate <rate>'. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: at91: Add myself as maintainer for snapper9260Simon Glass2014-11-21-1/+1
| | | | | | The old maintainer has left, so take this over. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: at91: Convert snapper9260 to use driver modelSimon Glass2014-11-21-3/+24
| | | | | | | | | Convert this at91sam9260-based board to use driver model. This should serve as an example for other similar boards. Serial and GPIO are supported so far. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* dm: at91: Add driver model support for the serial driverSimon Glass2014-11-21-0/+99
| | | | | | | | Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: at91: Refactor serial driver slightly for driver modelSimon Glass2014-11-21-9/+23
| | | | | | | | Before adding driver model support, split out a few of the functions so that they can be used by the driver model code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* dm: at91: Add platform data for GPIO on at91sam9260-based boardsSimon Glass2014-11-21-1/+17
| | | | | | | | These boards all have the same GPIO arrangement, so add some common platform data that can be used by all boards. Remove the configs which are no longer required. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: at91: Add driver model support for atmel GPIO driverSimon Glass2014-11-21-54/+193
| | | | | | | Modify this driver to support driver model, with platform data required to determine the GPIOs that it controls. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: at91: Move snapper9260 to generic baordSimon Glass2014-11-21-0/+1
| | | | | | This works correctly, so switch it over before the deadline. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: at91: Correct text base for snapper9260Simon Glass2014-11-21-1/+1
| | | | | | The value should be 0x21f00000. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-ubiTom Rini2014-11-19-0/+9
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| * ubi: enable error reporting in initializationAndrew Ruder2014-11-19-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The UBI layer will disable much of its error reporting when it is compiled into the linux kernel to avoid stopping boot. We want this error reporting in U-Boot since we don't initialize the UBI layer until it is used and want the error reporting. We force this by telling the UBI layer we are building as a module. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Kyungmin Park <kmpark@infradead.org>
| * mtd, cfi, ubi: add missing writebufsize initializationHeiko Schocher2014-11-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | ff94bc40af3481d47546595ba73c136de6af6929 "mtd, ubi, ubifs: resync with Linux-3.14" introduced the writebufsize field in struct mtd_info, which is not initialized in the cfi_flash driver, which leads in not working ubi on cfi flashes. Fix it Signed-off-by: Heiko Schocher <hs@denx.de> Reported-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2014-11-19-424/+350
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| * | blackfin: convert to use CONFIG_SYS_I2C frameworkScott Jiang2014-11-17-165/+83
| | | | | | | | | | | | Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
| * | adi_i2c: convert to use general io accessors.Scott Jiang2014-11-17-68/+77
| | | | | | | | | | | | Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
| * | blackfin: rename bfin-twi_i2c driver to adi_i2cScott Jiang2014-11-17-26/+25
| | | | | | | | | | | | Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini2014-11-19-0/+19
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| * | | powerpc: mpc52xx: Clear GD in the main U-Boot stage for SPL usageStefan Roese2014-11-19-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an MPC5200 based board is used with SPL support, the main U-Boot needs to clear the GD (global data) struct again. Otherwise the generic board init code in board_init_f (when CONFIG_SYS_GENERIC_BOARD is defined) will not initialize all GD variables correctly. Resulting in a hangup on the a4m2k board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * | | powerpc: mpc52xx: a3m071/a4m2k: Convert to generic boardStefan Roese2014-11-19-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a3m071 and a4m2k share one config header. So adding the generic board defines in this one file is enough to convert both boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * | | powerpc: mpc52xx: a4m072: Convert to generic boardStefan Roese2014-11-19-0/+2
| | |/ | |/| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* | | mpc83xx: Add gdsys hrcon boardDirk Eibach2014-11-19-195/+2282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gdsys hrcon board is based on a Freescale MPC8308 SOC. It boots from NOR-Flash, kernel and rootfs are stored on SD-Card. On board peripherals include: - 1x GbE (optional) - Lattice ECP3 FPGA connected via eLBC and PCIe Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | | board: iocon: Fix uninitialized accessDirk Eibach2014-11-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Wolfgang Denk found this issue using cppcheck: (error) Uninitialized variable: fpga_features Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | | board: iocon: Fix fpga index in print_fpga_info()Dirk Eibach2014-11-19-4/+4
| | | | | | | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | | board: dlvision-10g: Compile fixDirk Eibach2014-11-19-4/+3
| | | | | | | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | | common: Fix cmd_fpgad addressingDirk Eibach2014-11-19-8/+24
| | | | | | | | | | | | | | | | | | | | | Addressing was completely broken for cmd_fpgad. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | | mtd: Handle 29LV800BTDirk Eibach2014-11-19-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | The device id makes u-boot think that this chip needs cfi_reverse_geometry(), which is not the case. Add it to jedec_flash, so it is handled properly. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | | board: dlvision: Reduce memory footprintDirk Eibach2014-11-19-1/+8
|/ / | | | | | | | | | | | | | | Tune dlvision configuration similar to other gdsys boards to reduce memory footprint. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | ARM: atmel: add sama5d4 xplained ultra board supportBo Shen2014-11-17-0/+583
| | | | | | | | | | | | | | | | | | | | | | The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display (optional, disabled by default) - Support ethernet - Support USB mass storage Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: atmel: add sama5d4ek board supportBo Shen2014-11-17-9/+868
| | | | | | | | | | | | | | | | | | | | | | The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display - Support ethernet - Support USB mass storage Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | net: macb: enable GMAC IP without GE feature supportBo Shen2014-11-17-1/+7
| | | | | | | | | | | | | | | | | | | | The User Register in GMAC IP is used to select interface type. When with GE feature, it is used to select interface between RGMII and GMII. If without GE feature, it is used to select interface between MII and RMII. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mtd: atmel_nand: runtime to build gf table for pmeccJosh Wu2014-11-17-1/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As in SAMA5D4 SoC, the gf table in ROM code can not be seen. So, when we try to use PMECC, we need to build it when do initialization. Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it is defined we will build gf table runtime. The PMECC use the BCH algorithm, so based on the build_gf_tables() function in lib/bch.c, we can build the Galois Field lookup table. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, spl, at91: add spl support for the corvus boardHeiko Schocher2014-11-17-18/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91, spl: add spl support for the taurus boardHeiko Schocher2014-11-17-13/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, spl, at91: add at91sam9260 and at91sam9g45 spl supportHeiko Schocher2014-11-17-97/+430
| | | | | | | | | | | | | | | | | | | | | | add support for using spl code on at91sam9260 and at91sam9g45 based boards. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [adopt Bo's change in spl.c] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | spl, mtd, nand, atmel_nand: invert device ready pin logicHeiko Schocher2014-11-17-3/+3
| | | | | | | | | | | | | | | | | | | | | | device ready pin is signalling that the device is ready on state 1 not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.c Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | spl, nand, atmel_nand: add erase one block functionHeiko Schocher2014-11-17-0/+34
| | | | | | | | | | | | | | | | | | | | | | erase one nand block in spl code. keep it simple, as size matters This is used on the upcoming taurus spl support. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mtd: atmel_nand: add missing includeHeiko Schocher2014-11-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | using this driver in SPL code with CONFIG_SPL_NAND_ECC configured leads in an compileerror. Fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> [fix subject] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | spl, nand: add option to boot raw u-boot.bin image onlyHeiko Schocher2014-11-17-5/+28
| | | | | | | | | | | | | | | | | | | | | | enable to boot only a raw u-boot.bin image from nand with the CONFIG_SPL_NAND_RAW_ONLY define. This option saves space on boards where spl space is low. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE defineHeiko Schocher2014-11-17-0/+1
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45Heiko Schocher2014-11-17-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | - compile mpddrc ram init code also for AT91SAM9M10G45 based boards. - in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED in the cr configuration Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91, mpddrc: fix typo in ddr2_init()Heiko Schocher2014-11-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | use the configure value for computing the ba_off value not the value from the cr register. This leaded in a wrong ram configuration on the upcoming corvus spl board support. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91: add spi dataflash support for the taurus boardHeiko Schocher2014-11-17-0/+28
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | spi, atmel: move CONFIG_SYS_SPI_WRITE_TOUT into common headerHeiko Schocher2014-11-17-13/+4
| | | | | | | | | | | | | | | | | | | | | | | | move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h and define a default value. Delete this define in the board config files, where it is possible (all boards use currently the same value). Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91: generate boot.bin file for all atmel SoCHeiko Schocher2014-11-17-3/+5
| | | | | | | | | | | | | | | | | | | | generate the boot.bin file for all atmel SoC (arm920, arm926, armv7) Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> [fix subject] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: atmel: spl: make css field configurableBo Shen2014-11-17-2/+4
| | | | | | | | | | | | | | | | | | The clock source for master clock can be slow clock, main clock, plla clock or upll clock. So, make the clock source selection field in mckr can be configured. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: atmel: spl: make initialization more stableBo Shen2014-11-17-0/+4
| | | | | | | | | | | | | | | | We need to make sure the main clock ready field in MCFR is set after switch to main crystal oscillator. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: at91 series: convert to generic boardBo Shen2014-11-17-0/+6
| | | | | | | | | | | | Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | net: macb: write mac address when initializationBo Shen2014-11-17-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When boot up without mac address setting, it will give the warning message like: "Warning: failed to set MAC address", however when execute network related command, it still execute them without any warning information. With this patch, it will exit directly with following information: "gmac0: mac address is not valid" It also solve the problem after bootup then set mac address and the mac address won't set to net device issue. Signed-off-by: Bo Shen <voice.shen@atmel.com> Tested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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