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* spi flash: fix crash due to spi flash miscommunicationBrad Bozarth2009-01-24-2/+4
| | | | | | | | | | | Higher spi flash layers expect to be given back a pointer that was malloced so that it can free the result, but the lower layers return a pointer that is in the middle of the malloced memory. Reorder the members of the lower spi structures so that things work out. Signed-off-by: Brad Bozarth <bflinux@yumbrad.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* FPU POST: fix warnings when building with 2.18 binutilsYuri Tikhonov2009-01-24-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compile u-boot with the 2.18 binutils the following warning messages for each object file in post/lib_ppc/fpu/ is produced at the linking stage: post/libpost.a(acc1.o) uses hard float, u-boot uses soft-float ... This is because of the fact that, in general, the soft-float and hard-float ABIs are incompatible; the 2.18 binutils do checking of the Tag_GNU_Power_ABI_FP attribute of the files to be linked, and produce the worning like above if these are not compatible. The incompatibility of ABIs is concerned only the float values: e.g. the soft-float ABI assumes the float argument passing in the pair of rX registers, and the hard-float ABI assumes passing of the float argument in the fX register. When we don't pass the float arguments between the functions compiled with different floatness, then such an application will work correctly. This is the case for the FPU POST: u-boot (compiled with soft-float) doesn't pass to (and doesn't get from) the FPU POST functions any floats; there are no functions exported from the post/lib_ppc/fpu/ objects which would work with float parameters/returns too. So, we can reassure the linker not to worry about the difference in ABI attributes of linking files just by setting the 'soft-float' attribute for the objects in post/lib_ppc/fpu. And this patch does this. Also, to avoid passing both soft- and hard-float options in CFLAGS when compiling the files from post/lib_ppc/fpu (which is OK, but looks rather dirty) this patch removes the soft-float string from CFLAGS in post/lib_ppc/fpu/Makefile. Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
* Add support for Maxim's DS4510 I2C devicePeter Tyser2009-01-24-0/+504
| | | | | | | | | | | | | Initial support for the DS4510, a CPU supervisor with integrated EEPROM, SRAM, and 4 programmable non-volatile GPIO pins. The CONFIG_DS4510 define enables support for the device while the CONFIG_CMD_DS4510 define enables the ds4510 command. The additional CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and CONFIG_DS4510_RST defines add additional sub-commands to the ds4510 command when defined. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* common: Iteration limit for memory test.Dirk Eibach2009-01-24-14/+31
| | | | | | | | | The iteration limit is passed to mtest as a fourth parameter: [start [end [pattern [iterations]]]] If no fourth parameter is supplied, there is no iteration limit and the test will loop forever. Signed-off-by: Dirk Eibach <eibach@gdsys.de>
* serial: Rename driver vcth to vct to support other board variantsStefan Roese2009-01-24-3/+7
| | | | | | | | | | | Moved driver vcth.c to vct.c to better reflect the VCT board series. This driver is now used by the VCT platforms: vct_premium vct_platinum vct_platinumsvc Signed-off-by: Stefan Roese <sr@denx.de>
* nios: Move README.nios_CONFIG_SYS_NIOS_CPU to doc/ dirShinya Kuribayashi2009-01-24-0/+0
| | | | Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* common/main: support bootdelay=0 for CONFIG_AUTOBOOT_KEYEDPeter Korsgaard2009-01-24-13/+14
| | | | | | | | | | | Support bootdelay=0 in abortboot for the CONFIG_AUTOBOOT_KEYED case similar to the CONFIG_ZERO_BOOTDELAY_CHECK support for the !CONFIG_AUTOBOOT_KEYED case. Do this by reversing the loop so we do at least one iteration before checking for timeout. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
* Added legacy flash ST Micro M29W040BNiklaus Giger2009-01-24-0/+14
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* Fixed off-by-one errors in lib_m68k/interrupts.cGraeme Russ2009-01-24-2/+2
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Removed all references to CONFIG_SYS_RESET_GENERICGraeme Russ2009-01-24-3/+0
| | | | | | Generic i386 reset - #define made redundant by weak function Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Remove #ifdef CONFIG_SC520 in source codeGraeme Russ2009-01-24-4/+0
| | | | | | CONFIG_SC520 is now used for conditional compile Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Added MMCR reset functionalityGraeme Russ2009-01-24-0/+10
| | | | | | | | | | | | | | | | Reset function specific to AMD SC520 microcontroller - Is more of a 'hard reset' that the triple fault. Requires CONFIG_SYS_RESET_SC520 to be defined in config I would have liked to add this to a new file (cpu/i386/sc520/reset.c) but ld requires that a object file in a library arhive MUST contain at least one function which does not override a weak function (and is called from outside the object file) in order for that object file to be extracted from the archive. This would be the only function on the new file, and hence, will never get linked in. Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Moved generic (triple fault) reset codeGraeme Russ2009-01-24-16/+17
| | | | | | | | | | | | Moved from interrupts.c to cpu.c and made into a weak function to allow vendor specific override Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be added to the vendor specific code without the need to remember to #undef usage of the generic method and if you forget to include your custom reset method, you will always get the default. Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Moved definition of set_vector() to new header fileGraeme Russ2009-01-24-1/+31
| | | | | | | This allows for future tidy ups and functionality that will require set_vector () Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Moved sc520 specific code into new cpu/i386/sc520 folderGraeme Russ2009-01-24-4/+4
| | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* Renamed cpu/i386/reset.S to resetvec.SGraeme Russ2009-01-24-12/+12
| | | | | | | Brings i386 in line with other CPUs with a reset vector and frees up reset.c for CPU reset functions Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* Makefile: keep lists sorted.Wolfgang Denk2009-01-24-3/+3
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Added initial eNET board supportGraeme Russ2009-01-24-0/+766
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* POWERPC 82xx: add the SCC as an HDLC controllerGary Jennejohn2009-01-24-0/+28
| | | | | | Right now this is only used by keymile. Signed-off-by: Gary Jennejohn <garyj@denx.de>
* powerpc, keymile boards: extract identical config optionsHeiko Schocher2009-01-24-216/+120
| | | | | | | | This patch extracts the identical config options for the keymile boards mgcoge, mgsuvd and kmeter1 in a new common config file keymile-common.h. Signed-off-by: Heiko Schocher <hs@denx.de>
* powerpc: keymile: Add a check for the PIGGY debug boardHeiko Schocher2009-01-24-10/+92
| | | | | | | | | Check the presence of the PIGGY on the keymile boards mgcoge, mgsuvd and kmeter1. If the PIGGY is not present, dont register this Ethernet device. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Ben Warren <biggerbadderben@gmail.com>
* powerpc: 83xx: add support for the kmeter1 boardHeiko Schocher2009-01-24-0/+847
| | | | | | | | | | | | | This patch adds support for the kmeter1 board from Keymile, based on a Freescale MPC8360 CPU. - serial console on UART 1 - 256 MB DDR2 RAM - 64 MB NOR Flash - Ethernet RMII Mode over UCC4 - PHY SMSC LAN8700 Signed-off-by: Heiko Schocher <hs@denx.de>
* Add a do_div() wrapper macro, lldiv().Sergei Poselenov2009-01-24-0/+10
| | | | | | | | Add a do_div() wrapper, lldiv(). The new inline function doesn't modify the dividend and returns the result of division, so it is useful in complex expressions, i.e. "return(a/b)" -> "return(lldiv(a,b))" Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
* Blackfin: use common strmhz() in system outputMike Frysinger2009-01-23-6/+10
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2009-01-23-469/+1091
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| * nand: fixup printf modifiers to match types usedMike Frysinger2009-01-23-8/+8
| | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand read.jffs2 (nand_legacy) in common/cmd_nand.cSchlaegl Manfred jun2009-01-23-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | Error with CONFIG_NAND_LEGACY in common/cmd_nand.c: With current code "nand read.jffs2s" (read and skip bad blocks) is always interpreted as "nand read.jffs2" (read and fill bad blocks with 0xff). This is because ".jffs2" is tested before ".jffs2s" and only the first two characters are compared. Correction: Test for ".jffs2s" first and compare the first 7 characters. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPSWolfgang Grandegger2009-01-23-77/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * NAND: Fix cache and memory inconsistency issueDave Liu2009-01-23-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We load the secondary stage u-boot image from NAND to system memory by nand_load, but we did not flush d-cache to memory, nor invalidate i-cache before we jump to RAM. When the system has cache enabled and the TLB/page attribute of system memory is cacheable, it will cause issues. - 83xx family is using the d-cache lock, so all of d-cache access is cache-inhibited. so you can't see the issue. - 85xx family is using d-cache, i-cache enable, partial cache lock. you will see the issue. This patch fixes the cache issue. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * NAND: Enable nand lock, unlock featureNishanth Menon2009-01-23-83/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable nand lock, unlock and status of lock feature. Not every device and platform requires this, hence, it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK Nand unlock and status operate on block boundary instead of page boundary. Details in: http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT Intial solution provided by Vikram Pandita <vikram.pandita@ti.com> Includes preliminary suggestions from Scott Wood Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * NAND: move board_nand_init to nand.hMike Frysinger2009-01-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | Rather than putting the function prototype for board_nand_init() in the one place where it gets called, put it into nand.h so that every place that also defines it gets the prototype. Otherwise, errors can go silently unnoticed such as using the wrong return value (void rather than int) when defining the function. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * OneNAND: Additional sync with 2.6.27Stefan Roese2009-01-23-1/+72
| | | | | | | | | | | | | | | | | | | | | | | | - Add subpage write support - Add onenand_oob_64/32 ecclayout This has been missing and without it UBI has some incompatibilies issues with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is placed differently (2048 instead of 512) without this fix. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * Add markbad functionKyungmin Park2009-01-23-0/+33
| | | | | | | | | | | | | | Add missing markbad function If not, it's hang when it entered the mtd->mark_bad(). Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * OneNAND: Bad block aware read/write command supportStefan Roese2009-01-23-110/+420
| | | | | | | | | | | | | | | | | | Update OneNAND command to support bad block awareness. Also change the OneNAND command style to better match the NAND version. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
| * OneNAND: Save version_id in onenand_chip structStefan Roese2009-01-23-0/+1
| | | | | | | | | | | | | | | | The version (ver_id) was not stored in the onenand_chip structure and because of this the continuous locking scheme could be enabled on some chips. Signed-off-by: Stefan Roese <sr@denx.de>
| * OneNAND: Fix compiler warningsStefan Roese2009-01-23-0/+26
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * mpc83xx: enable eLBC NAND support for MPC8315ERDB boardDave Liu2009-01-23-5/+7
| | | | | | | | Signed-off-by: Dave Liu <daveliu@freescale.com>
| * Sync with 2.6.27Kyungmin Park2009-01-23-179/+406
| | | | | | | | | | | | Sync with OneNAND kernel codes Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-microblazeWolfgang Denk2009-01-23-64/+121
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| * microblaze: Use cache functions (especially cache status)Michal Simek2009-01-23-6/+0
| | | | | | | | in systems which are configured without flash
| * microblaze: Add cache flushMichal Simek2009-01-23-3/+32
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| * microblaze: Add bootup messages to board.cMichal Simek2009-01-23-2/+31
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| * microblaze: Change microblaze-generic config fileMichal Simek2009-01-23-47/+54
| | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Rename ml401 to microblaze-genericMichal Simek2009-01-23-9/+7
| | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* | Merge branch 'fixes'Haavard Skinnemoen2009-01-22-7/+2
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| * avr32: Remove second definition of virt_to_phys()Haavard Skinnemoen2008-12-17-7/+2
| | | | | | | | | | | | | | | | | | | | The second definition introduced by 65e43a1063 conflicts with the existing one. Also, convert the existing definition to use phys_addr_t. The volatile qualifier is still needed due to brain damage elsewhere. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | Prepare v2009.01v2009.01Wolfgang Denk2009-01-21-1/+11
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Prepare 2009.01-rc3v2009.01-rc3Wolfgang Denk2009-01-18-1/+177
| | | | | | | | | | | | Update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2009-01-18-1/+1
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| * | fdt_resize(): fix actualsize calculations with unaligned blobsPeter Korsgaard2009-01-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in fdt_resize() to extend the fdt size to end on a page boundary is wrong for fdt's not located at an address aligned on a page boundary. What's even worse, the code would make actualsize shrink rather than grow if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(), causing fdt_add_mem_rsv to fail. Fix it by aligning end address (blob + size) to a page boundary instead. For aligned fdt's this is equivalent to what we had before. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
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