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* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-08-29-205/+6001
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| * mx6sxsabresd: Add Ethernet supportFabio Estevam2014-08-20-0/+144
| | | | | | | | | | | | | | | | mx6sxsabresd board has 2 FEC ports, each one connected to a AR8031. Add support for one FEC port initially. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6sx: Adjust enable_fec_anatop_clock() for mx6soloxFabio Estevam2014-08-20-0/+21
| | | | | | | | | | | | Configure and enable the ethernet clock for mx6solox. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6sxsabresd: Convert to the new Kconfig styleFabio Estevam2014-08-20-0/+36
| | | | | | | | | | | | | | mx6sxsabresd was not in the master branch when the conversion to the new Kconfig style happened, so convert it now so that it can build again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * imx: ventana: add econfig commandTim Harvey2014-08-20-86/+198
| | | | | | | | | | | | | | | | | | | | | | | | The Gateworks Ventana EEPROM contains a set of configuration bits that affect the removal of device-tree nodes that support peripherals that do not exist on sub-loaded boards. This patch adds: - a structure to define a config bit name, dt node alias, bit position - an array of supported configuration items - an econfig command to get/set/list configuration bits - use of the array when adjusting the FDT prior to boot Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: leave PCI reset de-asserted if PCI enabledTim Harvey2014-08-20-5/+3
| | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: add iomux for PCISKT_WDIS# gpioTim Harvey2014-08-20-0/+17
| | | | | | | | | | | | | | The PCISKT_WDIS# gpio allows for asserting WDIS# going to the various PCIe sockets on the Ventana board. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: enable SION bit on gpio outputsTim Harvey2014-08-20-63/+70
| | | | | | | | | | | | | | Enable the SION bit on gpio outputs that we wish to be able to read the value of. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: configure i2c_dis# pin properly for gw53xxTim Harvey2014-08-20-2/+2
| | | | | | | | | | | | | | | | The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was added to the GW53xx on revB PCB's). Additionally, remove the duplicate config for GW54xx. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: add missing crlf to printTim Harvey2014-08-20-1/+1
| | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: add video enable gpio pinmux for GW54xxTim Harvey2014-08-20-0/+2
| | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: add appropriate delay following GSC i2c writeTim Harvey2014-08-20-1/+1
| | | | | | | | | | | | | | The Gateworks System Controller EEPROM config is flash based. Add a delay following writes to avoid errors on back-to-back writes. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: remove caam disable per eeprom bitTim Harvey2014-08-20-1/+1
| | | | | | | | | | | | | | During manufacturing this bit is not getting enabled when it should be, so we will ignore it. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: set dynamic env var for flash layoutTim Harvey2014-08-20-0/+4
| | | | | | | | | | | | | | | | | | | | | | NAND devices have differing layouts with respect to page size and pages per block. These parameters affect the parameters that need to be passed to mkfs.ubifs and ubinize used to create UBI images. The various NAND chips supported by Gateworks Ventana fall into two different layouts which we refer to as 'normal' and 'large'. This layout is useful when referencing ubi files to download and flash so we create a dynamic env variable for it. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * mx6sxsabresd: Update DDR initializationFabio Estevam2014-08-20-31/+58
| | | | | | | | | | | | | | | | Use the latest DDR initialization values suggested by the FSL hardware team. While at it, add some comments for clarification. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * pci: mx6: fix occasional link failuresTim Harvey2014-08-20-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable for SS function) must remain deasserted until the reference clock is running at the appropriate frequency. Without this patch we find a high link failure rate (>5%) on certain IMX6 boards at various temperatures. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * ARM: mx6: Enable Thumb build for SPLMarek Vasut2014-08-20-0/+1
| | | | | | | | | | | | | | | | | | Building the SPL in Thumb mode saves roughly 30% in size of the resulting SPL binary. As the size of SPL it limited on the MX6, this helps a lot. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
| * ARM: mx6: Handle the MMDCx_MDCTL COL field capricesMarek Vasut2014-08-20-1/+7
| | | | | | | | | | | | | | | | | | The COL field value cannot be easily calculated from the desired column number. Instead, there are special cases for that, see the datasheet, MMDCx_MDCTL field description, field COL . Cater for those special cases. Signed-off-by: Marek Vasut <marex@denx.de>
| * ARM: mx6: Prevent overflow in DRAM size detectionMarek Vasut2014-08-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | The MX6 DRAM controller can be configured to handle 4GiB of DRAM, but only 3840 MiB of that can be really used. In case the controller is configured to operate a 4GiB module, the imx_ddr_size() function will correctly compute that there is 4GiB of DRAM in the system. Firstly, the return value is 32-bit, so the function will effectively return zero. Secondly, the MX6 cannot address the full 4GiB, but only 3840MiB of all that. Thus, clamp the returned size to 3840MiB in such case. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
| * ARM: mx5: Fix CHSCCDR nameMarek Vasut2014-08-20-1/+1
| | | | | | | | | | | | Fix the name of the CCM CHSCCDR register. Signed-off-by: Marek Vasut <marex@denx.de>
| * mx31pdk: Change maintainerFabio Estevam2014-08-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | Currently I don't have access to a mx31pdk board. Magnus was the original maintainer of the board and accepted to take back this role. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Magnus Lilja <lilja.magnus@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * mx6: add support of multi-processor commandGabriel Huau2014-08-20-4/+114
| | | | | | | | | | | | | | | | | | This allows u-boot to load different OS or Bare Metal application on different cores of the i.MX6 SoC. For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1. Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Stefano Babic <sbabic@denx.de>
| * embest/mx6boards: only toggle eMMC usdhc3 RST line on MarSboardIain Paton2014-08-13-0/+1
| | | | | | | | | | | | | | | | | | On MarS usdhc3 is eMMC, on RIoT usdhc3 is uSD and eMMC is usdhc4. Don't run the MarS specific eMMC reset code on usdhc3 when board_type == BOARD_IS_RIOTBOARD Signed-off-by: Iain Paton <ipaton0@gmail.com>
| * Update aristainetos board to KconfigStefano Babic2014-08-13-0/+32
| | | | | | | | | | | | | | | | | | | | aristainetos board was merged in u-boot-imx before Kconfig was integrated, but it is not yet mainline. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
| * Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-11-2924/+50912
| |\ | | | | | | | | | | | | | | | | | | Conflicts: boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | i.MX31 PDK: Enable generic board for i.MX31 PDKMagnus Lilja2014-08-08-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for the i.MX31 PDK board. Tested on actual hardware. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | pmic: pmic_pfuze100: Use a shorter name for PMIC nameFabio Estevam2014-08-08-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is redundant to use 'PFUZE100_PMIC' as the PMIC name because we already know it is a PMIC. Call it simply 'PFUZE100' instead. Cc: Tim Harvey <tharvey@gateworks.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6: crm_regs: Fix MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADEDFabio Estevam2014-08-08-1/+1
| | | | | | | | | | | | | | | | | | | | | According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of register CCM_CIMR corresponds to bit 19 so fix its definition accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6: crm_regs: Fix MXC_CCM_CLPCR_WB_PER_AT_LPM definitionFabio Estevam2014-08-08-1/+1
| | | | | | | | | | | | | | | | | | | | | According to the Reference Manual the 'wb_per_at_lpm' field of register CCM_CLPCR corresponds to bit 16 so fix its definition accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6: crm_regs: Fix CDCDR_SPDIF0_CLK_PODF mask and offsetFabio Estevam2014-08-08-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | According to the Reference Manual the 'spdif0_clk_podf' field of register CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset definitions accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | mx6: imx-regs: Remove unused 'omux' field from iomux structFabio Estevam2014-08-08-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'omux' field is not used anywhere and such layout is not valid for mx6solox. Instead of adding more ifdef's into the structure, let's simply remove this unused 'omux' field. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | arm: m53evk: Fix RTC bus numberMarek Vasut2014-08-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | A previous update to the I2C stack introduced a typo in the configuration option. Fix the typo and therefore allow the RTC to work correctly with the 'date' command again. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-08-3147/+8923
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| * | | Add TQ Systems TQMa6 board supportMarkus Niebel2014-07-23-0/+1458
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the changes to boards.cfg and the board directory under board/tqc. TQMa6 is a family of modules based on Freescale i.MX6. It consists of TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3 TQMa6S (i.MX6 Solo) featuring eMMC and 512 MiB DDR3 The modules need a baseboard. Initially the MBa6x starterkit mainboard is supported. To easy support for other mainboards the functionality is splitted in one file for the module (tqma6.c) and one file for the baseboard (tqma6_ mba6). The modules can be boot from eMMC (on USDHC3) and SPI flash. The following features are supported: - MMC: eMMC on module (on USDHC3) and SD-card (on MBa6x mainboard) - Ethernet: RGMII using micrel KSZ9031 phy on MBa6x mainboard for TQMa6<x> module. The phy needs special configurations for the pad skew registers to adjust for the signal routing. Also support for standard ethernet commands and uppdate via tftp. - SPI: ECSPI1 with bootable serial flash on module and two additional chip selects on MBa6x - I2C: This patch adds support for the I2C busses on the TQMa6<x> modules (I2C3) and MBa6x baseboards (I2C1). The LM75 temperature sensors on TQMa6<x> and MBa6x are also configured. - USB: high speed host 1 on MBa6x and support for USB storage - PMIC: support for pfuze 100 on TQMa6<x> Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
| * | | arm, imx6: add aristainetos boardHeiko Schocher2014-07-23-0/+1042
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU: Freescale i.MX6DL rev1.1 at 792 MHz Board: aristaitenos I2C: ready DRAM: 1 GiB NAND: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB Display: lb07wv8 (800x480) - UART5 is console - MMC 0 and 1 - USB 0 and 1 - boot from mmc0 and spi nor flash - Splash screen support Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | | spi: add config option to enable the WP pin function on st micron flashesHeiko Schocher2014-07-23-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable the W#/Vpp signal to disable writing to the status register on ST MICRON flashes like the N25Q128 thorugh the new config option CONFIG_SYS_SPI_ST_ENABLE_WP_PIN Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | i.MX6: add enable_spi_clk()Heiko Schocher2014-07-23-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add enable_spi_clk(), so board code can enable spi clocks. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de>
| * | | pwm, imx6: add support for pwm modul on imx6Heiko Schocher2014-07-23-0/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add basic support for the pwm modul found on imx6. Pieces of this code are based on linux code from drivers/pwm/pwm-imx.c Commit "cd3de83f1476 Linux 3.16-rc4" Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * | | i.MX6: define struct pwm_regs and PWMCR_* definesHeiko Schocher2014-07-23-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | add defines for pwm modul found on imx6. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | | imx6: add gpr2 usb_otg_id iomux select control defineHeiko Schocher2014-07-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add IOMUXC_GPR1_USB_OTG_ID_OFFSET and IOMUXC_GPR1_USB_OTG_ID_SEL_MASK define for the USB_OTG_ID_SEL bit. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | arm: mxs: Scrub useless ifdefMarek Vasut2014-07-23-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a result of 0defddc851edfc34bcf3c3379fe74b11dc01a493 , which did a consolidation of the prompt string, this ifdef became empty. Remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Stefano Babic <sbabic@denx.de>
| * | | mx6: Adjust the GPR offset for mx6soloxFabio Estevam2014-07-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On mx6solox there is an additional 0x4000 offset for the GPR registers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mx6: Remove duplication of iomuxc structureFabio Estevam2014-07-23-19/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to keep iomuxc_base_regs structure as it serves the exact same purpose of the iomuxc structure, which is to provide access to the GPR registers. The additional fields of iomuxc_base_regs are not used. Other advantage of 'iomuxc' is that it has a shorter name and the variable declarations can fit into a single line. So remove iomuxc_base_regs structure and use iomuxc instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mx6sxsabresd: Add PFUZE100 PMIC supportFabio Estevam2014-07-23-0/+97
| | | | | | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6: soc: Do not apply the PFD erratum for mx6soloxFabio Estevam2014-07-23-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | The PFD issue is not present on mx6solox, so skip it in this case. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | embestmx6boards: convert to generic boardIain Paton2014-07-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD to remove warning on boot. Signed-off-by: Iain Paton <ipaton0@gmail.com>
| * | | Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2014-07-16-41097/+19467
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> Conflicts: boards.cfg
| * | | | mx6sx: Add initial support for mx6sxsabresd boardFabio Estevam2014-07-10-0/+393
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | | mx6: clock: Do not enable sata and ipu clocksFabio Estevam2014-07-10-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx6sx does not have sata nor ipu blocks, so do not handle such clocks. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | | mx6sx: Add pin definitionsFabio Estevam2014-07-10-0/+1677
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the pin definitions for mx6sx. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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