| Commit message (Collapse) | Author | Age | Lines |
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CONFIG_MII_GASKET is not defined anywhere, so remove it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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If in case this is valid according to the latest datasheet, ignore this patch.
Acked-by: Marek Vasut <marex@denx.de>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
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Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
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The macro mistakenly referred to 32bit struct instead of 8bit one.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
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There is no .S file in this directory, so just remove SOBJS.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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There is no .S file in this directory, so just remove SOBJS.
Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
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SATA_ALT_REF_CLK field corresponds to bits 1 and 2 of offset 0x180c.
Fix the mask for these bits.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Original code was assuming that the fuse revision version for all mx53loco boards
based on Dialog PMIC was the same, which is not the case.
Force the revision of all Dialog-based boards to 0.
This fixes a kernel crash when PMIC is accessed in the 2.6.35 kernel
for Dialog rev E boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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If one PAD does not have mux or pad config register, we need
set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct
Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
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Use the pinmux configuration function for SMDK5250.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch performs the pinmux configuration in a common file.
As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
supported.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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In the MAX8997, LDO regulators needs to preserve previously set voltage
values.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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panel_info data structure is gloable variable, so, I have initialized it
in board file. If it is initialized in init_panel_info() like existing,
it can't be used in drv_lcd_init() in common/lcd.c because
init_panel_info() is called after drv_lcd_init().
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Since Exynos architecture have new SoCs,
need to fix cpuinfo correctly.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Chander Kashyap <chander.kashyap@linaro.org>
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Buffer the PCB revision to avoid multiple eeprom accesses
for the same data and print it as a part of board information.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tom Rini <trini@ti.com>
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Legacy eeprom layout represents the revision number syntactically
(i.e. revision 1.00 is written as 0x100). This is inconsistent with
the representation in newer layouts, where it is defined semantically
(i.e. 0x64).
This patch fixes the issue by replacing the syntactic representation
with the semantic one.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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Non-legacy layouts have an extended revision field,
but only the first 2 bytes are the PCB revision.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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Reduce the environment size (128KB => 16KB) to improve the environment
operations time (e.g. reading, ecc calculation).
Also, remove the unused CONFIG_SYS_ENV_SECT_SIZE.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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To meet certain timing requirements on the lpddr2 cmd and data phy
interfaces ,lpddr iopads have to be configured as differential buffers
and a Vref has to be internally generated and provided to these buffers.
Correcting the above settings here.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
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Change voltages for OMAP5432
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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No need to Unlock DPLL initially.
DDR3 can work at normal OPP from initialozation
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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In OMAP5432 EMIF controlller supports DDR3 device.
This patch adds support for ddr3 device intialization and configuration.
Initialization sequence is done as specified in JEDEC specs.
This also adds support for ddr3 leveling.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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Adding precalculated timings for ddr3 with 1cs
adding required registers for ddr3
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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This patch adds the IO settings required for OMAP5432 uevm's DDR3 pads
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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This patch adds chip detection for OMAP5432
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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Control id code for omap5430 ES1.0 is hard coded with a wrong value.
This patch corrects the value
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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Signed-off-by: Tom Rini <trini@ti.com>
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Signed-off-by: Tom Rini <trini@ti.com>
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We reduce the bootdelay from 10s to 3s to give users a short but usable
window to interrupt the boot process if needed.
Signed-off-by: Tom Rini <trini@ti.com>
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We change the bootdelay to give users a little bit longer to break in if
needed.
Signed-off-by: Tom Rini <trini@ti.com>
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The same places that check for CONFIG_OMAP44XX need to check for
CONFIG_AM33XX as we share the same i2c block.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
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Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
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This reverts commit 0e57968a215d1b9d271f3fa5bebeddeaea0c8075.
The short version of the original commit is that some i2c devices cannot
be probed via read as they NAK the first cycle, so try and probe via a
write that we abort before it writes to the device. This however is not
allowed by the TRM for any of these parts. The section on I2C_CON
(table 17-35 I2C_CON for am/dm37x for example) says you must not change
the register while STT has been set. On these parts, the unpredictable
behavior that the chip exhibits is not problematic. On OMAP4 however it
results in the chip being in a bad state:
Panda # i2c probe
Valid chip addresses: 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12
13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A
2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42
43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A
5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72
73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F
Panda # i2c md 50 0
timed out in wait_for_pin: I2C_STAT=0
I2C read: I/O error
Error reading the chip.
We must revert the original behavior to bring probe back into line with
the TRM.
Cc: Nick Thompson <nick.thompson@ge.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
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Previously, only the low 5 bits (NCH) were being transfered
from DDRVTPR to DDRVTPIOCR, the bits 5-9 where zeroed.
VTP_RECAL should be bit 15, not 18.
The only mainline board affected by this change is davinci_sonata.
The other Davinci boards define CONFIG_SKIP_LOWLEVEL_INIT.
However, if the program that loads u-boot on these boards
copied the code from u-boot, they will need fixed as well.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Please get tested by acks before applying, where tested by
means an overnight memory test.
Thanks
Troy
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OMAP5 evm board has 2GB of memory. So correct the
macro to take in to account of the full dram size.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
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get_ram_size checks the given memory range for valid ram,
but expects the size of memory to be aligned to the power
of 2. In case of OMAP5 evm board the memory available is
2GB - 16MB(used for TRAP section) = 2032MB.
So always ensure that the size of memory used for testing is
aligned to the power of 2.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
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