summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boardsYork Sun2012-04-24-7/+7
| | | | | | | | | P1010RDB and p1_pc_rdb_pc has incorrect configuration for CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING. Incorrect setting causes DDR failure in case of SPD absent. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/85xx:Avoid vector table compilation for nand_splPrabhakar Kushwaha2012-04-24-0/+6
| | | | | | | | NAND SPL code never compile the vector table. So no need to setup interrupt vector table for NAND SPL. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/85xx:Fix IVORs addr after vector table relocationPrabhakar Kushwaha2012-04-24-0/+33
| | | | | | | | | | | After relocation of vector table in SDRAM's lower address, IVORs value should be updated with new handler addresses. As vector tables are relocated to 0x100,0x200... 0xf00 address in DDR.IVORs are updated with 0x100, 0x200,....f00 hard-coded values. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/85xx:Avoid hardcoded vector address for IVORsPrabhakar Kushwaha2012-04-24-31/+34
| | | | | | | | | | | | For e500 and e500v2 architecturees processor IVPR address should be alinged on 64K boundary. in start.S, CONFIG_SYS_MONITOR_BASE is stored blindly in IVPR assuming it to be 64K aligned. It may not be true always. If it is not aligned, IVPR + IVORs may not point to an exception handler. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/p1023rds: Disable nor flash node and enable nand flash nodeChunhe Lan2012-04-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the p1023rds, when system boots from nor flash, kernel only accesses nor flash and can not access nand flash with BR0/OR0; when system boots from nand flash, kernel only accesses nand flash and can not access nor flash with BR0/OR0. Default device tree nor and nand node should have the following structure: Example: nor_flash: nor@0,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x02000000>; bank-width = <2>; device-width = <1>; status = "okay"; partition@0 { label = "ramdisk"; reg = <0x00000000 0x01c00000>; }; } nand_flash: nand@1,0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,p1023-fcm-nand", "fsl,elbc-fcm-nand"; reg = <0x2 0x0 0x00040000>; status = "disabled"; u-boot-nand@0 { /* This location must not be altered */ /* 1MB for u-boot Bootloader Image */ reg = <0x0 0x00100000>; read-only; }; } When booting from nor flash, the status of nor node is enabled and the status of nand node is disabled in the default dts file, so do not do anything. But, when booting from nand flash, need to do some operations: o Disable the NOR node by setting status = "disabled"; o Enable the NAND node by setting status = "okay"; Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* sandbox: Use the new run_command()Simon Glass2012-04-23-6/+0
| | | | | | | | Now that run_command() handles both parsers, clean up sandbox to use it. This fixes a build error. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* arm: restore fdt_fixup_ethernet call to do_bootm_linuxStephen Warren2012-04-23-0/+1
| | | | | | | | | | Commit 0a672d4 "arm: Add Prep subcommand support to bootm" re-organized do_bootm_linux for ARM. During the re-organization, the call to fdt_fixup_ethernet() was removed. I assume this was useful, so add it back. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tom Rini <trini@ti.com>
* arm: fix bootm with device treeStephen Warren2012-04-23-1/+10
| | | | | | | | | | | | Commit 0a672d4 "arm: Add Prep subcommand support to bootm" re-organized do_bootm_linux() for ARM. During the re-organization, the code to pass the device tree to the kernel was removed. Add it back. This restores the ability to boot a kernel using device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tom Rini <trini@ti.com> Acked-by: Allen Martin <amartin@nvidia.com> Tested-by: Allen Martin <amartin@nvidia.com>
* Fix the behaviour of the 'run' commandTimo Ketola2012-04-23-1/+2
| | | | | | | | | | If one command fails, 'run' command should terminate and not execute any remaining variables. Signed-off-by: Timo Ketola <timo@exertus.fi> Tested-by: Wolfgang Denk <wd@denx.de> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* Prepare v2012.04Wolfgang Denk2012-04-21-35/+35
| | | | | | Also tiny style cleanup to tools/patman/README Signed-off-by: Wolfgang Denk <wd@denx.de>
* net: ll_temac: drop obsolete "NAMESIZE" defineStephan Linz2012-04-21-2/+2
| | | | | | | | | | | | | | ... after commit "net/miiphy/serial: drop duplicate NAMESIZE define" (sha1:f6add13) was applied. The building of the new LL TEMAC network driver fails with error below: xilinx_ll_temac.c: In function 'xilinx_ll_temac_initialize': xilinx_ll_temac.c:301: error: 'NAMESIZE' undeclared (first use in this function) xilinx_ll_temac.c:301: error: (Each undeclared identifier is reported only once xilinx_ll_temac.c:301: error: for each function it appears in.) Signed-off-by: Stephan Linz <linz@li-pro.net> Acked-by: Mike Frysinger <vapier@gentoo.org>
* Add 'patman' patch generation, checking and submission scriptSimon Glass2012-04-21-0/+2354
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | What is this? ============= This tool is a Python script which: - Creates patch directly from your branch - Cleans them up by removing unwanted tags - Inserts a cover letter with change lists - Runs the patches through checkpatch.pl and its own checks - Optionally emails them out to selected people It is intended to automate patch creation and make it a less error-prone process. It is useful for U-Boot and Linux work so far, since it uses the checkpatch.pl script. It is configured almost entirely by tags it finds in your commits. This means that you can work on a number of different branches at once, and keep the settings with each branch rather than having to git format-patch, git send-email, etc. with the correct parameters each time. So for example if you put: in one of your commits, the series will be sent there. See the README file for full details. END Signed-off-by: Simon Glass <sjg@chromium.org>
* eb_cpux9k2: add USB host support to boardJens Scharsig2012-04-21-0/+14
| | | | Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* mmc: Fix warning if CONFIG_MMC_TRACE is enabledDirk Behme2012-04-21-1/+1
| | | | | | | | | | | | | | Fix the warning mmc.c: In function 'mmc_send_cmd': mmc.c:87: warning: assignment from incompatible pointer type in case CONFIG_MMC_TRACE is enabled. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Andy Fleming <afleming@freescale.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* ehci-omap: fix for enabling the correct usb portJeroen Hofstee2012-04-21-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is just a patch for the problem reported here: http://lists.denx.de/pipermail/u-boot/2012-February/117580.html originally reported by Igor. "Looks like this is copy paste error from my side,(for port2/3 it should have been bypass for port2/3 rather its port1 set in bypass mode)" I only submit the patch since it is missing in 2012.04-rc3 while the twister board depends on it. Maybe it is already somewhere in the reposistory, but I cannot find it. note: the twister boards still needs an additional `usb reset`, don't know why. U-Boot 2012.04-rc3-dirty (Apr 19 2012 - 21:38:38) AM35XX-GP ES1.0, CPU-OPP2, L3-165MHz, Max CPU Clock 600 Mhz TAM3517 TWISTER Board + LPDDR/NAND I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 In: serial Out: serial Err: serial Die ID #746c0000000000000155dc1405011024 Net: DaVinci-EMAC, smc911x-0 Hit any key to stop autoboot: 0 twister => usb start (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found twister => usb reset (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found twister => usb reset (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found twister => usb reset (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 1 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Govindraj.R <govindraj.raja <at> ti.com> Acked-by: Tom Rini <trini@ti.com>
* fdt: avoid bad MAKEALL statusWolfgang Denk2012-04-21-3/+7
| | | | | | | | | | | | | | | | Current versions of dtc always print a message like DTC: dts->dtb on file "dt.dtb.tmp" which cannot even be suppressed with "-qqq". To avoid incorrect MAKEALL status, we manually filter out this message. This is a bit complicated, as we have to make sure to set a correct return code. Also, get rid of the temp file: dtc accepts "-" for stdin. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* fdt: fix out of tree builds with DT supportWolfgang Denk2012-04-21-1/+1
| | | | | | | | | Fix: FATAL ERROR: Couldn't open "../arch/arm/dts/tegra20.dtsi": No such file or directory Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* GCC4.6: Squash warnings in onenand_base.cWolfgang Denk2012-04-21-3/+2
| | | | | | | | | | | | Fix gcc 4.6 build warnings: onenand_base.c: In function 'onenand_probe': onenand_base.c:2577:6: warning: variable 'maf_id' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
* Prepare v2012.04-rc3Wolfgang Denk2012-04-18-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2012-04-18-2/+2
|\ | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-sh: sh: ecovec: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT sh: Fix rsk7264 pin setup for on-board ethernet
| * sh: ecovec: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INITNobuhiro Iwamatsu2012-04-18-1/+1
| | | | | | | | | | | | | | | | When calling board_late_init, we need to define CONFIG_BOARD_LATE_INIT. The latest ecovec config defines BOARD_LATE_INIT, board_late_init is not called. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Fix rsk7264 pin setup for on-board ethernetPhil Edworthy2012-04-18-1/+1
| | | | | | | | | | | | | | This sets up the external ethernet IRQ pin. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | i.MX6: arm2: Add AXI cache and Qos settingDirk Behme2012-04-17-0/+6
|/ | | | | | | | | | | | | | | Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too. It fixes a display flash issue caused by low priority of the display IDMA channel. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Jason Chen <b02280@freescale.com> CC: Jason Liu <r64343@freescale.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <festevam@gmail.com> Acked-by: Jason Liu <r64343@freescale.com>
* Prepare v2012.04-rc2; minor Coding Style cleanupWolfgang Denk2012-04-16-89/+87
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-04-16-364/+530
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: ARM926EJS: Fix cache.c to comply with checkpatch.pl ARM926EJS: Make asm routines volatile in cache ops MX35: mx35pdk: wrong board revision ARM1136: MX35: Make asm routines volatile in cache ops ARM: add u-boot.imx as target for i.MX SOCs M28: Pull out CONFIG_APBH_DMA so it's always enabled DMA: Split the APBH DMA init into block and channel init imx: Return gpio_set_value in gpio_direction_output imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5) imx: Add GPIO_TO_PORT macro in the mxc_gpio driver imx: Remove unneeded/repititive definitions from imx headers i.MX28: Allow coexistence of PIO and DMA mode for SD/MMC MX31: mx31pdk: drop enable_caches from board file i.MX28: Fix initial stack pointer position mx35: mx35pdk: fix when cache functions are linked mx35: flea3: fix when cache functions are linked ARM: 926ejs: use debug() for misaligned addresses ARM1136: add cache flush and invalidate operations mx6qsabrelite: Fix the serial console port mx6qsabrelite: Add boot switch setting information into the README i.MX6: mx6qsabrelite: add cache commands if cache is enabled i.MX6: implement enable_caches() i.MX6: define CACHELINE_SIZE MX53: DDR: Fix ZQHWCTRL field TZQ_CS mx28evk: Add a README file mx28: Split the README into a common part and a m28 specific part tricorder: Load kernel from ubifs tricorder: Add UBIFS cm-t35: fix Ethernet reset timing hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORT BeagleBoard: Remove userbutton command and use gpio command instead OMAP: Move omap1510inn to Unmaintained / Orphaned
| * ARM926EJS: Fix cache.c to comply with checkpatch.plMarek Vasut2012-04-16-9/+8
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * ARM926EJS: Make asm routines volatile in cache opsMarek Vasut2012-04-16-1/+1
| | | | | | | | | | | | | | | | | | | | We certainly don't want the compiler to reorganise the code for dcache flushing. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Stefano Babic <sbabic@denx.de>
| * MX35: mx35pdk: wrong board revisionStefano Babic2012-04-16-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board revision is detected accessing to the pmic, that is not available before relocation (I2C). This generates the following error: CPU: Freescale i.MX35 rev 2.0 at 532 MHz. Reset cause: WDOG <reg num> = 7 is invalid. Should be less than 0 Board: MX35 PDK 1.0 The revision number is wrong, as a default value is printed (tested on a mx35pdk Rev. 2.0). Move the output in the board_late_init(), when pmic can be accessed. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * ARM1136: MX35: Make asm routines volatile in cache opsStefano Babic2012-04-16-10/+12
| | | | | | | | | | | | | | | | | | | | As well as pushed for ARM926EJS, we certainly don't want the compiler to reorganise the code for dcache flushing Fix checkpatch warnings as well. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marex@denx.de> CC: Albert Aribaud <albert.u.boot@aribaud.net>
| * ARM: add u-boot.imx as target for i.MX SOCsStefano Babic2012-04-16-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale SOCs require an header to u-boot.bin The patch adds u-boot.imx to the default targets if the imx file is set (IMX_CONFIG). Signed-off-by: Stefano Babic <sbabic@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> CC: Loïc Minier <loic.minier@linaro.org> CC: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Tested-by: Dirk Behme <dirk.behme@googlemail.com>
| * M28: Pull out CONFIG_APBH_DMA so it's always enabledMarek Vasut2012-04-16-1/+5
| | | | | | | | | | | | | | | | | | | | | | The ABPH DMA is now used also by the SD card. Therefore it has to be enabled even if NAND is disabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * DMA: Split the APBH DMA init into block and channel initMarek Vasut2012-04-16-24/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the issue where mxs_dma_init() was called either twice or never, without introducing any new init hooks. The idea is to allow each and every device using the APBH DMA block to configure and request only the channels it uses, instead of making it call init for all the channels as is now. The common DMA block init part, which only configures the block, is then called from CPUs arch_cpu_init() call. NOTE: This patch depends on: http://patchwork.ozlabs.org/patch/150957/ Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| * imx: Return gpio_set_value in gpio_direction_outputVikram Narayanan2012-04-16-2/+1
| | | | | | | | | | | | | | | | Return gpio_set_value in gpio_direction_output. Earlier it returned 0 and ignored gpio_set_value's return value. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5)Vikram Narayanan2012-04-16-4/+4
| | | | | | | | | | | | | | Use the defined GPIO_TO_PORT macro. Remove gpio >> 5 references. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * imx: Add GPIO_TO_PORT macro in the mxc_gpio driverVikram Narayanan2012-04-16-0/+1
| | | | | | | | | | | | | | Add GPIO_TO_PORT macro in the mxc_gpio.c driver Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * imx: Remove unneeded/repititive definitions from imx headersVikram Narayanan2012-04-16-6/+0
| | | | | | | | | | | | | | Remove gpio related unused/repititive definitions from imx headers. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * i.MX28: Allow coexistence of PIO and DMA mode for SD/MMCMarek Vasut2012-04-16-1/+47
| | | | | | | | | | | | | | | | | | | | | | | | This SD DMA function of i.MX28 is still apparently too experimental to be enabled by default in 2012.04 release. Enable this feature only if the user plans to tinker with DCache or explicitly enables it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * MX31: mx31pdk: drop enable_caches from board fileStefano Babic2012-04-16-8/+0
| | | | | | | | | | | | | | | | | | enable_caches() is implemented now in cpu.c for ARM1136. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
| * i.MX28: Fix initial stack pointer positionMarek Vasut2012-04-16-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch: m28evk: Use GENERATED_GBL_DATA_SIZE commit 1084606c972ea5f1d89f69bdbd978b867d0ee521 introduced usage of GENERATED_GBL_DATA_SIZE and calculation of initial stack pointer position defived from that. Due to a small typo, the SP position moved to 0x21f80, which is past the SRAM area. This didn't manifest on the real hardware as the SRAM repeats there (address bits in the CPU being ignored). Though this was caught in QEMU, where it crashed the emulator. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx35: mx35pdk: fix when cache functions are linkedStefano Babic2012-04-16-0/+2
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * mx35: flea3: fix when cache functions are linkedStefano Babic2012-04-16-0/+2
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * ARM: 926ejs: use debug() for misaligned addressesStefano Babic2012-04-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Misaligned warnings are useful to debug faulty drivers. A misaligned warning is printed also when the driver is correct - use debug() instead of printf(). Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Albert Aribaud <albert.u.boot@aribaud.net> CC: Mike Frysinger <vapier@gentoo.org> CC: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
| * ARM1136: add cache flush and invalidate operationsAnatolij Gustschin2012-04-16-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 5c1ad3e6f8ae578bbe30e09652f1531e9bc22031 (net: fec_mxc: allow use with cache enabled) the FEC_MXC driver uses flush_dcache_range() and invalidate_dcache_range() functions. This driver is also configured for ARM1136 based 'flea3' and 'mx35pdk' boards which currently do not build as there are no ARM1136 specific flush_dcache_range() and invalidate_dcache_range() functions. Add various ARM1136 cache functions to fix building for 'flea3' and 'mx35pdk'. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> CC: Mike Frysinger <vapier@gentoo.org> CC: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
| * mx6qsabrelite: Fix the serial console portFabio Estevam2012-04-16-1/+1
| | | | | | | | | | | | On mx6qsabrelite the console is ttymxc1. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx6qsabrelite: Add boot switch setting information into the READMEFabio Estevam2012-04-16-1/+2
| | | | | | | | | | | | Add boot switch setting information into the README Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * i.MX6: mx6qsabrelite: add cache commands if cache is enabledEric Nelson2012-04-16-0/+4
| | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * i.MX6: implement enable_caches()Eric Nelson2012-04-16-0/+12
| | | | | | | | | | | | | | disabled by default until drivers are fixed Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * i.MX6: define CACHELINE_SIZEEric Nelson2012-04-16-0/+2
| | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
| * MX53: DDR: Fix ZQHWCTRL field TZQ_CSTroy Kisky2012-04-16-4/+4
| | | | | | | | | | | | | | | | | | Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x02 - 128 cycles. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx28evk: Add a README fileFabio Estevam2012-04-16-0/+29
| | | | | | | | | | | | | | Add a README file for mx28evk board. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
generated by cgit v1.1 at 2024-12-04 11:12:41 +0000