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* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-11-11-298/+1256
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| * malta: arch/mips/include/asm/malta.h SPDX license tagPaul Burton2013-11-11-3/+2
| | | | | | | | | | | | | | | | This patch replaces the GPL-2.0 text with a GPL-2.0 SPDX-License-Identifier tag, and adds Imagination Technologies copyright following my recent changes. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: define CONFIG_MEMSIZE_IN_BYTESGabor Juhos2013-11-09-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The memsize environment variable must contain the memory size in bytes on the Malta board. Otherwise Linux will use wrong memory size which causes a kernel panic. Define CONFIG_MEMSIZE_IN_BYTES in malta.h to avoid that. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Paul Burton <paul.burton@imgtec.com>
| * malta: add myself to maintainersPaul Burton2013-11-09-2/+2
| | | | | | | | | | | | | | | | This patch adds me as a maintainer of the malta(el) board(s). I have access to physical Malta boards and the desire for U-boot to run well on them. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: add script & instructions to flash U-bootPaul Burton2013-11-09-0/+56
| | | | | | | | | | | | | | | | | | | | This patch adds a script which may be used with MIPS Navigator Console and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta development board. Please see the newly added doc/README.malta for usage instructions. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: setup PIIX4 interrupt routePaul Burton2013-11-09-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will be left disabled. Linux does not set up this routing but relies upon it having been set up by the bootloader, reading back the IRQ lines which the PIRQ[A:D] signals have been routed to. This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11. This matches the setup used by YAMON. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: store environment in flashPaul Burton2013-11-09-6/+9
| | | | | | | | | | | | | | | | | | Allow the environment to be stored in the monitor flash of a Malta board. The environment is stored in the final 128KB of the flash, which both leaves the majority of the flash available for U-boot code and also matches the location which YAMON uses. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: enable RTC supportPaul Burton2013-11-09-1/+14
| | | | | | | | | | | | | | | | | | This is actually required in order for a Linux kernel to boot successfully on a physical Malta board. Without enabling the RTC, a Malta Linux kernel will get stuck in its estimate_frequencies function on boot. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: disable L2 cachesPaul Burton2013-11-09-0/+7
| | | | | | | | | | | | | | | | | | | | Malta boards may be used with cores which support L2 caches, however U-boot does not yet support L2 cache for MIPS. Thus for the moment we'll disable L2 caches by setting the L2B bit in Config2. This is specific to MTI/Imagination MIPS cores which is why this is done for the Malta board rather than generically. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: remove cache size definitionsPaul Burton2013-11-09-4/+0
| | | | | | | | | | | | | | | | | | | | These will now be detected at runtime, allowing a single U-boot configuration to function correctly with different bitstreams. Without this you may need to re-configure, re-build and re-flash U-boot to your Malta if you flash a new bitstream with a different cache configuration to your old bitstream. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: enable CONFIG_PCNET_79C973, PCNET_HAS_PROM, CONFIG_CMD_DHCPPaul Burton2013-11-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This model of the pcnet is used in current Malta boards, at least in the Malta-R rev 3. Enable support for it. The Malta also has the ethernet controller PROM containing its MAC address, so enable support for that in order to read that MAC address. DHCP is a very useful feature to have available for many networks, enable support for it also. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: display "U-boot" on the LCD screenPaul Burton2013-11-09-0/+29
| | | | | | | | | | | | | | Displaying a message on the LCD screen is a simple yet effective way to show the user that the board has booted successfully. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: support for coreFPGA6 boardsPaul Burton2013-11-09-16/+594
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: setup super I/O UARTsPaul Burton2013-11-09-0/+89
| | | | | | | | | | | | | | | | On a real Malta the Super I/O needs to be configured before we are able to access the UARTs. This patch performs that configuration, setting up the UARTs in the same way that YAMON would. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * qemu-malta: rename to just "malta"Paul Burton2013-11-09-16/+16
| | | | | | | | | | | | | | | | | | This is in preparation for adapting this board to function correctly on a physical MIPS Malta board. The board is moved into an "imgtec" vendor directory at the same time in order to ready us for any other boards supported by Imagination in the future. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * pci.h: allow inclusion in assembly sourcePaul Burton2013-11-09-1/+5
| | | | | | | | | | | | | | | | | | This patch simply #ifdef's out the C-specific parts of pci.h when it is included by an assembly file. This will allow the macros it contains to be used from assembly source as will be done in a followup commit adding support for more modern MIPS Malta boards. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * pcnet: enable the NOUFLO featurePaul Burton2013-11-09-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On relatively slow boards (such as the MIPS Malta with an FPGA core card) it can be extremely common for transmits to underflow - to the point where it appears they simply do not work at all. Setting the NOUFLO bit causes the ethernet controller to not begin transmission on the wire until a transmit start point is reached. Setting that transmit start point to the full packet will cause the controller to only transmit the packet once it has buffered it entirely thus preventing any transmit underflows from occuring and allowing the controller to function on slower boards. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * pcnet: add cache flushing & invalidationPaul Burton2013-11-09-0/+16
| | | | | | | | | | | | | | | | | | | | | | Ensure that the view of memory from the CPU & the ethernet controller is coherent at the various points where they exchange data. This prevents stale data from being transmitted or received, and prevents the driver from getting stuck waiting for the ethernet controller to update descriptors when in reality it has but the old values are being read from cache. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * pcnet: s/le16_to_cpu/cpu_to_le16/ in pcnet_sendPaul Burton2013-11-09-2/+2
| | | | | | | | | | | | | | This should cause no change to the generated code, but is semantically correct. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * pcnet: code style cleanupPaul Burton2013-11-09-125/+123
| | | | | | | | | | | | | | | | | | Fix up the code to match Documentation/CodingStyle. This is mostly removing extraneous spaces. No functional change is intended. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * mips32: detect L1 cache sizes if they're not definedPaul Burton2013-11-09-19/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For boards such as the MIPS Malta with an FPGA core card it is desirable to be able to detect the L1 cache sizes at runtime, since they are not dependant upon the board but on the FPGA bitstream in use. This patch performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are not defined by the board configuration. In cases where the sizes are detected this patch also removes the restriction that the I-cache & D-cache line sizes must be the same, as this is not necessarily true. If the cache sizes are defined by a configuration then they will be hardcoded as before, so this patch will not add overhead to such boards. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* | Merge branch 'iu-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-09-1172/+1730
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-07-53/+819
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| | * wandboard: README: Include the quad versionFabio Estevam2013-11-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Wandboard quad was not ported into U-boot at the time of writing the README. Add it to the list of Wandboard variants. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * Revert "configs: imx: Make CONFIG_SYS_PROMPT uniform across FSL boards"Stefano Babic2013-11-04-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 178b8e15ade96c7bd59b9704b91ca51d27c391cd. Patch was merged too fast, without checking that another patch is fixing the reported issue globally - reverted. Signed-off--by: Stefano Babic <sbabic@denx.de>
| | * configs: imx: Make CONFIG_SYS_PROMPT uniform across FSL boardsFabio Estevam2013-10-31-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is no real benefit in adding the board name into U-boot's prompt. Use the simple "=> " prompt across FSL boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| | * i.MX6: nitrogen6x: fix erase size in 6x_upgrade.txtEric Nelson2013-10-31-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 6x_upgrade script is used to upgrade U-Boot in SPI-NOR on Nitrogen6x/SABRE Lite boards using U-Boot's 'sf' command. U-Boot is placed at offset 0x400 in flash, and the script currently only erases 0x50000 bytes. Since the current head is 319k, any additional features enabled in the configuration will exceed the space erased and cause errors re-programming the device. This patch increases the erase size to the full size of the region allocated for the U-Boot binary. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * ARM: mxs: Configure 2 Gbit DDR2 RAM for BG0900Christoph G. Baumann2013-10-31-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BG0900 module has 2Gbit DRAM module on it, adjust the DataBahn DRAM controller registers so the DRAM module will be correctly recognised. Signed-off-by: Christoph G. Baumann <c.baumann@ppc-ag.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * ARM: mxs: Enable DCDC converter for battery bootMarek Vasut2013-10-31-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the board detected sufficient voltage for battery boot, make sure the DCDC converter is ON and the board is not running only from linregs, otherwise an instability will be observed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * mx6: Remove PAD_CTL_DSE_120ohm from i.MX6DL's IPU1_DI0_PIN4 pinOtavio Salvador2013-10-31-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This removes the PAD_CTL_DSE_120ohm as done for i.MX6Q's IPU1_DI0_PIN4 pin definition and makes it aligned with 3.0.35-4.1.0 and 3.12 mainline kernel. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| | * mx5: lowlevel_init: Remove unused macroFabio Estevam2013-10-31-6/+0
| | | | | | | | | | | | | | | | | | | | | setup_wdog macro is not used anywhere, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * ARM: mx5: Enable L2 cacheFabio Estevam2013-10-31-0/+6
| | | | | | | | | | | | | | | | | | Enable L2 cache for improving the system performance. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * imx_watchdog: do not soft-reset while watchdog initAnatolij Gustschin2013-10-31-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Currently the driver clears WCR_SRS bit when enabling the watchdog and this causes a software reset. Do not clear WCR_SRS. Signed-off-by: Anatolij Gustschin <agust@denx.de>
| | * ARM: mxs: Setup stack in JTAG modeMarek Vasut2013-10-17-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the MX23/MX28 is switched into JTAG mode via the BootMode select switches, the BootROM bypasses the CPU core registers initialization. This in turn means that the Stack Pointer (SP) register is not set as it is in every other mode of operation, but instead is only zeroed out. To prevent U-Boot SPL from crashing in this obscure JTAG mode, configure the SP to point at the CONFIG_SYS_INIT_SP_ADDR if the SP is zeroed out. Note that in case the SP is already configured, we must preserve that exact SP value and must not modify it. This is important since in every other mode but the JTAG mode, the SPL returns into the BootROM and BootROM in turn loads U-Boot itself. If the SP were to be corrupted, the BootROM won't be able to continue it's operation after returned from SPL and the system would crash. Finally, add the JTAG mode switch identifier, so it's not recognised as Unknown mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
| | * ARM: mxs: Add PPC-AG BG0900 boardMarek Vasut2013-10-17-0/+355
| | | | | | | | | | | | | | | | | | | | | | | | This board supports FEC Ethernet, SPI NOR and NAND flash. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Christoph Baumann <c.baumann@ppc-ag.de>
| | * udoo: Add initial support for mx6q udoo boardFabio Estevam2013-10-17-0/+343
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for mx6q udoo board. For further information about Udoo board: http://www.udoo.org/ Tested booting a mainline device tree kernel and a Yocto rootfs from mmc. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * ARM: mxs: tools: Use mkimage for BootStream generationMarek Vasut2013-10-17-17/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that mkimage can generate an BootStream for i.MX23 and i.MX28, use the mkimage as a default tool to generate the BootStreams instead of the elftosb tool. This cuts out another obscure dependency. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mx6: compute PLL PFD frequencies rather than using definesPierre Aubert2013-10-17-25/+42
| | | | | | | | | | | | | | | Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de>
| * | Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-05-12/+97
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| | * | at91: add defines for reset typeRoger Meier2013-11-04-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roger Meier <r.meier@siemens.com> Acked-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | ARM: ATMEL: eb_cpux9k2: fix TEXT_BASE for ramboot targetJens Scharsig (BuS Elektronik)2013-11-04-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since more functions are enabled, the eb_cpux9k2_ram target does not boot. This patch changed the TEXT_BASE, that the code fits between TEXT_BASE and ram end. Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | arm: atmel: get rid of too many ifdefferyBo Shen2013-11-04-11/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Get rid of too many ifdeffery in usb ohci driver Add following two configuration for USB clock selecting - CONFIG_USB_ATMEL_CLK_SEL_PLLB: using PLLB as usb ohci input clock - CONFIG_USB_ATMEL_CLK_SEL_UPLL: using UPLL as usb ohci input clock Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | arm: atmel: at91sam9n12ek: add usb host supportBo Shen2013-11-04-2/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add usb host support for at91sam9n12ek board. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | net: macb: get DMA bus width from design config registerBo Shen2013-11-04-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Get DMA bus width from design config register Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | TI:omap5: Add rdaddr, use consistent loadaddr valuesTom Rini2013-11-01-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rdaddr was missing which is a common location for loading ramdisks to. loadaddr was higher than it needs to be, so use the same value other TI platforms use. Signed-off-by: Tom Rini <trini@ti.com>
| * | | ARM: OMAP5: DDR3: Change io settingsSRICHARAN R2013-11-01-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change from 0x64656465 to 0x64646464 is to remove the weak pull enabled on DQS, nDQS lines. This pulls the differential signals in the same direction which is not intended. So disabling the weak pulls improves signal integrity. On the uEVM there are 4 DDR3 devices. The VREF for 2 of the devices is powered by the OMAP's VREF_CA_OUT pins. The VREF on the other 2 devices is powered by the OMAP's VREF_DQ_OUT pins. So the net effect here is that only half of the DDR3 devices were being supplied a VREF! This was clearly a mistake. The second change improves the robustness of the interface and was specifically seen to cure corruption observed at high temperatures on some boards. With the above two changes better memory stability was observed with extended temperature ranges around 100C. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * | | cm_t35: update lcd predefinesNikita Kiryanov2013-11-01-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current predefines do not fit cm-t3730 very well (some of them produce artifacts in the image). Update LCD predefines to accommodate both cm-t35 and cm-t3730 modules. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | cm_t35: turn on GPIO commandsNikita Kiryanov2013-11-01-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Turn on GPIO commands for cm-t35 and cm-t3730. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | cm_t35: reduce default bootdelay to 3 secondsNikita Kiryanov2013-11-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current default bootdelay of 10 seconds is too long. Reduce default bootdelay to 3 seconds. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | dra7xx_evm: Enabled UART-boot mode and add dra7xx_evm_uart3 buildMinal Shah2013-11-01-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UART booting is supported on this SoC, but via UART3 rather than UART1. Because of this we must change the board to use UART3 for all console access (only one UART is exposed on this board and a slight HW mod is required to switch UARTs). Signed-off-by: Minal Shah <minal.shah@ti.com> [trini: Make apply to mainline, reword commit] Signed-off-by: Tom Rini <trini@ti.com>
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