| Commit message (Collapse) | Author | Age | Lines |
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Testing showed, that commands like STATUS made the buffer dirty
when executed with NFC_SECSZ set to the page size. It looks
like the controller transfers bogus data when this register
is configured. When setting it to 0, the buffer does not get
altered while the status command still seems to work flawless.
Signed-off-by: Stefan Agner <stefan@agner.ch>
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The driver tries to re-use the page buffer by storing the page
number of the current page in the buffer. The page is only read
if the requested page number is not currently in the buffer. When
a block is erased, the page number is marked as invalid if the
erased page equals the one currently in the cache. However, since
a erase block consists of multiple pages, also other page numbers
could be affected.
The commands to reproduce this issue (on a written page):
> nand dump 0x800
> nand erase 0x0 0x20000
> nand dump 0x800
The second nand dump command returns the data from the buffer,
while in fact the page is erased (0xff).
Avoid the hassle to calculate whether the page is affected or not,
but set the page buffer unconditionally to invalid instead.
Signed-off-by: Stefan Agner <stefan@agner.ch>
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This command is only enabled by one board, complicates the NAND code,
and doesn't appear to have been functioning properly for several
years. If there are no bad blocks in the NAND region being written
nand_write_skip_bad() will take the shortcut of calling nand_write()
which bypasses the special yaffs handling. This causes invalid YAFFS
data to be written. See
http://lists.denx.de/pipermail/u-boot/2011-September/102830.html for
an example and a potential workaround.
U-Boot still retains the ability to mount and access YAFFS partitions
via CONFIG_YAFFS2.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some
time and a more generic method of NAND verification now exists in U-Boot.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
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Previously NAND writes were not verified and could fail silently. Add
a verification step after all writes to NAND.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
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Previously NAND writes were only verified when CONFIG_MTD_NAND_VERIFY_WRITE
was defined. On boards without this define writes could fail silently.
Boards with CONFIG_MTD_NAND_VERIFY_WRITE could prematurely report
failures which ECC could correct.
Add a verification step after all "nand write[.x]" commands to ensure the
writes were successful. The verification uses ECC for for "normal"
writes, but does not for raw and yaffs writes. Some test cases which
inject fake bad bits on a 2K page flash are below.
Test cases with CONFIG_MTD_NAND_VERIFY_WRITE defined:
Example of an ECC write which previously failed when
CONFIG_MTD_NAND_VERIFY_WRITE was defined, but now succeeds because ECC
is used during verification:
nand erase 0 0x10000
dhcp /somefile
mw.b 0x10000 0xff 0x2000
mw.b 0x10020 0xfe 1
nand write.raw 0x10000 0x800 1
mw.b 0x1000020 0x01 1
nand write 0x1000000 0x800 0x1800
Test cases without CONFIG_MTD_NAND_VERIFY_WRITE defined:
Example of an ECC write which previously silently failed:
nand erase 0 0x10000
dhcp /somefile
mw.b 0x10000 0xff 0x2000
mw.b 0x10020 0x00 1
nand write.raw 0x10000 0x800 1
mw.b 0x1000020 0xff 1
nand write 0x1000000 0x800 0x1800
Example of a raw write which previously failed silently due to stuck
data bit, but now errors out:
nand erase 0 0x10000
dhcp /somefile
mw.b 0x10000 0xff 0x2000
mw.b 0x10020 0xfe 1
nand write.raw 0x10000 0x800 1
mw.b 0x1000020 0x01 1
nand write.raw 0x1000000 0x800 3
Example of a raw write which previously failed silently due to stuck OOB
bit, but now errors out:
nand erase 0 0x10000
dhcp /somefile
mw.b 0x10000 0xff 0x2000
mw.b 0x10810 0xfe 1
nand write.raw 0x10000 0x800 1
mw.b 0x1000810 0x01 1
nand write.raw 0x1000000 0x800 3
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
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Add nand_verify() and nand_verify_page_oob(). nand_verify() verifies
NAND contents against an arbitrarily sized buffer using ECC while
nand_verify_page_oob() verifies a NAND page's contents and OOB.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
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The use of the nand_write_options and nand_read_options structures were
removed in commit dfbf617ff055e4216f78d358b0867c548916d14b. Remove the
now-unused structures too.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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This option was removed along with legacy NAND support in
be33b046b549ad88c204c209508cd7657232ffbd. Clean up some remnants.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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There is only one pio_word in this DMA transaction so data field must be 1.
Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
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There is only one pio_word in this DMA transaction so data field must be 1.
Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
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with WCR_WDW set, the watchdog won't trigger if we bootet linux and idle
around while the watchdog is not triggered. It seems the timer makes
progress very slowly if at all. I managed to remain 20minutes alive
while the timeout was set to 60secs. It reboots within 60secs if I start
a busyloop in userland (something like "while (1) { }").
While I don't see a reason why the WDT should not be running while the
CPU is in idle, I'm dropping this bit.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Acked-by: Stefano Babic <sbabic@denx.de>
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This patch is to support reading temperature for mx6slevk board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Before add CONFIG_SYS_MALLOC_F and CONFIG_SYS_MALLOC_F_LEN,
uboot will complains "CPU: Temperature: Can't find sensor device".
This is because DM and DM_THERMAL are enabled, but SYS_MALLOC_F
is not configured.
After applying this patch, uboot can correctly detect the temperature.
"
U-Boot 2015.04-rc2-00146-g48b6e30-dirty (Mar 09 2015 - 13:04:36)
CPU: Freescale i.MX6DL rev1.1 at 792 MHz
CPU: Temperature 44 C
"
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add basic SECO MX6Q/uQ7 board support (Ethernet, UART, SD are supported).
It also adds a Kconfig skeleton to later add more SECO board (supporting
SoC and board variants).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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IMX_CONFIG is currently passed via the SYS_EXTRA_OPTIONS which is marked
as deprecated.
Add a new Kconfig file under arch/arm/imx-common and define the
IMX_CONFIG Kconfig in there.
Each board is supposed to provide a default value pointing to the
appropriate imximage.cfg file.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Freescale boards are currently all defined in arch/arm/Kconfig, which
makes them hard to detect.
Moreover the MX6 SoC variant (Q, D, DL, S, SL) selection is currently
done via the SYS_EXTRA_OPTIONS option which marked as deprecated.
Move to a more standard way to select sub-architecture and board by
creating a Kconfig under arch/arm/cpu/armv7/mx6 and a new ARCH_MX6
option.
Existing MX6 board definitions should be moved in this new Kconfig in
choice menu, and new boards should be directly declared in this menu.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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By specification the FIFO size would be in a range 2-256 bytes. From TX Level
prospective it means we can set threshold in the range 0-(FIFO size - 1) bytes.
Hence there are currently two issues:
a) FIFO size 2 bytes is actually skipped since TX Level is 1 bit and could be
either 0 or 1 byte;
b) FIFO size is incorrectly decreased by 1 which already done by meaning of
TX Level register.
Fixes: 501943696ea4 (spi: designware_spi: Fix detecting FIFO depth)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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Make local functions static and remove unneeded forward declarations.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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Don't assume slave is always the first member of struct cf_spi_slave.
Use container_of instead of casting first structure member.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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This patch enables QUAD read mode for qspi to improve the
read performace while loading the binaries from qspi.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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Don't assume slave is always the first member of struct ftssp010_spi.
Use to_ftssp010_spi() to ensure free correct address in spi_free_slave().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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It's done in spi_alloc_slave().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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The third parameter of container_of is the name of the member within the struct.
Current code only works if the parameter passed to to_cf_qspi_slave named slave.
Fix it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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following kernel patches to reduce the cpu clock to 912MHz due to
reported instability at 1008MHz, select 912MHz as the boot speed
for the a10-lime
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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make the CPU clock selectable via Kconfig
this removes the sunxi specific CONFIG_CLK_FULL_SPEED defined in each
soc header and replaces it's use in board/sunxi/board.c with
CONFIG_SYS_CLK_FREQ from Kconfig which allows us to configure board
specific frequency on boot
Signed-off-by: Iain Paton <ipaton0@gmail.com>
[hdegoede@redhat.com s/CONFIG_SYS_CLK_FREQ/CONFIG_TIMER_CLK_FREQ/ for the
arch-timer clk speed on sun7i to fix mis-compile on sun7i]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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clock_set_pll1 would pick the next highest available cpu clock speed if
a value not in the pre defined table was selected. this potentially
results in overclocking the soc.
reverse the selection method so that we select the next lowest speed
and add the missing 912Mhz setting that's requested by sun7i which also
uses the sun4i clock code.
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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The usb0 / otg phy on sunxi boards has a bug where it wrongly detects a
high speed squelch on usb reset deassert when a lo speed device is plugged in.
The android kernel has a work around for this in the form of temporary
disabling the phy's squelch detection on reset deassert, this commit adds
the same workaround to the u-boot sunxi musb code, thereby fixing various usb
lo speed devices not working.
Tested with a (before non working) usb keyboard and a usb 2.4 GHz wireless
keyboard/mouse combo receiver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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Add CONFIG_SYS_GENERIC_BOARD to amcc-common.h and CONFIG_DISPLAY_BOARDINFO
to Kconfig files. canyonlands.h includes amcc-common.h, so remove
CONFIG_SYS_GENERIC_BOARD definition there.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Feng Kan <fkan@amcc.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
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The current head revision of mkenvimage
(e72be8947e129f5ab274c0a9f235d2cc0014b2ea) will prevent you from creating
an env image from a text file that is larger than the env length specified
by the '-s' option. That doesn't make sense given that the tool now allows
comments and blank lines. This patch removes that limitation and allows
longer text files to be used.
I don't have time / desire at the moment to figure out "patman" and could
really care less if this is adopted up stream. Just figured I would share
in case anybody else finds it useful enough to take time to do a proper
patch.
>From 39ff30190c2bf687861f4b4b33230f1944fb64f9 Mon Sep 17 00:00:00 2001
From: Brian McFarland <bmcfarland@rldrake.com>
Date: Thu, 12 Mar 2015 11:37:19 -0400
Subject: [PATCH] In mkenvimage, removed the check that prevented using a
source text file larger than the output environment image. Instead, the main
parsing loop checks to see if the environment buffer is full, and quits if it
is. After the main parse loop, a second loop swallows comments and
whitespace until either the EOF is reached or more env vars are found, in
which case an error will be thrown.
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Fix eb_cpu5282 and eb_cpu5282_internal unresolved external error.
These boards have video but don't need any ppc related
video_setmem().
Fix M53017EVB moving away embedded env to a different offset,
as in M52277EVB.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
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Purpose of this change is to make it possible to re-use code currently
used on X86 solely for other architectures. For example:
* init_sequence_f_r
* board_init_f_r
Even though board_init_f_mem() has nothing to do with any particular
architecture it won't work (at least in current implementation) for X86.
This is because on X86 "gd" is an alias to function get_fs_gd_ptr(),
thus we cannot assign anything to it.
So this change separates selection of board_init_f_mem() from X86 while
keeping it disabled for X86 still.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
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This variant that is neither FVP / Base Model or Juno Versatile
Express 64bit is confusing. Get rid of it unless someone can
point out what machine that really is. Seems to be an evolutional
artifact in the config base.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Now that loading files using semihosting can be done using
a command in standard scripts, and we have rewritten the boardfile
and added it to the Vexpress64, let's delete the external
interface to the semihosting file retrieveal and rely solely
on these commands, and staticize them inside that file so the
whole business is self-contained.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This removes the kludgy late board init from the FVP simulator
version of Versatile Express 64bit (ARMv8), and replace it with
a default boot command using the new smhload command to load
the files using semihosting. Tested on the Foundation Model.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Instead of sprinkling custom code and calls over the Vexpress64
boardfile, create a command that loads images using semihosting
just like we would load from flash memory of over the network,
using a special command:
smhload <image> <address>
This will make it possible to remove some custom calls and
code and make the boot easier.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The semihosting trap call does not like being inlined, probably
because that will mean register reordering screwing up the return
value in r0, so tag this function "noinline".
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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config_distro_bootcmd.h defines a common boot environment for multiple
platforms, including several environment variables that are intended for
interactive use by an end-user. Document which variables are considered
public interfaces that must remain compatible in future u-boot versions.
Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
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Reuse the 32-bit ARM client architecture and identify ARMv8 specifically
by setting the BOOTP VCI string.
Cc: Dennis Gilmore <dennis@ausil.us>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The bootz command doesn't work with Linux kernel images on 64-bit ARM.
The replacement command with the same interface and functionality is
booti.
Cc: Dennis Gilmore <dennis@ausil.us>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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since we have possibility to write out on lcd whats going on, we don't need
the gpio blink functionality anymore.
Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
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At this time I2C and responsible pin-mux is setup during PMIC initialziation
within common.c, this is possible because today PMIC is always connected on
I2C0.
In Future this will be changed, PMIC isn't anymore connected to bus0 in call
cases.
So we do following:
- rename enable_i2c_pin_mux0 to enable_i2c_pin_mux to be generic for enabling
pin-mux on different or more busses.
- move the call to i2c_pin_mux and i2c_init from common.c to the specific
board.c
Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
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Enable saveenv command and the configs to store environment
persistently in the SD card.
Tested on OMAP4 Panda (OMAP4460 ES1.1)
Signed-off-by: Maxin B. John <maxin.john@enea.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
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Collect CPU specific flags into the single place.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
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Move the CPU type config options from include/configs/*.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf547x_8x/config.mk.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
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Move the CPU type config options from include/configs/M5235EVB.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf523x/config.mk.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
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Move the CPU type config options from include/configs/M52277EVB.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf5227x/config.mk.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
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