summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* arm: rmobile: Add SILK board supportVladimir Barinov2015-02-13-1/+1279
| | | | | | | | | | | SILK is an entry level development board based on R-Car E2 SoC (R8A7794) This commit supports the following peripherals: - SCIF, I2C, Ethernet, QSPI, MMC, USB Host Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Merge branch 'microblaze' of git://git.denx.de/u-boot-microblazeTom Rini2015-02-09-429/+371
|\
| * microblaze: spl: Add LISTS to linker scriptMichal Simek2015-02-09-0/+6
| | | | | | | | | | | | This is required for driver model. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: spl: Do not call mem_malloc_init and use early allocMichal Simek2015-02-09-22/+16
| | | | | | | | | | | | | | | | | | | | | | | | This patch has some parts connected together: - Use _gd in bss section which is automatically cleared Location at SPL_MALLOC_END wasn't cleared at all - Use MALLOC_F_LEN(early alloc) instead of FULL MALLOC (mem_malloc_init is not called at all) - Simplify malloc and stack init. At the end of SPL addr is malloc area and below is stack Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Add support for CONFIG_SYS_MALLOC_F_LENMichal Simek2015-02-09-0/+9
| | | | | | | | | | | | | | Create space for dm_init where calloc is called and malloc_base has to be initialized. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Do not use CONFIG_SYS_GENERIC_GLOBAL_DATAMichal Simek2015-02-09-1/+6
| | | | | | | | | | | | | | | | Because it is not compatible with DM where malloc_base has to be available early and init has to be done in ASM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * bdinfo: Show information about fdt blob via bdinfoMichal Simek2015-02-09-0/+3
| | | | | | | | | | | | | | Microblaze target supports both OF and !OF cases and from log is not clear which version is running. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Speedup code copyMichal Simek2015-02-09-5/+7
| | | | | | | | | | | | | | Remove one instruction in the loop which speedup code copying. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Move architecture to use generic board initMichal Simek2015-02-09-272/+195
| | | | | | | | | | | | | | Compile code with -fPIC to get GOT. Do not build SPL with fPIC because it increasing SPL size for nothing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Enable SPL_NOR support when FLASH_BASE is setupMichal Simek2015-02-09-2/+4
| | | | | | | | | | | | Simplify SPL NOR init. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Fix gd_t address which is placed at the end of BRAMMichal Simek2015-02-09-2/+1
| | | | | | | | | | | | | | | | | | Setup gd from ASM to be availalbe for board_init_r. Setting it up in spl_board_init is too late when MALLOC is used. Space for gd is located behind MALLOC area at the end of BRAM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Remove unused asm labelMichal Simek2015-02-09-1/+1
| | | | | | | | | | | | It is not used at all that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Use standard interrupt_init() functionMichal Simek2015-02-09-4/+2
| | | | | | | | | | | | Do not use microblaze specific interrupt init function. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Remove unneeded data section adding from DTBMichal Simek2015-02-09-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | DTB is added to rodata section: [ 2] .rodata PROGBITS 84c5b60c 05c60c 00c618 00 A 0 0 4 [ 3] .dtb.init.rodata PROGBITS 84c67c30 068c30 003c80 00 A 0 0 16 [ 4] .rela.dyn RELA 84c6b8b0 06c8b0 000534 0c A 0 0 4 [ 5] .data PROGBITS 84c6bde4 06cde4 001536 00 WA 0 0 16 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Add debug message about enabling interruptsMichal Simek2015-02-09-0/+1
| | | | | | | | | | | | Add one more debug message about enabling global interrupts. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Fix coding styleMichal Simek2015-02-09-8/+8
| | | | | | | | | | | | No functional changes just to pass checkpatch.pl. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Remove DEBUG_INT macro and use debug() insteadMichal Simek2015-02-09-32/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not use specific macros for debugging. Also remove compilation warning: w+../arch/microblaze/cpu/interrupts.c: In function 'interrupt_handler': w+../arch/microblaze/cpu/interrupts.c:153:2: warning: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'void (*)(void *)' [-Wformat] w+../arch/microblaze/cpu/interrupts.c:153:2: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'void *' [-Wformat] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Fix coding style in exception.cMichal Simek2015-02-09-16/+17
| | | | | | | | | | | | Just coding style cleanup - no functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Show return address from exceptionMichal Simek2015-02-09-0/+6
| | | | | | | | | | | | | | Show also return address from exception which should suggest where the problem is. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Fix stack usage in interrupt handlerMichal Simek2015-02-09-61/+60
| | | | | | | | | | | | | | | | Do not save registers below r1 stack pointer because it is not checked by stack undeflow is not able to detect it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * common/board_r: manual relocation for cmd tableAndreas Bießmann2015-02-09-0/+12
| | | | | | | | | | | | | | | | | | This is required for architectures still need manual relocation like avr32, mk68 and others. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Michal Simek <michal.simek@xilinx.com>
| * common: Move dram_init() declaration to common locationMichal Simek2015-02-09-9/+1
| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-arcTom Rini2015-02-09-167/+639
|\ \
| * | arc: build libgcc in U-BootAlexey Brodkin2015-02-09-0/+528
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way we may have very limited set of functions implemented so we save some space. Also it allows us to build U-Boot for any ARC core with the same one toolchain because we don't rely on pre-built libgcc. For example: * we may use little-endian toolchain but build U-Boot for ether endianess * we may use non-multilibbed uClibc toolchain but build U-Boot for whatever ARC CPU flavour that current GCC supports Private libgcc built from generic C implementation contributes only 144 bytes to .text section so we don't see significant degradation of size: --->8--- $ arc-linux-size u-boot.libgcc-prebuilt text data bss dec hex filename 222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt $ arc-linux-size u-boot.libgcc-private text data bss dec hex filename 222361 24912 214820 462093 70d0d u-boot.libgcc-private --->8--- Also I don't notice visible performance degradation compared to pre-built libgcc (where at least "*div*" functions are had-written in assembly) on typical operations of downloading 10Mb uImage over TFTP and bootm. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: move CPU flags selection to the main "config.mk"Alexey Brodkin2015-02-09-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | As a preparation to ARCv2 port submission we're moving CPU slection flags to a common location. Also it will allow us to have more flexible CPU specification, not only ISA version but CPU family as well checking CONFIG_ARC_CPU_xxx. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: move SYS_MONITOR_BASE setup in KonfigAlexey Brodkin2015-02-09-5/+6
| | | | | | | | | | | | | | | | | | | | | Following SPARK ARC now has SYS_MONITOR_BASE setup via Kconfig. This makes "include/configs/*.h" cleaner and more flexible. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: hard-code CONFIG_ARCH_EARLY_INIT_R in asm/config.hAlexey Brodkin2015-02-09-15/+1
| | | | | | | | | | | | | | | | | | | | | Common arch_early_init_r() is used in "arc/lib/cpu.c" for all ARC boards so there's no sense in separate per-board definitions. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: get rid of useless CONFIG_SKIP_LOWLEVEL_INITAlexey Brodkin2015-02-09-4/+0
| | | | | | | | | | | | | | | | | | | | | Currently there's nothing related to really low-level init on ARC so CONFIG_SKIP_LOWLEVEL_INIT definition makes no sense. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: hard-code CONFIG_SYS_GENERIC_BOARD into asm/config.hAlexey Brodkin2015-02-09-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | There're no other options for ARC except "generic board" so ther's no point to define CONFIG_SYS_GENERIC_BOARD per board. We now have it set fo all ARC boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: add selection of endianess in KconfigAlexey Brodkin2015-02-09-104/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: select cache settings via menuconfigAlexey Brodkin2015-02-09-17/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: define and use PTAG AUX regs for MMUv3 onlyAlexey Brodkin2015-02-09-5/+5
| | | | | | | | | | | | | | | | | | DC_PTAG and IC_PTAG registers only exist in MMUv3. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: add more flavours of ARC700 series CPUAlexey Brodkin2015-02-09-4/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we may select a particular version of ARC700: * ARC750D or * ARC770D It allows more flexible (or more fine tuned) configuration of U-Boot. Before that change we relied on minimal configuration but now we may use specific features of each CPU. Moreover allows us to escape manual selection of options that exist in both CPUs but may have say different version like MMUv2 in ARC750D vs MMUv3 in ARC770D. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: remove CPU hard-coded selection from board description in include/configsAlexey Brodkin2015-02-09-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With switch to Kconfig we only need very board-specific descriptions in include/configs. CPU selection is performed with either defconfig or manually via menuconfig. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: memcmp - fix zero-delay loop utilizationIgor Guryanov2015-02-09-0/+2
| |/ | | | | | | | | | | | | | | It's prohibited to put branch instruction in the very end of zero-delay loop. On execution this causes "Illegal instruction" exception. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
* | kwbimage: Make the Makefile pass in CONFIG_SYS_SPI_U_BOOT_OFFSTom Rini2015-02-07-1/+4
| | | | | | | | | | | | | | We can't use config.h directly as some platforms include headers that aren't safe to use in normal Linux userland. Signed-off-by: Tom Rini <trini@ti.com>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2015-02-06-45/+17925
|\ \
| * | arm: mvebu: maxbcm: Fix compilation warning and add Spansion SPI NOR supportStefan Roese2015-02-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the following compilation warning for maxbcm: Building maxbcm board... text data bss dec hex filename 160075 6596 38240 204911 3206f ./u-boot board/maxbcm/maxbcm.c: In function 'reset_phy': board/maxbcm/maxbcm.c:68:6: warning: unused variable 'reg' [-Wunused-variable] u16 reg; ^ board/maxbcm/maxbcm.c:66:6: warning: unused variable 'devadr' [-Wunused-variable] u16 devadr = CONFIG_PHY_BASE_ADDR; ^ Additionally support Spansion SPI NOR flash is added. With larger SPI device support via the CONFIG_SPI_FLASH_BAR define. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: mvebu: drivers/ddr: Add DDR3 driver with training code from Marvell bin_hdrStefan Roese2015-02-06-0/+15419
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DDR3 setup and training code taken from the Marvell U-Boot repository. This code used to be included as a binary (bin_hdr) into the AXP boot image. Not linked with the main U-Boot. With this code addition and the following serdes/PHY setup code, the Armada-XP support in mainline U-Boot is finally self-contained. So the complete image for booting can be built from mainline U-Boot. Without any additional external inclusion. Hopefully other MVEBU SoC's will follow here. Support for some SoC's has been removed in this version. This is: MV_MSYS: The code referred to by the MV_MSYS define is currently unused. And its not really planned to support this in mainline. So lets remove it to make the code clearer and increase the readability. MV88F68XX (A38x): The code referred to by the MV88F68XX define (A38x) is currently unused. And its partial and not sufficient for this device in this stage. So lets remove it to make the code clearer and increase the readability. MV88F66XX (ALP): The code referred to by the MV88F66XX define is currently unused. And its not really planned to support this in mainline. So lets remove it to make the code clearer and increase the readability. MV88F78X60_Z1: The code referred to by the MV88F78X60_Z1 define is currently unused. As the Z1 revision of the AXP is not supported in mainline anymore. So lets remove it to make the code clearer and increase the readability. Remove support for Z1 & A0 AXP revisions (steppings). The current stepping is B0 and this is the only one that is actively supported in this code version. Tested on AXP using a SPD DIMM setup on the Marvell DB-MV784MP-GP board and on a custom fixed DDR configuration board (maxbcm). Note: This code has undergone many hours of coding-style cleanup and refactoring. It still is not checkpatch clean though, I'm afraid. As the factoring of the code has so many levels of indentation that many lines are longer than 80 chars. This might be some task to tackly later on. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: mvebu: Add Serdes PHY config codeStefan Roese2015-02-06-0/+2114
| | | | | | | | | | | | | | | | | | | | | | | | | | | This code is ported from the Marvell bin_hdr code into mainline SPL U-Boot. It needs to be executed very early so that the devices connected to the serdes PHY are configured correctly. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: armada-xp: Add SPL support used to include the DDR training codeStefan Roese2015-02-06-0/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPL support to the Marvell Armada-XP. With this addition the bin_hdr integration is not needed any more. The SPL will first initialize the serdes/PHY and the call the DDR setup and training code now integrated into mainline U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | scripts/Makefile.spl: Add MVEBU DDR code to SPLStefan Roese2015-02-06-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | tools: kwbimage: Support u-boot.img padding to CONFIG_SYS_SPI_U_BOOT_OFFSStefan Roese2015-02-06-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is used on the AXP boards, to pad u-boot.img to the desired offset in SPI flash (only this boot target supported right now). This offset is used by the SPL then to load u-boot.img into SDRAM and execute it there. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | Makefile: Add another kwb build target used on Marvell Armada-XP (AXP)Stefan Roese2015-02-06-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | This build target now includes the SPL binary as the bin_hdr into the kwb image. Its used on the AXP port with the mainlined DDR training code. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: db-mv784mp-gp: Enable SPL to include DDR training code into U-BootStefan Roese2015-02-06-3/+54
| | | | | | | | | | | | | | | | | | | | | This patch adds SPL support to the db-mv784mp-gp eval board. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: maxbcm: Enable SPL to include DDR training code into U-BootStefan Roese2015-02-06-5/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPL support to the maxbcm MV78460 based board. Including the fixed DDR configuratrion needed for the DDR training code. And the the serdes PHY init code. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: mvebu: Placeholder bin_hdr file can now be removedStefan Roese2015-02-06-34/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | With this patchset the Marvell bin_hdr (DDR training) code is intergrated into mainline U-Boot. We can remove the placeholder file again, which was only introduced to make U-Boot compile and link again. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: armada-xp: Change built target to include the SPL binary as bin_hdrStefan Roese2015-02-06-0/+4
| | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | kirkwood: sheevaplug: add FDT supportDrEagle2015-02-06-0/+5
| | | | | | | | | | | | | | | | | | | | | LIBFDT feature is required to support new kernels. Signed-off-by: Gérald Kerma <drEagle@doukki.net> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
| * | kirkwood: sheevaplug: fix multiple definesDrEagle2015-02-06-1/+0
| | | | | | | | | | | | | | | Signed-off-by: Gérald Kerma <drEagle@doukki.net> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
generated by cgit v1.1 at 2024-12-29 00:56:14 +0000