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* ARM: OMAP5: Set fdt_high to enable booting with Device treeSRICHARAN R2013-04-08-0/+1
| | | | | | | | | | | | While booting with dt blob, if fdt_high is not set to 0xffffffff, the dt blob gets relocated to a high ram address, which the kernel is not able to use without HIGHMEM. So set it to 0xffffffff to avoid the issue. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
* ARM: OMAP5: Rename omap5_evm to omap5_uevmSRICHARAN R2013-04-08-1/+1
| | | | | | | | | The omap5-uevm is the reference board name for OMAP5 soc based platform. So rename it accordingly. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
* omap2420-h4: Fix get_timer() and CONFIG_SYS_HZHunter, Jon2013-04-08-3/+7
| | | | | | | The function get_timer() should return time in ms and CONFIG_SYS_HZ should be set to 1000 by default. Fix both of these items. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* omap2420-h4: Add device tree supportHunter, Jon2013-04-08-0/+1
| | | | | | Enable device-tree support for the omap2420-h4 board. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* omap2420-h4: Fix booting from NOR flashHunter, Jon2013-04-08-19/+6
| | | | | | | | | | | | | | | | The omap2420-h4 board is using a RAM based address as the linker location for code. This is causing several problems when attempting to run the latest u-boot code base on this board from flash. Update the default linker location for code to be in NOR flash. Please note that OMAP maps the NOR flash to address 0x08000000 by default and so use this as the default address for the NOR flash. Also remove legacy code that attempts to calculate where in flash the sdata structure, that holds the memory interface configuration data, is located. By changing the default linker location for code to flash this is no longer necessary. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* omap2420-h4: Fix DRAM initialisationHunter, Jon2013-04-08-6/+18
| | | | | | | | | | The size of the DRAM for the omap2420-h4 board is getting setup in the dram_init() function. However, for the current u-boot release this is too late and needs to be done in dram_init_banksize(). Therefore, add a dram_init_banksize() function for the omap2420-h4 board and setup the DRAM size there. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* tricorder: enable hw assisted BCH8 in SPL and u-bootAndreas Bießmann2013-04-08-4/+9
| | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <weber@corscience.de> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com>
* omap_gpmc: add support for hw assisted BCH8Andreas Bießmann2013-04-08-92/+305
| | | | | | | | | | | | | | | | | | | | | | The kernel states: ---8<--- The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. --->8--- And we do so in u-boot. This implementation uses the same layout for BCH8 but it is fix. The current provided layout does only work with 64 Byte OOB. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Mansoor Ahamed <mansoor.ahamed@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
* omap_gpmc: change nandecc commandAndreas Bießmann2013-04-08-36/+56
| | | | | | | | | | | | | With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend. In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
* omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernelAndreas Bießmann2013-04-08-0/+17
| | | | | | | | | | | | This patch adds BCH8 ooblayout for NAND as provided by 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is currently only provided for 64 byte OOB. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
* asm/omap_gpmc.h: consolidate common definesAndreas Bießmann2013-04-08-118/+92
| | | | | | | | | | | | | arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new header. Introduce a new asm/omap_gpmc.h which defines the command part and pulls in the architecture specific one. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* omap3/cpu.h: add BCH supportAndreas Bießmann2013-04-08-0/+6
| | | | | | | | | | This patch adds the BCH result registers to register mapping for OMAP3 gpmc. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
* omap3_beagle: Flush UART3 xmit on enable if TEMT is brokenManfred Huber2013-04-08-13/+16
| | | | | | | | | | | | Flush UART3 xmit on enable if TEMT is broken On some OMAP3 devices when UART3 is configured for boot mode before SPL starts only THRE bit is set. We have to empty the transmitter before initialization starts. This patch avoids the use of CONFIG_SYS_NS16550_BROKEN_TEMT. Signed-off-by: Manfred Huber <man.huber@arcor.de> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
* am335x: Enable MMC1 clockTom Rini2013-04-08-0/+5
| | | | | | | | We must not assume ROM has enabled the clock for MMC1. Reported-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
* pcm051: Enable DDR PHY dynamic power down bitLars Poeschel2013-04-08-1/+2
| | | | | | | | | | | This is done already for am335x in 59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 and also applies for pcm051. It powers down the IO receiver when not performing read which helps reducing the overall power consuption in low power states (suspend/standby). Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
* musb: set MUSB speed based on CONFIGBin Liu2013-04-08-1/+3
| | | | | | | | Do not config MUSB to highspeed mode if CONFIG_USB_GADGET_DUALSPEED is not set, in which case Ether gadget only operates in fullspeed. Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Bin Liu <b-liu@ti.com>
* musb: am335x: disable bulk split-combine featureBin Liu2013-04-08-0/+6
| | | | | | | | | | | | | | | | | | | On TI AM335x devices, MUSB has bulk split/combine feature enabled in the ConfigData register, but the current MUSB driver does not support it yet. Therefore, disable the feature for now, until the driver adds the support. One usecase which is broken because of this feature is that Ether gadget stops working in Fullspeed mode (by un-defining CONFIG_USB_GADGET_DUALSPEED) After desabled this feature, MUSB driver send packets in proper size (no more than 64 bytes) in Fullspeed mode. This has been validated with Ether gadget in Fullspeed mode on AM335x EVM. Signed-off-by: Bin Liu <b-liu@ti.com>
* logo: update to the new logo for ATMELJosh Wu2013-04-05-0/+0
| | | | | | | Atmel change to new logo since 2012. This patch update the logo to new one. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-04-241/+1449
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| * exynos: change indentation of defines in cpu.hMinkyu Kang2013-04-04-3/+3
| | | | | | | | | | | | Fix the indentation of some defines by tab. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: pwm: Remove dead code of function exynos5_get_pwm_clkAkshay Saraswat2013-04-01-21/+0
| | | | | | | | | | | | | | | | | | As we shall now be using clock_get_periph_rate function. We find no reason for keeping code in function exynos5_get_pwm_clk. Hence, removing it. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: pwm: Use generic api to get pwm clk freqPadmavathi Venna2013-04-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Use generic api to get the pwm clock frequency Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: clock: Correct pwm source clk selectionPadmavathi Venna2013-04-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | MPLL is selected as the source clk of pwm by default Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: clock: Add generic api to get the clk freqPadmavathi Venna2013-04-01-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic api to get the frequency of the required peripherial. This API gets the source clock frequency and returns the required frequency by dividing with first and second dividers based on the requirement. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Add peripherial id for pwmPadmavathi Venna2013-04-01-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add peripherial id for pwm inorder to support generic api to get the clk frequency Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Tidy up the pwm_config function in the exynos pwm driverGabe Black2013-04-01-16/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some small fixes in the exynos pwm driver: 1. NS_IN_HZ is non-sensical since these are not compatible units. This constant actually describes the number of nanoseconds in a second. Renamed it to NS_IN_SEC. Also dropped the unnecessary parenthesis. 2. The variable "period" is not used to hold a period, it's used to hold a frequency. Renamed it to "frequency". 3. tcmp is an unsigned value, so (tcmp < 0) will never be true and the if which checks that condition will never execute. Also, there should be no problem if the pwm never switches, so there's no reason to subtract one from tcmp and therefore no reason to compare it against zero. Removed both ifs. If they weren't removed, tcmp should be a signed value. 4. Add a check for a 0 period. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4Gabe Black2013-04-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pwm_config function in the exynos pwm driver divides by its period period parameter. A function was calling pwm_config with a 0ns period and a 0ns duty cycle. That doesn't actually make any sense physically, and results in a divide by zero in the driver. This change changes the parameters to be a 100000ns period and duty cycle. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: pwm: Fix two bugs in the exynos pwm configuration codeGabe Black2013-04-01-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First, the "div" value was being used incorrectly to compute the frequency of the PWM timer. The value passed in is a constant which reflects the value that would be found in a configuration register, 0 to 4. That should correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was being used instead. Second, the reset value of the timers were being calculated to give an overall frequency, thrown out, and set to a maximum value. This was done so that PWM 4 could be used as the system clock by counting down from a high value, but it was applied indiscriminantly. It should at most be applied only to PWM 4. This change also takes the opportunity to tidy up the pwm_init function. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Add timer_get_us functionChe-Liang Chiou2013-04-01-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | timer_get_us returns the time in microseconds since a certain reference point of history. However, it does not guarantee to return an accurate time after a long period; instead, it wraps around (that is, the reference point is reset to some other point of history) after some periods. The frequency of wrapping around is about an hour (or 2^32 microseconds). Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Change get_timer() to work correctlySimon Glass2013-04-01-62/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present get_timer() does not return sane values. It should count up smoothly in milliscond intervals. We can change the PWM to count down at 1MHz, providing a resolution of 1us and a range of about an hour between required get_timer() calls. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos5: config: enable time commandAkshay Saraswat2013-04-01-0/+3
| | | | | | | | | | | | | | This patch enables time command. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos5: clock: Fix a typo bug in exynos clock initAkshay Saraswat2013-03-29-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | We intended to clear the bits of CLK_SRC_TOP2 register, instead we were writing on the reserved bits of src_core1 register. Since the default value of clk_src_top2 register were itself zero, this typo was not creating any big issue. But it is better to fix this error for better readability of the code. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: config: Enable hash commandAkshay Saraswat2013-03-29-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This enables hash command. Tested with command "hash sha256 0x40008000 0x2B 0x40009000". Used mm and md to write a standard string to memory location 0x40008000 and ran the above command to verify the output. Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * gen: Add sha h/w acceleration to hashAkshay Saraswat2013-03-29-0/+68
| | | | | | | | | | | | | | | | | | Adding H/W acceleration support to hash which can be used to test SHA 256 hash algorithm. Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Exynos: config: Enable ACE HW for SHA 256 for ExynosAkshay Saraswat2013-03-29-0/+3
| | | | | | | | | | | | | | | | This enables SHA 256 for exynos. Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Exynos: Add hardware accelerated SHA256 and SHA1Akshay Saraswat2013-03-29-0/+503
| | | | | | | | | | | | | | | | SHA-256 and SHA-1 accelerated using ACE hardware. Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Exynos: clock: Fix a bug in PLL lock check conditionAkshay Saraswat2013-03-29-7/+7
| | | | | | | | | | | | | | | | | | | | | | The condition for testing of PLL getting locked was incorrect. Rectify this error in this patch. Reported-by: Alexei Fedorov <alexie.fedorov@arm.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * spl:falcon:trats: Fix SPL image size computing.Przemyslaw Marczak2013-03-29-0/+1
| | | | | | | | | | | | | | | | | | | | | | "spl_imgsize" was set as decimal variable by "setexpr" and this causes wrong image size written by "ext4write". Preset this val with "0x" prefix allow to fix this issue. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * spi: exynos: Fix compiler warnings for non-dt systemsVivek Gautam2013-03-29-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Enclosing process_nodes() and spi_get_config() inside CONFIG_OF_CONTROL, since they are compiled only for DT systems. This fixes following warning: exynos_spi.c:391:12: warning: 'process_nodes' defined but not used [-Wunused-function] Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK5250: Fix compiler warning for non-dt systemsVivek Gautam2013-03-29-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Compiling for non-dt systems gives folowing warning: smdk5250.c: In function 'board_eth_init': smdk5250.c:152:6: warning: unused variable 'node' [-Wunused-variable] Declare variable 'node' only for dt enabled systems to remove this warning. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK5250: Use statically defined structures only in non DT caseAjay Kumar2013-03-27-5/+9
| | | | | | | | | | | | | | | | | | | | Since we have DT support in exynos_fb and exynos_dp drivers now, we need not define any static structure or platform data related to display in the board file smdk5250.c. So, we place the already existing structures inside #ifndef CONFIG_OF_CONTROL block. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK5250: Add device node for DPAjay Kumar2013-03-27-0/+15
| | | | | | | | | | | | | | Add DT bindings for DP supporting an eDP panel of size 2560x1600. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: Add device node for DPAjay Kumar2013-03-27-0/+76
| | | | | | | | | | | | | | Add DT node and bindings documentaion for DP. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * video: exynos_dp: Add function to parse DP DT nodeAjay Kumar2013-03-27-0/+82
| | | | | | | | | | | | | | | | Add function to parse the required platform data fron DP DT node and fill the edp_info structure. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: FDT: Add compatible strings for FIMDAjay Kumar2013-03-27-0/+2
| | | | | | | | | | | | | | Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * video: exynos_dp: Make dp_regs globalAjay Kumar2013-03-27-45/+10
| | | | | | | | | | | | | | | | | | | | dp_regs variable was redundantly defined across all the functions in the driver even though it contains just the same address. We make it global and initialize it once using exynos_dp_set_base_addr(). >From then on, other funtions can use the address stored in the global variable. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SMDK5250: Add device node for FIMDAjay Kumar2013-03-27-0/+25
| | | | | | | | | | | | | | Add DT bindings for FIMD supporting an eDP panel of size 2560x1600. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: Add device node for FIMDAjay Kumar2013-03-27-0/+98
| | | | | | | | | | | | | | Add DT node and bindings documentation for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * video: exynos_fb: add DT support for FIMD driverAjay Kumar2013-03-27-0/+180
| | | | | | | | | | | | | | | | | | | | | | Add function to parse FIMD data from device tree. The driver still supports non-DT case. Define panel_info statically in some file if you are not using DT. If you have defined DT node for FIMD, panel_info will be filled using the bindings of FIMD DT node. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS: FDT: Add compatible strings for FIMDAjay Kumar2013-03-27-0/+2
| | | | | | | | | | | | | | Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
generated by cgit v1.1 at 2024-12-26 11:29:55 +0000