| Commit message (Collapse) | Author | Age | Lines |
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Looks like I accidentally added a newline to the OTP help when merging and
older change.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Blackfin SDH controller is still using the legacy framework, so update
the driver to use the renamed functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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When testing a u-boot binary that hasn't been booted from the bootrom, we
have to make sure the bootstruct structure has sane storage space. If we
don't, the initcode will crash when it tries to dereference an invalid
pointer.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Fix NAND support broken during new NAND code merge. Move those few lines of
code to board/netstar/netstar.c
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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Divisor field is called PTV not PVT.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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add CONFIG_CLPS7111_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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add CONFIG_LPC2292_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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add CONFIG_KS8695_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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add CONFIG_USB_S3C64XX to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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add CONFIG_NETARM_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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add CONFIG_SA1100_SERIAL to activate the driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Add RTC support.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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Make crc32 function to match its prototype. Use more meaningful identifiers.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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The mpc8313erdb board currently sets DBAT6 to cover all of the final 256MiB of
address space; however, not all of this space is covered by a device. In
particular, flash sits at 0xfe000000-0xfe7fffff, and nothing is mapped
at the far end of the address space.
In zlib, there is a loop that references p[-1] if p is non-NULL. Under
some circumstances, this leads to the CPU speculatively loading from
0xfffffff8 if p is NULL. This leads to a machine check.
Signed-off-by: Scott Wood <scottwood@freescale.com>
continuation to the remaining mpc83xx boards that suffer from the same problem.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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This patch fix the compiler/linker errors
common/cmd_i2c.c:1252: undefined reference to `i2c_get_bus_speed'
common/cmd_i2c.c:1256: undefined reference to `i2c_set_bus_speed'
if board use CONFIG_I2C_CMD_TREE and CONFIG_I2C_MULTI_BUS is not
uesd/undef (wrong define order)
and
removes additional empty lines
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
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We had a bug on 86xx in which the boot page used to bring up secondary
cores was being overwritten and used for the malloc region in u-boot.
We need to reserve the region of memory that the boot page is going to
be put at so nothing uses it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
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Match determine_mp_bootpg() that was added for 86xx. We need this to
address a bug introduced in v2009.03 with 86xx MP booting. We have to
make sure to reserve the region of memory used for the MP bootpg() so
other u-boot code doesn't use it.
Also added a comment about how cpu_reset() is dealing w/an errata on
early 85xx MP HW.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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* Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx
* Introduce determine_mp_bootpg() helper. We'll need this to address a
bug introduced in v2009.03 with 86xx MP booting. We have to make sure
to reserve the region of memory used for the MP bootpg() so other
u-boot code doesn't use it.
* Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to
allow cmd_mp.c to build and work. In the future we should look at
implementing all these functions. This could be common w/85xx if we
use spin tables on 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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We're missing the board_lmb_reserve definitions that allow
cpu_mp_lmb_reserve to be called; this means that Linux
is free to reallocate reserved pages. Linux currently boots
because we're getting lucky - the page we've reserved is
high enough in memory that it isn't allocated by Linux
while we still need it to be in existence.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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This patch adds MPC8569MDS board support. The UART, QE UEC1 and UEC2, BRD
EEPROM on I2C2 bus, PCI express and DDR3 SPD are supported in this patch.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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For the silicon which doesn't have ROM support in QE, it always needs to load
a pre-built ucode binary to IRAM so that QE can work.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
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* Enable backside L2
* e500mc no longer has timebase enable in HID (moved to CCSR register)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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